Convert CONFIG_BAUDRATE to Kconfig

This converts the following to Kconfig:
   CONFIG_BAUDRATE

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2020-06-16 19:06:10 -04:00
parent b120665fe9
commit 11af95a02a
27 changed files with 0 additions and 50 deletions

5
README
View file

@ -670,11 +670,6 @@ The following options need to be configured:
Define this variable to enable hw flow control in serial driver.
Current user of this option is drivers/serial/nsl16550.c driver
- Console Baudrate:
CONFIG_BAUDRATE - in bps
Select one of the baudrates listed in
CONFIG_SYS_BAUDRATE_TABLE, see below.
- Autoboot Command:
CONFIG_BOOTCOMMAND
Only needed when CONFIG_BOOTDELAY is enabled;

View file

@ -103,9 +103,6 @@
#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */
#define PHYS_SDRAM_2_SIZE SZ_2G /* 2 GB */
/* Serial */
#define CONFIG_BAUDRATE 115200
/* Monitor Command Prompt */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_CBSIZE SZ_2K

View file

@ -31,7 +31,6 @@
#define CONFIG_SYS_NS16550_COM2 0x66110000
#define CONFIG_SYS_NS16550_COM3 0x66120000
#define CONFIG_SYS_NS16550_COM4 0x66130000
#define CONFIG_BAUDRATE 115200
/* console configuration */
#define CONFIG_SYS_CBSIZE SZ_1K

View file

@ -115,7 +115,6 @@ extern phys_addr_t prior_stage_fdt_address;
/*
* Serial console configuration.
*/
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
115200}

View file

@ -135,9 +135,6 @@
#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */
#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */
/* Serial */
#define CONFIG_BAUDRATE 115200
/* Monitor Command Prompt */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_CBSIZE SZ_2K

View file

@ -112,8 +112,6 @@
*/
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 115200
#define CONFIG_HOSTNAME "ccdc"
#define CONFIG_ROOTPATH "/opt/nfsroot"
#define CONFIG_BOOTFILE "ccdc.img"

View file

@ -62,7 +62,6 @@
/* UART */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_BAUDRATE 115200
/* USB Configs */
#ifdef CONFIG_CMD_USB

View file

@ -66,7 +66,6 @@
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 115200
#ifndef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND "if run check_em_pad; then " \

View file

@ -11,9 +11,6 @@
/* Board Clock , P1 clock frequency (XTAL=13.33MHz) */
#define CONFIG_SYS_CLK_FREQ 66666666
/* Serial Console */
#define CONFIG_BAUDRATE 115200
/* Miscellaneous */
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_CMDLINE_TAG

View file

@ -175,8 +175,6 @@
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
#define CONFIG_BAUDRATE 115200
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR

View file

@ -175,9 +175,6 @@
#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
#define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */
/* Serial */
#define CONFIG_BAUDRATE 115200
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */

View file

@ -163,9 +163,6 @@
/* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */
#define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */
/* Serial */
#define CONFIG_BAUDRATE 115200
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */

View file

@ -175,9 +175,6 @@
/* LPDDR4 board total DDR is 3GB */
#define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */
/* Serial */
#define CONFIG_BAUDRATE 115200
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */

View file

@ -104,8 +104,6 @@
#endif
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#define CONFIG_BAUDRATE 115200
/* I2C */
#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C

View file

@ -48,7 +48,6 @@
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/* Miscellaneous configurable options */

View file

@ -64,7 +64,6 @@
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#if !defined(SPL_NO_IFC) || defined(CONFIG_TARGET_LS1088AQDS)

View file

@ -78,7 +78,6 @@
(void *)CONFIG_SYS_SERIAL1, \
(void *)CONFIG_SYS_SERIAL2, \
(void *)CONFIG_SYS_SERIAL3 }
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/* MC firmware */

View file

@ -33,7 +33,6 @@
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 115200
/* Command definition */

View file

@ -27,7 +27,6 @@
#else
#error please define serial console (CONFIG_SERIAL_CONSOLE_UARTx)
#endif
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + 16)

View file

@ -39,7 +39,6 @@
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_CACHELINE_SIZE 64

View file

@ -29,9 +29,6 @@
*/
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00)
/* UART Definitions */
#define CONFIG_BAUDRATE 115200
/* Console configuration */
#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */
#define CONFIG_SYS_MAXARGS 64

View file

@ -73,6 +73,5 @@
#define CONFIG_SYS_NS16550_COM4 UART3_BASE
#define CONFIG_SYS_NS16550_COM5 UART4_BASE
#define CONFIG_SYS_NS16550_COM6 UART5_BASE
#define CONFIG_BAUDRATE 115200
#endif /* ! __CONFIG_PDU001_H */

View file

@ -150,8 +150,6 @@
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
(PHYS_SDRAM_SIZE >> 1))
#define CONFIG_BAUDRATE 115200
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR

View file

@ -41,7 +41,6 @@
#define CORTINA_SERIAL_PORTS {(void *)CONFIG_SYS_SERIAL0, \
(void *)CONFIG_SYS_SERIAL1}
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_SERIAL0 PER_UART0_CFG
#define CONFIG_SYS_SERIAL1 PER_UART1_CFG

View file

@ -9,7 +9,6 @@
#include "rockchip-common.h"
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SKIP_LOWLEVEL_INIT

View file

@ -15,7 +15,6 @@
#define CONFIG_SYS_SDRAM_BASE 0
#define SDRAM_MAX_SIZE 0xff000000
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SKIP_LOWLEVEL_INIT

View file

@ -72,8 +72,6 @@
#define CONFIG_BOOTARGS \
"rw rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE \