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https://github.com/AsahiLinux/u-boot
synced 2024-11-28 07:31:15 +00:00
Convert CONFIG_BAUDRATE to Kconfig
This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
parent
b120665fe9
commit
11af95a02a
27 changed files with 0 additions and 50 deletions
5
README
5
README
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@ -670,11 +670,6 @@ The following options need to be configured:
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Define this variable to enable hw flow control in serial driver.
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Current user of this option is drivers/serial/nsl16550.c driver
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- Console Baudrate:
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CONFIG_BAUDRATE - in bps
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Select one of the baudrates listed in
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CONFIG_SYS_BAUDRATE_TABLE, see below.
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- Autoboot Command:
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CONFIG_BOOTCOMMAND
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Only needed when CONFIG_BOOTDELAY is enabled;
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@ -103,9 +103,6 @@
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#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */
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#define PHYS_SDRAM_2_SIZE SZ_2G /* 2 GB */
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/* Serial */
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#define CONFIG_BAUDRATE 115200
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/* Monitor Command Prompt */
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_SYS_CBSIZE SZ_2K
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@ -31,7 +31,6 @@
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#define CONFIG_SYS_NS16550_COM2 0x66110000
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#define CONFIG_SYS_NS16550_COM3 0x66120000
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#define CONFIG_SYS_NS16550_COM4 0x66130000
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#define CONFIG_BAUDRATE 115200
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/* console configuration */
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#define CONFIG_SYS_CBSIZE SZ_1K
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@ -115,7 +115,6 @@ extern phys_addr_t prior_stage_fdt_address;
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/*
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* Serial console configuration.
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*/
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
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115200}
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@ -135,9 +135,6 @@
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#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */
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#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */
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/* Serial */
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#define CONFIG_BAUDRATE 115200
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/* Monitor Command Prompt */
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_SYS_CBSIZE SZ_2K
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@ -112,8 +112,6 @@
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*/
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_HOSTNAME "ccdc"
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#define CONFIG_ROOTPATH "/opt/nfsroot"
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#define CONFIG_BOOTFILE "ccdc.img"
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@ -62,7 +62,6 @@
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/* UART */
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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#define CONFIG_BAUDRATE 115200
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/* USB Configs */
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#ifdef CONFIG_CMD_USB
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@ -66,7 +66,6 @@
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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#ifndef CONFIG_BOOTCOMMAND
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#define CONFIG_BOOTCOMMAND "if run check_em_pad; then " \
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@ -11,9 +11,6 @@
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/* Board Clock , P1 clock frequency (XTAL=13.33MHz) */
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#define CONFIG_SYS_CLK_FREQ 66666666
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/* Serial Console */
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#define CONFIG_BAUDRATE 115200
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/* Miscellaneous */
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#define CONFIG_SYS_PBSIZE 256
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#define CONFIG_CMDLINE_TAG
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@ -175,8 +175,6 @@
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
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@ -175,9 +175,6 @@
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#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
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#define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */
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/* Serial */
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#define CONFIG_BAUDRATE 115200
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/* Generic Timer Definitions */
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#define COUNTER_FREQUENCY 8000000 /* 8MHz */
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@ -163,9 +163,6 @@
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/* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */
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#define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */
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/* Serial */
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#define CONFIG_BAUDRATE 115200
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/* Generic Timer Definitions */
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#define COUNTER_FREQUENCY 8000000 /* 8MHz */
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@ -175,9 +175,6 @@
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/* LPDDR4 board total DDR is 3GB */
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#define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */
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/* Serial */
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#define CONFIG_BAUDRATE 115200
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/* Generic Timer Definitions */
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#define COUNTER_FREQUENCY 8000000 /* 8MHz */
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@ -104,8 +104,6 @@
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#endif
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#define CONFIG_SYS_NS16550_CLK get_serial_clock()
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#define CONFIG_BAUDRATE 115200
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/* I2C */
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#ifndef CONFIG_DM_I2C
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#define CONFIG_SYS_I2C
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@ -48,7 +48,6 @@
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#define CONFIG_SYS_NS16550_REG_SIZE 1
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#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/* Miscellaneous configurable options */
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@ -64,7 +64,6 @@
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#define CONFIG_SYS_NS16550_REG_SIZE 1
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#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#if !defined(SPL_NO_IFC) || defined(CONFIG_TARGET_LS1088AQDS)
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@ -78,7 +78,6 @@
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(void *)CONFIG_SYS_SERIAL1, \
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(void *)CONFIG_SYS_SERIAL2, \
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(void *)CONFIG_SYS_SERIAL3 }
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/* MC firmware */
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@ -33,7 +33,6 @@
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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/* Command definition */
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@ -27,7 +27,6 @@
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#else
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#error please define serial console (CONFIG_SERIAL_CONSOLE_UARTx)
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#endif
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + 16)
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@ -39,7 +39,6 @@
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_CACHELINE_SIZE 64
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@ -29,9 +29,6 @@
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*/
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00)
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/* UART Definitions */
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#define CONFIG_BAUDRATE 115200
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/* Console configuration */
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#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */
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#define CONFIG_SYS_MAXARGS 64
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@ -73,6 +73,5 @@
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#define CONFIG_SYS_NS16550_COM4 UART3_BASE
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#define CONFIG_SYS_NS16550_COM5 UART4_BASE
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#define CONFIG_SYS_NS16550_COM6 UART5_BASE
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#define CONFIG_BAUDRATE 115200
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#endif /* ! __CONFIG_PDU001_H */
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@ -150,8 +150,6 @@
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
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(PHYS_SDRAM_SIZE >> 1))
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
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@ -41,7 +41,6 @@
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#define CORTINA_SERIAL_PORTS {(void *)CONFIG_SYS_SERIAL0, \
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(void *)CONFIG_SYS_SERIAL1}
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_SERIAL0 PER_UART0_CFG
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#define CONFIG_SYS_SERIAL1 PER_UART1_CFG
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@ -9,7 +9,6 @@
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#include "rockchip-common.h"
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SKIP_LOWLEVEL_INIT
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@ -15,7 +15,6 @@
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#define CONFIG_SYS_SDRAM_BASE 0
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#define SDRAM_MAX_SIZE 0xff000000
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SKIP_LOWLEVEL_INIT
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@ -72,8 +72,6 @@
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#define CONFIG_BOOTARGS \
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"rw rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_PBSIZE \
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