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rockchip: mkimage: pad the header to 8-bytes (using a 'nop') for RK3399
The RK3399 boot code (running as AArch64) poses a bit of a challenge for SPL image generation: * The BootROM will start execution right after the 4-byte header (at the odd instruction word loaded into SRAM at 0xff8c2004, with the 'RK33' boot magic residing at 0xff8c2000). * The default padding (during ELF generation) for AArch64 is 0x0, which is an illegal instruction and the .text section needs to be naturally aligned (someone might locate a 64bit constant relative to the section start and unaligned loads trigger a fault for all privileged modes of an ARMv8)... so we can't simply define the CONFIG_SPL_TEXT_BASE option to the odd address (0xff8c2004). * Finally, we don't want to change the values used for padding of the SPL .text section for all ARMv8 targets to the instruction word encoding 'nop', as this would affect all padding in this section and might hide errors that would otherwise quickly trigger an illegal insn exception. To deal with this situation, we modify the rkimage generation to - understand the fact that the RK3399 needs to pad the header to an 8 byte boundary using an AArch64 'nop' - the necessary logic to adjust the header_size (which controls the location where the payload is copied into the image) and to insert this padding (AArch64 insn words are always little-endian) into the image following the 4-byte header magic. X-AffectedPlatforms: RK3399-Q7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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parent
f3edf8b18f
commit
111bcc4fb6
4 changed files with 118 additions and 36 deletions
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@ -40,6 +40,14 @@ struct header0_info {
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uint8_t reserved2[2];
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};
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/**
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* struct header1_info
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*/
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struct header1_info {
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uint32_t magic;
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uint32_t first_insn;
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};
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/**
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* struct spl_info - spl info for each chip
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*
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@ -47,19 +55,22 @@ struct header0_info {
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* @spl_hdr: Boot ROM requires a 4-bytes spl header
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* @spl_size: Spl size(include extra 4-bytes spl header)
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* @spl_rc4: RC4 encode the SPL binary (same key as header)
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* @spl_aarch64: Pad the header with an AArch64 'nop's to 8-bytes
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*/
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struct spl_info {
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const char *imagename;
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const char *spl_hdr;
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const uint32_t spl_size;
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const bool spl_rc4;
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const bool spl_aarch64;
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};
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static struct spl_info spl_infos[] = {
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{ "rk3036", "RK30", 0x1000, false },
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{ "rk3188", "RK31", 0x8000 - 0x800, true },
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{ "rk3288", "RK32", 0x8000, false },
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{ "rk3399", "RK33", 0x20000, false },
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{ "rk3036", "RK30", 0x1000, false, false },
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{ "rk3188", "RK31", 0x8000 - 0x800, true, false },
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{ "rk3288", "RK32", 0x8000, false, false },
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{ "rk3399", "RK33", 0x20000, false, true },
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};
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static unsigned char rc4_key[16] = {
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@ -106,6 +117,16 @@ const char *rkcommon_get_spl_hdr(struct image_tool_params *params)
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return info->spl_hdr;
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}
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const bool rkcommon_get_spl_hdr_padto8(struct image_tool_params *params)
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{
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struct spl_info *info = rkcommon_get_spl_info(params->imagename);
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/*
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* info would not be NULL, because of we checked params before.
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*/
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return info->spl_aarch64;
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}
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int rkcommon_get_spl_size(struct image_tool_params *params)
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{
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struct spl_info *info = rkcommon_get_spl_info(params->imagename);
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@ -126,16 +147,12 @@ bool rkcommon_need_rc4_spl(struct image_tool_params *params)
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return info->spl_rc4;
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}
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int rkcommon_set_header(void *buf, uint file_size,
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static void rkcommon_set_header0(void *buf, uint file_size,
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struct image_tool_params *params)
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{
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struct header0_info *hdr;
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if (file_size > rkcommon_get_spl_size(params))
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return -ENOSPC;
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struct header0_info *hdr = buf;
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memset(buf, '\0', RK_INIT_OFFSET * RK_BLK_SIZE);
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hdr = (struct header0_info *)buf;
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hdr->signature = RK_SIGNATURE;
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hdr->disable_rc4 = !rkcommon_need_rc4_spl(params);
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hdr->init_offset = RK_INIT_OFFSET;
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@ -145,6 +162,31 @@ int rkcommon_set_header(void *buf, uint file_size,
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hdr->init_boot_size = hdr->init_size + RK_MAX_BOOT_SIZE / RK_BLK_SIZE;
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rc4_encode(buf, RK_BLK_SIZE, rc4_key);
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}
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int rkcommon_set_header(void *buf, uint file_size,
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struct image_tool_params *params)
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{
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struct header1_info *hdr = buf + RK_SPL_HDR_START;
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if (file_size > rkcommon_get_spl_size(params))
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return -ENOSPC;
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rkcommon_set_header0(buf, file_size, params);
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/* Set up the SPL name and add the AArch64 'nop' padding, if needed */
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memcpy(&hdr->magic, rkcommon_get_spl_hdr(params), RK_SPL_HDR_SIZE);
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/*
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* Pad the 4-byte header to 8-bytes using an AArch64 'nop'.
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* Note that AArch64 insns are always encoded as little-endian.
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*/
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if (rkcommon_get_spl_hdr_padto8(params))
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hdr->first_insn = cpu_to_le32(0xd503201f);
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if (rkcommon_need_rc4_spl(params))
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rkcommon_rc4_encode_spl(buf, RK_SPL_HDR_START,
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params->file_size - RK_SPL_HDR_START);
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return 0;
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}
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@ -161,3 +203,34 @@ void rkcommon_rc4_encode_spl(void *buf, unsigned int offset, unsigned int size)
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remaining -= step;
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}
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}
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void rkcommon_vrec_header(struct image_tool_params *params,
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struct image_type_params *tparams)
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{
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/*
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* The SPL image looks as follows:
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*
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* 0x0 header0 (see rkcommon.c)
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* 0x800 spl_name ('RK30', ..., 'RK33')
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* 0x804 first instruction to be executed
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* (image start for AArch32, 'nop' for AArch64))
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* 0x808 second instruction to be executed
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* (image start for AArch64)
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*
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* For AArch64 (ARMv8) payloads, we receive an input file that
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* needs to start on an 8-byte boundary (natural alignment), so
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* we need to put a NOP at 0x804.
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*
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* Depending on this, the header is either 0x804 or 0x808 bytes
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* in length.
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*/
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if (rkcommon_get_spl_hdr_padto8(params))
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tparams->header_size = RK_SPL_HDR_START + 8;
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else
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tparams->header_size = RK_SPL_HDR_START + 4;
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/* Allocate, clear and install the header */
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tparams->hdr = malloc(tparams->header_size);
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memset(tparams->hdr, 0, tparams->header_size);
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tparams->header_size = tparams->header_size;
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}
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@ -33,6 +33,19 @@ int rkcommon_check_params(struct image_tool_params *params);
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*/
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const char *rkcommon_get_spl_hdr(struct image_tool_params *params);
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/**
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* rkcommon_get_spl_hdr_padto8() - check if we need to pad to 8 bytes
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*
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* Rockchip's bootrom starts execution right after the SPL header (i.e.
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* at offset 4), but we can not reasonably align the test section of
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* an AArch64 SPL at 4 bytes (as this would break natural alignment
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* and any embedded constants might cause an alignment exception, which
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* is illegal in privileged modes).
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*
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* Padding is (for now) assumed to occur with a single AArch64 'nop'.
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*/
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const bool rkcommon_get_spl_hdr_padto8(struct image_tool_params *params);
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/**
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* rkcommon_get_spl_size() - get spl size for a Rockchip boot image
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*
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@ -77,4 +90,14 @@ bool rkcommon_need_rc4_spl(struct image_tool_params *params);
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*/
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void rkcommon_rc4_encode_spl(void *buf, unsigned int offset, unsigned int size);
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/**
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* rkcommon_vrec_header() - allocate memory for the header
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*
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* @params: Pointer to the tool params structure
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* @tparams: Pointer tot the image type structure (for setting
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* the header and header_size)
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*/
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void rkcommon_vrec_header(struct image_tool_params *params,
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struct image_type_params *tparams);
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#endif
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17
tools/rksd.c
17
tools/rksd.c
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@ -13,8 +13,6 @@
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#include "mkimage.h"
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#include "rkcommon.h"
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static char dummy_hdr[RK_IMAGE_HEADER_LEN];
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static int rksd_verify_header(unsigned char *buf, int size,
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struct image_tool_params *params)
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{
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@ -38,13 +36,6 @@ static void rksd_set_header(void *buf, struct stat *sbuf, int ifd,
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printf("Warning: SPL image is too large (size %#x) and will not boot\n",
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size);
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}
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memcpy(buf + RK_SPL_HDR_START, rkcommon_get_spl_hdr(params),
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RK_SPL_HDR_SIZE);
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if (rkcommon_need_rc4_spl(params))
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rkcommon_rc4_encode_spl(buf, RK_SPL_HDR_START,
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params->file_size - RK_SPL_HDR_START);
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}
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static int rksd_extract_subimage(void *buf, struct image_tool_params *params)
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{
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int pad_size;
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rkcommon_vrec_header(params, tparams);
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pad_size = RK_SPL_HDR_START + rkcommon_get_spl_size(params);
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debug("pad_size %x\n", pad_size);
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return pad_size - params->file_size;
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return pad_size - params->file_size - tparams->header_size;
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}
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/*
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@ -78,8 +71,8 @@ static int rksd_vrec_header(struct image_tool_params *params,
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U_BOOT_IMAGE_TYPE(
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rksd,
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"Rockchip SD Boot Image support",
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RK_IMAGE_HEADER_LEN,
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dummy_hdr,
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0,
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NULL,
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rkcommon_check_params,
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rksd_verify_header,
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rksd_print_header,
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@ -17,8 +17,6 @@ enum {
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RKSPI_SECT_LEN = RK_BLK_SIZE * 4,
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};
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static char dummy_hdr[RK_IMAGE_HEADER_LEN];
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static int rkspi_verify_header(unsigned char *buf, int size,
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struct image_tool_params *params)
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{
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size);
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}
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memcpy(buf + RK_SPL_HDR_START, rkcommon_get_spl_hdr(params),
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RK_SPL_HDR_SIZE);
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if (rkcommon_need_rc4_spl(params))
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rkcommon_rc4_encode_spl(buf, RK_SPL_HDR_START,
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params->file_size - RK_SPL_HDR_START);
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/*
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* Spread the image out so we only use the first 2KB of each 4KB
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* region. This is a feature of the SPI format required by the Rockchip
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{
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int pad_size;
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rkcommon_vrec_header(params, tparams);
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pad_size = (rkcommon_get_spl_size(params) + 0x7ff) / 0x800 * 0x800;
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params->orig_file_size = pad_size;
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pad_size += RK_SPL_HDR_START;
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debug("pad_size %x\n", pad_size);
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return pad_size - params->file_size;
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return pad_size - params->file_size - tparams->header_size;
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}
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/*
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U_BOOT_IMAGE_TYPE(
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rkspi,
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"Rockchip SPI Boot Image support",
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RK_IMAGE_HEADER_LEN,
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dummy_hdr,
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0,
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NULL,
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rkcommon_check_params,
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rkspi_verify_header,
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rkspi_print_header,
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