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usb: musb: Fix configuring FIFO for endpoints

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This patch fixes configuring FIFOs for one-directional endpoints which have
only one queue (either RX or TX, but noth both).

Size of FIFO buffer is 2^(idx+3) bytes and starting address is 2^(addr+3).
Moreover first 64 bytes are reserved for EP0.

Without this patch if FIFO size specified by caller was zero then idx was
incorrectly calculated (expr. ffs(0)-1) and size overflowed in fifosz
register. This register uses has only 4 bits for FIFO size. Moreover
specifying zero buffer size is not possible (with idx=0 is minimal buffer
size 8 bytes).

So even for one-directional endpoints we need to correctly specify both
(RX and TX) FIFO buffer sizes and its addresses.

This patch is fixing calculation of start address and buffer size to
minimal value and ensures that it would not overlap with buffer reserved
for EP0.

This issue caused loose of packets on USB bus in both directions and
basically usbtty was unusable.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
This commit is contained in:
Pali Rohár 2021-02-07 14:50:05 +01:00 committed by Marek Vasut
parent a6f5e1b9cd
commit 10bc132510
1 changed files with 4 additions and 4 deletions
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8
drivers/usb/musb/musb_core.c
View file

@ -50,7 +50,7 @@ void musb_start(void)
# define config_fifo(dir, idx, addr) \ # define config_fifo(dir, idx, addr) \
do { \ do { \
writeb(idx, &musbr->dir##fifosz); \ writeb(idx, &musbr->dir##fifosz); \
writew(fifoaddr >> 3, &musbr->dir##fifoadd); \ writew(addr, &musbr->dir##fifoadd); \
} while (0) } while (0)
#endif #endif
@ -66,14 +66,14 @@ void musb_start(void)
void musb_configure_ep(const struct musb_epinfo *epinfo, u8 cnt) void musb_configure_ep(const struct musb_epinfo *epinfo, u8 cnt)
{ {
u16 csr; u16 csr;
u16 fifoaddr = 64; /* First 64 bytes of FIFO reserved for EP0 */ u16 fifoaddr = 64 >> 3; /* First 64 bytes of FIFO reserved for EP0 */
u32 fifosize; u32 fifosize;
u8 idx; u8 idx;
while (cnt--) { while (cnt--) {
/* prepare fifosize to write to register */ /* prepare fifosize to write to register */
fifosize = epinfo->epsize >> 3; fifosize = epinfo->epsize >> 3;
idx = ffs(fifosize) - 1; idx = fifosize ? ((ffs(fifosize) - 1) & 0xF) : 0;
writeb(epinfo->epnum, &musbr->index); writeb(epinfo->epnum, &musbr->index);
if (epinfo->epdir) { if (epinfo->epdir) {
@ -99,7 +99,7 @@ void musb_configure_ep(const struct musb_epinfo *epinfo, u8 cnt)
writew(csr | MUSB_RXCSR_FLUSHFIFO, writew(csr | MUSB_RXCSR_FLUSHFIFO,
&musbr->rxcsr); &musbr->rxcsr);
} }
fifoaddr += epinfo->epsize; fifoaddr += 1 << idx;
epinfo++; epinfo++;
} }
} }