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ARM: Clean up CONFIG_ARMV7_NONSEC/VIRT/PSCI conditions

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CONFIG_ARMV7_VIRT depends on CONFIG_ARMV7_NONSEC, thus doesn't need to
be taken into account additionally. CONFIG_ARMV7_PSCI is only set on
boards that support CONFIG_ARMV7_NONSEC, and it only works on those.

CC: Tang Yuantian <Yuantian.Tang@freescale.com>
CC: York Sun <yorksun@freescale.com>
CC: Steve Rae <srae@broadcom.com>
CC: Andre Przywara <andre.przywara@linaro.org>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Tested-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Jan Kiszka 2015-04-21 07:18:24 +02:00 committed by Tom Warren
parent 86bd20b007
commit 104d6fb6cd
10 changed files with 13 additions and 13 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/cpu/armv7/Makefile
View file

@ -18,7 +18,7 @@ obj-y += lowlevel_init.o
endif endif
endif endif
ifneq ($(CONFIG_ARMV7_NONSEC)$(CONFIG_ARMV7_VIRT),) ifneq ($(CONFIG_ARMV7_NONSEC),)
obj-y += nonsec_virt.o obj-y += nonsec_virt.o
obj-y += virt-v7.o obj-y += virt-v7.o
obj-y += virt-dt.o obj-y += virt-dt.o

2
arch/arm/cpu/armv7/ls102xa/cpu.c
View file

@ -329,7 +329,7 @@ int arch_cpu_init(void)
return 0; return 0;
} }
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) #ifdef CONFIG_ARMV7_NONSEC
/* Set the address at which the secondary core starts from.*/ /* Set the address at which the secondary core starts from.*/
void smp_set_core_boot_addr(unsigned long addr, int corenr) void smp_set_core_boot_addr(unsigned long addr, int corenr)
{ {

2
arch/arm/cpu/armv7/virt-dt.c
View file

@ -90,7 +90,7 @@ static int fdt_psci(void *fdt)
int psci_update_dt(void *fdt) int psci_update_dt(void *fdt)
{ {
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) #ifdef CONFIG_ARMV7_NONSEC
if (!armv7_boot_nonsec()) if (!armv7_boot_nonsec())
return 0; return 0;
#endif #endif

2
arch/arm/cpu/u-boot.lds
View file

@ -25,7 +25,7 @@ SECTIONS
*(.text*) *(.text*)
} }
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) || defined(CONFIG_ARMV7_PSCI) #ifdef CONFIG_ARMV7_NONSEC
#ifndef CONFIG_ARMV7_SECURE_BASE #ifndef CONFIG_ARMV7_SECURE_BASE
#define CONFIG_ARMV7_SECURE_BASE #define CONFIG_ARMV7_SECURE_BASE

4
arch/arm/include/asm/armv7.h
View file

@ -131,7 +131,7 @@ void v7_outer_cache_inval_all(void);
void v7_outer_cache_flush_range(u32 start, u32 end); void v7_outer_cache_flush_range(u32 start, u32 end);
void v7_outer_cache_inval_range(u32 start, u32 end); void v7_outer_cache_inval_range(u32 start, u32 end);
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) #ifdef CONFIG_ARMV7_NONSEC
int armv7_init_nonsec(void); int armv7_init_nonsec(void);
bool armv7_boot_nonsec(void); bool armv7_boot_nonsec(void);
@ -145,7 +145,7 @@ void _smp_pen(void);
extern char __secure_start[]; extern char __secure_start[];
extern char __secure_end[]; extern char __secure_end[];
#endif /* CONFIG_ARMV7_NONSEC || CONFIG_ARMV7_VIRT */ #endif /* CONFIG_ARMV7_NONSEC */
void v7_arch_cp15_set_l2aux_ctrl(u32 l2auxctrl, u32 cpu_midr, void v7_arch_cp15_set_l2aux_ctrl(u32 l2auxctrl, u32 cpu_midr,
u32 cpu_rev_comb, u32 cpu_variant, u32 cpu_rev_comb, u32 cpu_variant,

2
arch/arm/lib/bootm-fdt.c
View file

@ -34,7 +34,7 @@ int arch_fixup_fdt(void *blob)
} }
ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS); ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) #ifdef CONFIG_ARMV7_NONSEC
if (ret) if (ret)
return ret; return ret;

6
arch/arm/lib/bootm.c
View file

@ -26,7 +26,7 @@
#include <bootm.h> #include <bootm.h>
#include <vxworks.h> #include <vxworks.h>
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) #ifdef CONFIG_ARMV7_NONSEC
#include <asm/armv7.h> #include <asm/armv7.h>
#endif #endif
@ -238,7 +238,7 @@ static void boot_prep_linux(bootm_headers_t *images)
} }
} }
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) #ifdef CONFIG_ARMV7_NONSEC
bool armv7_boot_nonsec(void) bool armv7_boot_nonsec(void)
{ {
char *s = getenv("bootm_boot_mode"); char *s = getenv("bootm_boot_mode");
@ -305,7 +305,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
r2 = gd->bd->bi_boot_params; r2 = gd->bd->bi_boot_params;
if (!fake) { if (!fake) {
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) #ifdef CONFIG_ARMV7_NONSEC
if (armv7_boot_nonsec()) { if (armv7_boot_nonsec()) {
armv7_init_nonsec(); armv7_init_nonsec();
secure_ram_addr(_do_nonsec_entry)(kernel_entry, secure_ram_addr(_do_nonsec_entry)(kernel_entry,

2
board/armltd/vexpress/vexpress_common.c
View file

@ -181,7 +181,7 @@ ulong get_board_rev(void){
return readl((u32 *)SYS_ID); return readl((u32 *)SYS_ID);
} }
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) #ifdef CONFIG_ARMV7_NONSEC
/* Setting the address at which secondary cores start from. /* Setting the address at which secondary cores start from.
* Versatile Express uses one address for all cores, so ignore corenr * Versatile Express uses one address for all cores, so ignore corenr
*/ */

2
board/broadcom/bcm_ep/board.c
View file

@ -54,7 +54,7 @@ int board_early_init_f(void)
return status; return status;
} }
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) #ifdef CONFIG_ARMV7_NONSEC
void smp_set_core_boot_addr(unsigned long addr, int corenr) void smp_set_core_boot_addr(unsigned long addr, int corenr)
{ {
} }

2
board/freescale/common/arm_sleep.c
View file

@ -6,7 +6,7 @@
#include <common.h> #include <common.h>
#include <asm/io.h> #include <asm/io.h>
#if !defined(CONFIG_ARMV7_NONSEC) || !defined(CONFIG_ARMV7_VIRT) #ifndef CONFIG_ARMV7_NONSEC
#error " Deep sleep needs non-secure mode support. " #error " Deep sleep needs non-secure mode support. "
#else #else
#include <asm/secure.h> #include <asm/secure.h>