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riscv: Add FPIOA and GPIO support for Kendryte K210
This patch adds the necessary configs and docs for FPIOA and GPIO support on the K210. Signed-off-by: Sean Anderson <seanga2@gmail.com>
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2 changed files with 71 additions and 2 deletions
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@ -44,4 +44,13 @@ config BOARD_SPECIFIC_OPTIONS
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imply RESET_SYSCON
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imply RESET_SYSCON
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imply SYSRESET
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imply SYSRESET
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imply SYSRESET_SYSCON
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imply SYSRESET_SYSCON
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imply PINCTRL
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imply PINCONF
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imply PINCTRL_K210
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imply DM_GPIO
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imply DWAPB_GPIO
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imply SIFIVE_GPIO
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imply CMD_GPIO
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imply LED
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imply LED_GPIO
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endif
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endif
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@ -199,7 +199,7 @@ To run legacy images, use the ``bootm`` command:
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Load Address: 80000000
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Load Address: 80000000
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Entry Point: 80000000
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Entry Point: 80000000
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$ picocom -b 115200 /dev/ttyUSB0i
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$ picocom -b 115200 /dev/ttyUSB0
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=> loady
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=> loady
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## Ready for binary (ymodem) download to 0x80000000 at 115200 bps...
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## Ready for binary (ymodem) download to 0x80000000 at 115200 bps...
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C
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C
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@ -230,6 +230,66 @@ To run legacy images, use the ``bootm`` command:
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argv[0] = "<NULL>"
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argv[0] = "<NULL>"
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Hit any key to exit ...
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Hit any key to exit ...
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Pin Assignment
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--------------
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The K210 contains a Fully Programmable I/O Array (FPIOA), which can remap any of
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its 256 input functions to any any of 48 output pins. The following table has
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the default pin assignments for the BitM.
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===== ========== =======
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Pin Function Comment
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===== ========== =======
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IO_0 JTAG_TCLK
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IO_1 JTAG_TDI
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IO_2 JTAG_TMS
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IO_3 JTAG_TDO
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IO_4 UARTHS_RX
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IO_5 UARTHS_TX
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IO_6 Not set
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IO_7 Not set
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IO_8 GPIO_0
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IO_9 GPIO_1
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IO_10 GPIO_2
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IO_11 GPIO_3
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IO_12 GPIO_4 Green LED
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IO_13 GPIO_5 Red LED
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IO_14 GPIO_6 Blue LED
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IO_15 GPIO_7
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IO_16 GPIOHS_0 ISP
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IO_17 GPIOHS_1
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IO_18 I2S0_SCLK MIC CLK
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IO_19 I2S0_WS MIC WS
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IO_20 I2S0_IN_D0 MIC SD
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IO_21 GPIOHS_5
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IO_22 GPIOHS_6
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IO_23 GPIOHS_7
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IO_24 GPIOHS_8
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IO_25 GPIOHS_9
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IO_26 SPI1_D1 MMC MISO
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IO_27 SPI1_SCLK MMC CLK
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IO_28 SPI1_D0 MMC MOSI
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IO_29 GPIOHS_13 MMC CS
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IO_30 GPIOHS_14
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IO_31 GPIOHS_15
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IO_32 GPIOHS_16
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IO_33 GPIOHS_17
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IO_34 GPIOHS_18
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IO_35 GPIOHS_19
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IO_36 GPIOHS_20 Panel CS
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IO_37 GPIOHS_21 Panel RST
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IO_38 GPIOHS_22 Panel DC
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IO_39 SPI0_SCK Panel WR
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IO_40 SCCP_SDA
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IO_41 SCCP_SCLK
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IO_42 DVP_RST
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IO_43 DVP_VSYNC
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IO_44 DVP_PWDN
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IO_45 DVP_HSYNC
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IO_46 DVP_XCLK
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IO_47 DVP_PCLK
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===== ========== =======
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Over- and Under-clocking
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Over- and Under-clocking
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------------------------
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------------------------
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@ -408,7 +468,7 @@ Address Size Description
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0x8801C000 0x1000 riscv priv spec 1.9 config
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0x8801C000 0x1000 riscv priv spec 1.9 config
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0x8801D000 0x2000 flattened device tree (contains only addresses and
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0x8801D000 0x2000 flattened device tree (contains only addresses and
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interrupts)
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interrupts)
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0x8801f000 0x1000 credits
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0x8801F000 0x1000 credits
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========== ========= ===========
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========== ========= ===========
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Links
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Links
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