mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-25 06:00:43 +00:00
Merge branch 'master' of /home/wd/git/u-boot/custodians
This commit is contained in:
Wolfgang Denk
commit
0dcfe3a225
19 changed files with 175 additions and 113 deletions
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@ -33,6 +33,8 @@
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|||
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DECLARE_GLOBAL_DATA_PTR;
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||||
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||||
#if !defined(CFG_FLASH_CFI_DRIVER) /* do not use if CFI driver is configured */
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||||
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||||
#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
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&& !defined(CONFIG_TQM885D)
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# ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
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@ -828,3 +830,5 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
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/*-----------------------------------------------------------------------
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*/
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#endif /* !defined(CFG_FLASH_CFI_DRIVER) */
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@ -37,6 +37,7 @@ static long int dram_size (long int, long int *, long int);
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#define _NOT_USED_ 0xFFFFFFFF
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/* UPM initialization table for SDRAM: 40, 50, 66 MHz CLKOUT @ CAS latency 2, tWR=2 */
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const uint sdram_table[] =
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{
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/*
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@ -63,14 +64,14 @@ const uint sdram_table[] =
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/*
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* Single Write. (Offset 18 in UPMA RAM)
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*/
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0x1F0DFC04, 0xEEABBC00, 0x01B27C04, 0x1FF5FC47, /* last */
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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0x1F0DFC04, 0xEEABBC00, 0x11B77C04, 0xEFFAFC44,
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0x1FF5FC47, /* last */
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_NOT_USED_, _NOT_USED_, _NOT_USED_,
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/*
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* Burst Write. (Offset 20 in UPMA RAM)
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*/
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0x1F0DFC04, 0xEEABBC00, 0x10A77C00, 0xF0AFFC00,
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0xF0AFFC00, 0xE1BAFC04, 0x1FF5FC47, /* last */
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_NOT_USED_,
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0xF0AFFC00, 0xF0AFFC04, 0xE1BAFC44, 0x1FF5FC47, /* last */
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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/*
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@ -83,7 +84,7 @@ const uint sdram_table[] =
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/*
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* Exception. (Offset 3c in UPMA RAM)
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*/
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0x7FFFFC07, /* last */
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0xFFFFFC07, /* last */
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_NOT_USED_, _NOT_USED_, _NOT_USED_,
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};
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@ -183,7 +184,7 @@ long int initdram (int board_type)
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#ifndef CONFIG_CAN_DRIVER
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if ((board_type != 'L') &&
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(board_type != 'M') &&
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(board_type != 'D') ) { /* "L" and "M" type boards have only one bank SDRAM */
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(board_type != 'D') ) { /* only one SDRAM bank on L, M and D modules */
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memctl->memc_or3 = CFG_OR3_PRELIM;
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memctl->memc_br3 = CFG_BR3_PRELIM;
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}
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@ -259,7 +260,7 @@ long int initdram (int board_type)
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#ifndef CONFIG_CAN_DRIVER
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if ((board_type != 'L') &&
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(board_type != 'M') &&
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(board_type != 'D') ) { /* "L" and "M" type boards have only one bank SDRAM */
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(board_type != 'D') ) { /* only one SDRAM bank on L, M and D modules */
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/*
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* Check Bank 1 Memory Size
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* use current column settings
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@ -259,11 +259,8 @@ int get_clocks_866 (void)
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*/
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sccr_reg = immr->im_clkrst.car_sccr;
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sccr_reg &= ~SCCR_EBDF11;
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#if defined(CONFIG_TQM885D)
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if (gd->cpu_clk <= 80000000) {
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#else
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if (gd->cpu_clk <= 66000000) {
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#endif
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sccr_reg |= SCCR_EBDF00; /* bus division factor = 1 */
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gd->bus_clk = gd->cpu_clk;
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} else {
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@ -129,20 +129,21 @@ typedef void (interrupt_handler_t)(void *);
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/*
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* enable common handling for all TQM8xxL/M boards:
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* - CONFIG_TQM8xxM will be defined for all TQM8xxM and TQM885D boards
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* - CONFIG_TQM8xxM will be defined for all TQM8xxM boards
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* - CONFIG_TQM8xxL will be defined for all TQM8xxL _and_ TQM8xxM boards
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* and for the TQM885D board
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*/
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#if defined(CONFIG_TQM823M) || defined(CONFIG_TQM850M) || \
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defined(CONFIG_TQM855M) || defined(CONFIG_TQM860M) || \
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defined(CONFIG_TQM862M) || defined(CONFIG_TQM866M) || \
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defined(CONFIG_TQM885D)
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defined(CONFIG_TQM862M) || defined(CONFIG_TQM866M)
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# ifndef CONFIG_TQM8xxM
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# define CONFIG_TQM8xxM
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# endif
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#endif
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#if defined(CONFIG_TQM823L) || defined(CONFIG_TQM850L) || \
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defined(CONFIG_TQM855L) || defined(CONFIG_TQM860L) || \
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defined(CONFIG_TQM862L) || defined(CONFIG_TQM8xxM)
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defined(CONFIG_TQM862L) || defined(CONFIG_TQM8xxM) || \
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defined(CONFIG_TQM885D)
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# ifndef CONFIG_TQM8xxL
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||||
# define CONFIG_TQM8xxL
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# endif
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|
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|
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@ -224,11 +224,15 @@
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
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#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
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/* use CFI flash driver */
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#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
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#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
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#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
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#define CFG_FLASH_EMPTY_INFO
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#define CFG_FLASH_USE_BUFFER_WRITE 1
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#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
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#define CFG_ENV_IS_IN_FLASH 1
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#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */
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|
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@ -335,7 +335,7 @@
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#else
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#define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
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#endif /* CONFIG_TQM5200_B */
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#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */
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#define CFG_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
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#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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/*
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@ -392,6 +392,7 @@
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*/
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "=> " /* Monitor Command Prompt */
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#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
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#if defined(CONFIG_CMD_KGDB)
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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#else
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|
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@ -192,11 +192,15 @@
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
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#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
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/* use CFI flash driver */
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#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
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#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
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#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
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#define CFG_FLASH_EMPTY_INFO
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#define CFG_FLASH_USE_BUFFER_WRITE 1
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#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
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#define CFG_ENV_IS_IN_FLASH 1
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#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */
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@ -188,15 +188,19 @@
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
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#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
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/* use CFI flash driver */
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#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
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#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
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#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
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#define CFG_FLASH_EMPTY_INFO
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#define CFG_FLASH_USE_BUFFER_WRITE 1
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
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#define CFG_ENV_IS_IN_FLASH 1
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#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
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#define CFG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */
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#define CFG_ENV_SIZE 0x08000 /* Total Size of Environment */
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#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */
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/* Address and size of Redundant Environment Sector */
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|
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@ -179,11 +179,15 @@
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
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#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
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/* use CFI flash driver */
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#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
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#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
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#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
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#define CFG_FLASH_EMPTY_INFO
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#define CFG_FLASH_USE_BUFFER_WRITE 1
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#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
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#define CFG_ENV_IS_IN_FLASH 1
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#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */
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|
|
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|||
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@ -177,15 +177,19 @@
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/*-----------------------------------------------------------------------
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||||
* FLASH organization
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*/
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
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|
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#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
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/* use CFI flash driver */
|
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#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
|
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#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
|
||||
#define CFG_FLASH_EMPTY_INFO
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE 1
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x08000 /* Total Size of Environment */
|
||||
#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */
|
||||
|
||||
/* Address and size of Redundant Environment Sector */
|
||||
|
|
|
|||
|
|
@ -183,11 +183,15 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization
|
||||
*/
|
||||
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
||||
/* use CFI flash driver */
|
||||
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
|
||||
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
|
||||
#define CFG_FLASH_EMPTY_INFO
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE 1
|
||||
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */
|
||||
|
|
|
|||
|
|
@ -217,15 +217,19 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization
|
||||
*/
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
||||
/* use CFI flash driver */
|
||||
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
|
||||
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
|
||||
#define CFG_FLASH_EMPTY_INFO
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE 1
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x08000 /* Total Size of Environment */
|
||||
#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */
|
||||
|
||||
/* Address and size of Redundant Environment Sector */
|
||||
|
|
|
|||
|
|
@ -186,11 +186,15 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization
|
||||
*/
|
||||
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
||||
/* use CFI flash driver */
|
||||
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
|
||||
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
|
||||
#define CFG_FLASH_EMPTY_INFO
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE 1
|
||||
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */
|
||||
|
|
|
|||
|
|
@ -189,11 +189,14 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization
|
||||
*/
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
||||
/* use CFI flash driver */
|
||||
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
|
||||
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
|
||||
#define CFG_FLASH_EMPTY_INFO
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE 1
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
|
||||
|
|
@ -368,7 +371,7 @@
|
|||
*/
|
||||
#define SDRAM_BASE2_PRELIM 0x00000000 /* SDRAM bank #0 */
|
||||
#define SDRAM_BASE3_PRELIM 0x20000000 /* SDRAM bank #1 */
|
||||
#define SDRAM_MAX_SIZE 0x04000000 /* max 64 MB per bank */
|
||||
#define SDRAM_MAX_SIZE 0x08000000 /* max 128 MB per bank */
|
||||
|
||||
/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care) */
|
||||
#define CFG_OR_TIMING_SDRAM 0x00000A00
|
||||
|
|
@ -444,7 +447,10 @@
|
|||
#define CFG_MAMR_9COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
|
||||
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
|
||||
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
|
||||
|
||||
/* 10 column SDRAM */
|
||||
#define CFG_MAMR_10COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
|
||||
MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A9 | \
|
||||
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
|
||||
|
||||
/*
|
||||
* Internal Definitions
|
||||
|
|
|
|||
|
|
@ -186,14 +186,17 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization
|
||||
*/
|
||||
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
||||
/* use CFI flash driver */
|
||||
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
|
||||
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
|
||||
#define CFG_FLASH_EMPTY_INFO
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE 1
|
||||
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
|
||||
#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
|
||||
|
||||
|
|
|
|||
|
|
@ -186,16 +186,19 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization
|
||||
*/
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
||||
/* use CFI flash driver */
|
||||
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
|
||||
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
|
||||
#define CFG_FLASH_EMPTY_INFO
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE 1
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
|
||||
#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x08000 /* Total Size of Environment */
|
||||
#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */
|
||||
|
||||
/* Address and size of Redundant Environment Sector */
|
||||
|
|
|
|||
|
|
@ -232,11 +232,14 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization
|
||||
*/
|
||||
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
||||
/* use CFI flash driver */
|
||||
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
|
||||
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
|
||||
#define CFG_FLASH_EMPTY_INFO
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE 1
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
|
||||
|
|
|
|||
|
|
@ -42,17 +42,10 @@
|
|||
#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz - PLL input clock */
|
||||
#define CFG_8xx_CPUCLK_MIN 15000000 /* 15 MHz - CPU minimum clock */
|
||||
#define CFG_8xx_CPUCLK_MAX 133000000 /* 133 MHz - CPU maximum clock */
|
||||
#define CONFIG_8xx_CPUCLK_DEFAULT 66000000 /* 50 MHz - CPU default clock */
|
||||
#define CONFIG_8xx_CPUCLK_DEFAULT 66000000 /* 66 MHz - CPU default clock */
|
||||
/* (it will be used if there is no */
|
||||
/* 'cpuclk' variable with valid value) */
|
||||
|
||||
#define CFG_MEASURE_CPUCLK /* Measure real cpu clock */
|
||||
/* (function measure_gclk() */
|
||||
/* will be called) */
|
||||
#ifdef CFG_MEASURE_CPUCLK
|
||||
#define CFG_8XX_XIN 10000000 /* measure_gclk() needs this */
|
||||
#endif
|
||||
|
||||
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
|
||||
|
||||
#define CONFIG_BAUDRATE 115200 /* console baudrate = 115kbps */
|
||||
|
|
@ -83,9 +76,15 @@
|
|||
"bootm ${kernel_addr} ${ramdisk_addr}\0" \
|
||||
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
|
||||
"rootpath=/opt/eldk/ppc_8xx\0" \
|
||||
"bootfile=/tftpboot/TQM866M/uImage\0" \
|
||||
"kernel_addr=40080000\0" \
|
||||
"ramdisk_addr=40180000\0" \
|
||||
"bootfile=/tftpboot/TQM885D/uImage\0" \
|
||||
"fdt_addr=400C0000\0" \
|
||||
"kernel_addr=40100000\0" \
|
||||
"ramdisk_addr=40280000\0" \
|
||||
"load=tftp 200000 ${u-boot}\0" \
|
||||
"update=protect off 40000000 +${filesize};" \
|
||||
"erase 40000000 +${filesize};" \
|
||||
"cp.b 200000 40000000 ${filesize};" \
|
||||
"protect on 40000000 +${filesize}\0" \
|
||||
""
|
||||
#define CONFIG_BOOTCOMMAND "run flash_self"
|
||||
|
||||
|
|
@ -144,7 +143,7 @@
|
|||
#define CONFIG_MAC_PARTITION
|
||||
#define CONFIG_DOS_PARTITION
|
||||
|
||||
#undef CONFIG_RTC_MPC8xx /* MPC866 does not support RTC */
|
||||
#undef CONFIG_RTC_MPC8xx /* MPC885 does not support RTC */
|
||||
|
||||
#define CONFIG_TIMESTAMP /* but print image timestmps */
|
||||
|
||||
|
|
@ -230,7 +229,7 @@
|
|||
#define CFG_FLASH_BASE 0x40000000
|
||||
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
|
||||
#define CFG_MONITOR_BASE CFG_FLASH_BASE
|
||||
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
|
||||
#define CFG_MALLOC_LEN (256 << 10) /* Reserve 128 kB for malloc() */
|
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data
|
||||
|
|
@ -242,16 +241,20 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization
|
||||
*/
|
||||
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
||||
/* use CFI flash driver */
|
||||
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
|
||||
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
|
||||
#define CFG_FLASH_EMPTY_INFO
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE 1
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x08000 /* Total Size of Environment */
|
||||
#define CFG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */
|
||||
|
||||
/* Address and size of Redundant Environment Sector */
|
||||
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE)
|
||||
|
|
@ -434,26 +437,30 @@
|
|||
#define CFG_PTA_PER_CLK ((4096 * 64 * 1000) / (4 * 64))
|
||||
|
||||
/*
|
||||
* Memory Periodic Timer Prescaler
|
||||
* Periodic timer for refresh, start with refresh rate for 40 MHz clock
|
||||
* (CFG_8xx_CPUCLK_MIN / CFG_PTA_PER_CLK)
|
||||
* Periodic timer (MAMR[PTx]) for 4 * 7.8 us refresh (= 31.2 us per quad)
|
||||
*
|
||||
* CPUclock(MHz) * 31.2
|
||||
* CFG_MAMR_PTA = ----------------------------------- with DFBRG = 0
|
||||
* 2^(2*SCCR[DFBRG]) * MPTPR_PTP_DIV16
|
||||
*
|
||||
* CPU clock = 15 MHz: CFG_MAMR_PTA = 29 -> 4 * 7.73 us
|
||||
* CPU clock = 50 MHz: CFG_MAMR_PTA = 97 -> 4 * 7.76 us
|
||||
* CPU clock = 66 MHz: CFG_MAMR_PTA = 128 -> 4 * 7.75 us
|
||||
* CPU clock = 133 MHz: CFG_MAMR_PTA = 255 -> 4 * 7.67 us
|
||||
*
|
||||
* Value 97 is for 4 * 7.8 us at 50 MHz. So the refresh cycle requirement will
|
||||
* be met also in the default configuration, i.e. if environment variable
|
||||
* 'cpuclk' is not set.
|
||||
*/
|
||||
#define CFG_MAMR_PTA 39
|
||||
#define CFG_MAMR_PTA 128
|
||||
|
||||
/*
|
||||
* For 16 MBit, refresh rates could be 31.3 us
|
||||
* (= 64 ms / 2K = 125 / quad bursts).
|
||||
* For a simpler initialization, 15.6 us is used instead.
|
||||
*
|
||||
* #define CFG_MPTPR_2BK_2K MPTPR_PTP_DIV32 for 2 banks
|
||||
* #define CFG_MPTPR_1BK_2K MPTPR_PTP_DIV64 for 1 bank
|
||||
* Memory Periodic Timer Prescaler Register (MPTPR) values.
|
||||
*/
|
||||
#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16 /* setting for 2 banks */
|
||||
#define CFG_MPTPR_1BK_4K MPTPR_PTP_DIV32 /* setting for 1 bank */
|
||||
|
||||
/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit */
|
||||
#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8 /* setting for 2 banks */
|
||||
#define CFG_MPTPR_1BK_8K MPTPR_PTP_DIV16 /* setting for 1 bank */
|
||||
/* 4 * 7.8 us refresh (= 31.2 us per quad) at 50 MHz and PTA = 97 */
|
||||
#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16
|
||||
/* 4 * 3.9 us refresh (= 15.6 us per quad) at 50 MHz and PTA = 97 */
|
||||
#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8
|
||||
|
||||
/*
|
||||
* MAMR settings for SDRAM
|
||||
|
|
|
|||
|
|
@ -193,11 +193,15 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization
|
||||
*/
|
||||
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
||||
/* use CFI flash driver */
|
||||
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
|
||||
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
|
||||
#define CFG_FLASH_EMPTY_INFO
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE 1
|
||||
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */
|
||||
|
|
|
|||
Loading…
Reference in a new issue