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https://github.com/AsahiLinux/u-boot
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Merge branch 'fpga' of git://www.denx.de/git/u-boot-microblaze
This commit is contained in:
commit
0daa1f6985
3 changed files with 14 additions and 1 deletions
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@ -20,6 +20,7 @@ Xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
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Xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
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Xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
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Xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
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Xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);
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#endif
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int board_init(void)
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@ -42,6 +43,9 @@ int board_init(void)
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case XILINX_ZYNQ_7045:
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fpga = fpga045;
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break;
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case XILINX_ZYNQ_7100:
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fpga = fpga100;
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break;
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}
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#endif
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@ -23,6 +23,7 @@
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#define DEVCFG_STATUS_DMA_CMD_Q_E 0x40000000
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#define DEVCFG_STATUS_DMA_DONE_CNT_MASK 0x30000000
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#define DEVCFG_STATUS_PCFG_INIT 0x00000010
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#define DEVCFG_MCTRL_PCAP_LPBK 0x00000010
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#define DEVCFG_MCTRL_RFIFO_FLUSH 0x00000002
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#define DEVCFG_MCTRL_WFIFO_FLUSH 0x00000001
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@ -31,7 +32,7 @@
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#endif
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#ifndef CONFIG_SYS_FPGA_PROG_TIME
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#define CONFIG_SYS_FPGA_PROG_TIME CONFIG_SYS_HZ /* 1 s */
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#define CONFIG_SYS_FPGA_PROG_TIME (CONFIG_SYS_HZ * 4) /* 4 s */
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#endif
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int zynq_info(Xilinx_desc *desc)
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@ -200,6 +201,9 @@ int zynq_load(Xilinx_desc *desc, const void *buf, size_t bsize)
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swap = SWAP_DONE;
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}
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/* Clear loopback bit */
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clrbits_le32(&devcfg_base->mctrl, DEVCFG_MCTRL_PCAP_LPBK);
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if (!partialbit) {
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zynq_slcr_devcfg_disable();
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@ -20,12 +20,14 @@ extern int zynq_info(Xilinx_desc *desc);
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#define XILINX_ZYNQ_7020 0x7
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#define XILINX_ZYNQ_7030 0xc
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#define XILINX_ZYNQ_7045 0x11
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#define XILINX_ZYNQ_7100 0x16
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/* Device Image Sizes */
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#define XILINX_XC7Z010_SIZE 16669920/8
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#define XILINX_XC7Z020_SIZE 32364512/8
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#define XILINX_XC7Z030_SIZE 47839328/8
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#define XILINX_XC7Z045_SIZE 106571232/8
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#define XILINX_XC7Z100_SIZE 139330784/8
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/* Descriptor Macros */
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#define XILINX_XC7Z010_DESC(cookie) \
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@ -40,4 +42,7 @@ extern int zynq_info(Xilinx_desc *desc);
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#define XILINX_XC7Z045_DESC(cookie) \
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{ xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, "7z045" }
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#define XILINX_XC7Z100_DESC(cookie) \
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{ xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, "7z100" }
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#endif /* _ZYNQPL_H_ */
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