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https://github.com/AsahiLinux/u-boot
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Convert CONFIG_ARMV7_SECURE_BASE et al to Kconfig
This converts the following to Kconfig: CONFIG_ARMV7_SECURE_BASE CONFIG_ARMV7_SECURE_MAX_SIZE CONFIG_ARMV7_SECURE_RESERVE_SIZE Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
parent
eb8eb31749
commit
0da35fa8d6
24 changed files with 41 additions and 54 deletions
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@ -27,6 +27,37 @@ config ARMV7_BOOT_SEC_DEFAULT
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This can be overridden at run-time by setting the bootm_boot_mode env.
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variable to "sec" or "nonsec".
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config HAS_ARMV7_SECURE_BASE
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bool "Enable support for a ahardware secure memory area"
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default y if ARCH_LS1021A || ARCH_MX7 || ARCH_MX7ULP || ARCH_STM32MP \
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|| MACH_SUN6I || MACH_SUN7I || MACH_SUN8I || TEGRA124
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config ARMV7_SECURE_BASE
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hex "Base address for secure mode memory"
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depends on HAS_ARMV7_SECURE_BASE
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default 0xfff00000 if TEGRA124
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default 0x2ffc0000 if ARCH_STM32MP
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default 0x2f000000 if ARCH_MX7ULP
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default 0x10010000 if ARCH_LS1021A
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default 0x00900000 if ARCH_MX7
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default 0x00044000 if MACH_SUN8I
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default 0x00020000 if MACH_SUN6I || MACH_SUN7I
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config ARMV7_SECURE_RESERVE_SIZE
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hex
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depends on TEGRA124 && HAS_ARMV7_SECURE_BASE
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default 0x100000
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help
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Reserve top 1M for secure RAM
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config ARMV7_SECURE_MAX_SIZE
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hex
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depends on ARMV7_SECURE_BASE && ARCH_STM32MP || MACH_SUN6I \
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|| MACH_SUN7I || MACH_SUN8I
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default 0xbc00 if MACH_SUN8I && !MACH_SUN8I_H3
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default 0x3c00 if MACH_SUN8I && MACH_SUN8I_H3
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default 0x10000
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config ARMV7_VIRT
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bool "Enable support for hardware virtualization" if EXPERT
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depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
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@ -9,6 +9,7 @@ CONFIG_MMC0_CD_PIN="PH13"
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CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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CONFIG_USB1_VBUS_PIN="PH23"
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CONFIG_USB2_VBUS_PIN="PH23"
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# CONFIG_HAS_ARMV7_SECURE_BASE is not set
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_I2C=y
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@ -4,4 +4,5 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero"
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CONFIG_SPL=y
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CONFIG_MACH_SUN8I_V3S=y
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CONFIG_DRAM_CLK=360
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# CONFIG_HAS_ARMV7_SECURE_BASE is not set
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# CONFIG_NETDEVICES is not set
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@ -6,6 +6,7 @@ CONFIG_MACH_SUN8I_R40=y
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CONFIG_DRAM_CLK=576
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CONFIG_MMC0_CD_PIN="PH13"
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CONFIG_USB1_VBUS_PIN="PH23"
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# CONFIG_HAS_ARMV7_SECURE_BASE is not set
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_I2C=y
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@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0xC0000
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk"
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CONFIG_TARGET_MX7ULP_EVK=y
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# CONFIG_HAS_ARMV7_SECURE_BASE is not set
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CONFIG_SYS_LOAD_ADDR=0x60800000
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_USE_BOOTCOMMAND=y
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@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0xC0000
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk"
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CONFIG_TARGET_MX7ULP_EVK=y
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# CONFIG_HAS_ARMV7_SECURE_BASE is not set
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CONFIG_SYS_LOAD_ADDR=0x60800000
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CONFIG_USE_BOOTCOMMAND=y
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CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi"
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@ -21,6 +21,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1"
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CONFIG_BOOTCOUNT_BOOTLIMIT=3
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CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020
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CONFIG_SYS_CLK_FREQ=66666666
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# CONFIG_HAS_ARMV7_SECURE_BASE is not set
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CONFIG_AHCI=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_SYS_LOAD_ADDR=0x82000000
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@ -19,6 +19,7 @@ CONFIG_SYS_I2C_MXC_I2C3=y
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CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1"
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CONFIG_BOOTCOUNT_BOOTLIMIT=3
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CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020
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# CONFIG_HAS_ARMV7_SECURE_BASE is not set
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CONFIG_AHCI=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_SYS_LOAD_ADDR=0x82000000
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@ -21,6 +21,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8"
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CONFIG_BOOTCOUNT_BOOTLIMIT=3
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CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020
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CONFIG_SYS_CLK_FREQ=66666666
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# CONFIG_HAS_ARMV7_SECURE_BASE is not set
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CONFIG_AHCI=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_SYS_LOAD_ADDR=0x82000000
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@ -19,6 +19,7 @@ CONFIG_SYS_I2C_MXC_I2C3=y
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CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8"
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CONFIG_BOOTCOUNT_BOOTLIMIT=3
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CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020
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# CONFIG_HAS_ARMV7_SECURE_BASE is not set
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CONFIG_AHCI=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_SYS_LOAD_ADDR=0x82000000
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@ -7,6 +7,7 @@ CONFIG_SUNXI_DRAM_DDR3_1333=y
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CONFIG_DRAM_CLK=504
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CONFIG_DRAM_ODT_EN=y
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CONFIG_I2C0_ENABLE=y
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# CONFIG_HAS_ARMV7_SECURE_BASE is not set
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CONFIG_SPL_I2C=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_SYS_I2C_MVTWSI=y
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@ -114,8 +114,4 @@
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#include "tegra-common-usb-gadget.h"
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#include "tegra-common-post.h"
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/* Reserve top 1M for secure RAM */
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#define CONFIG_ARMV7_SECURE_BASE 0xfff00000
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#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000
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#endif /* __CONFIG_H */
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@ -28,8 +28,4 @@
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#include "tegra-common-usb-gadget.h"
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#include "tegra-common-post.h"
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/* Reserve top 1M for secure RAM */
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#define CONFIG_ARMV7_SECURE_BASE 0xfff00000
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#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000
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#endif /* __CONFIG_H */
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@ -26,8 +26,4 @@
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#include "tegra-common-usb-gadget.h"
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#include "tegra-common-post.h"
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/* Reserve top 1M for secure RAM */
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#define CONFIG_ARMV7_SECURE_BASE 0xfff00000
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#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000
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#endif /* __CONFIG_H */
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@ -7,8 +7,6 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
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#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
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@ -7,8 +7,6 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
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#define CONFIG_DEEP_SLEEP
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#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR
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@ -6,8 +6,6 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
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#define CONFIG_DEEP_SLEEP
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#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR
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@ -7,8 +7,6 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
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#define CONFIG_DEEP_SLEEP
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#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR
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@ -31,8 +31,6 @@
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/* MMC */
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#define CONFIG_ARMV7_SECURE_BASE 0x00900000
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/*
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* If we have defined the OPTEE ram size and not OPTEE it means that we were
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* launched by OPTEE, because of that we shall skip all the low level
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@ -70,7 +70,5 @@
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#define CONFIG_ARMV7_SECURE_BASE 0x2F000000
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#endif /* __CONFIG_H */
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@ -10,12 +10,6 @@
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#include <linux/sizes.h>
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#include <asm/arch/stm32.h>
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#ifdef CONFIG_ARMV7_PSCI
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/* PSCI support */
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#define CONFIG_ARMV7_SECURE_BASE STM32_SYSRAM_BASE
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#define CONFIG_ARMV7_SECURE_MAX_SIZE STM32_SYSRAM_SIZE
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#endif
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/*
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* Configuration of the external SRAM memory used by U-Boot
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*/
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@ -10,13 +10,6 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* A31 specific configuration
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*/
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#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
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#define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */
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/*
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* Include common sunxi configuration where most the settings are
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*/
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@ -8,13 +8,6 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* A20 specific configuration
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*/
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#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
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#define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */
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/*
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* Include common sunxi configuration where most the settings are
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*/
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@ -14,16 +14,6 @@
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#include <asm/arch/cpu.h>
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#ifdef SUNXI_SRAM_A2_SIZE
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/*
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* If the SoC has enough SRAM A2, use that for the secure monitor.
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* Skip the first 16 KiB of SRAM A2, which is not usable, as only certain bytes
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* are writable. Reserve the last 17 KiB for the resume shim and SCP firmware.
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*/
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#define CONFIG_ARMV7_SECURE_BASE (SUNXI_SRAM_A2_BASE + 16 * 1024)
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#define CONFIG_ARMV7_SECURE_MAX_SIZE (SUNXI_SRAM_A2_SIZE - 33 * 1024)
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#endif
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/*
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* Include common sunxi configuration where most the settings are
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*/
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