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https://github.com/AsahiLinux/u-boot
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omap3: evm: Update board, defconfig, and maintainer file
This patch brings the OMAP3 EVM to a bootable state, on master, as of v2017.09-rc1. Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Derald D. Woods
Tom Rini
parent
00fd59dd1a
commit
0d43fded20
5 changed files with 245 additions and 349 deletions
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@ -1,5 +1,5 @@
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EVM BOARD
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M: Tom Rini <trini@konsulko.com>
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M: Derald D. Woods <woods.technical@gmail.com>
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S: Maintained
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F: board/ti/evm/
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F: include/configs/omap3_evm.h
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@ -12,6 +12,8 @@
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <ns16550.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include <asm/arch/mem.h>
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@ -22,14 +24,35 @@
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#include <i2c.h>
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#include <twl4030.h>
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#include <asm/mach-types.h>
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#include <asm/omap_musb.h>
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#include <linux/mtd/nand.h>
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#include <linux/usb/ch9.h>
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#include <linux/usb/gadget.h>
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#include <linux/usb/musb.h>
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#include "evm.h"
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#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
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#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
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#ifdef CONFIG_USB_EHCI_HCD
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#include <usb.h>
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#include <asm/ehci-omap.h>
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#endif
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#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
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#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
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DECLARE_GLOBAL_DATA_PTR;
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static const struct ns16550_platdata omap3_evm_serial = {
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.base = OMAP34XX_UART1,
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.reg_shift = 2,
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.clock = V_NS16550_CLK,
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.fcr = UART_FCR_DEFVAL,
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};
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U_BOOT_DEVICE(omap3_evm_uart) = {
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"ns16550_serial",
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&omap3_evm_serial
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};
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static u32 omap3_evm_version;
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u32 get_omap3_evm_rev(void)
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@ -60,25 +83,19 @@ static void omap3_evm_get_revision(void)
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default:
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omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
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}
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#else
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#else /* !CONFIG_CMD_NET */
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#if defined(CONFIG_STATIC_BOARD_REV)
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/*
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* Look for static defintion of the board revision
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*/
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/* Look for static defintion of the board revision */
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omap3_evm_version = CONFIG_STATIC_BOARD_REV;
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#else
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/*
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* Fallback to the default above.
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*/
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/* Fallback to the default above */
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omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
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#endif
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#endif /* CONFIG_CMD_NET */
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#endif /* CONFIG_STATIC_BOARD_REV */
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#endif /* CONFIG_CMD_NET */
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}
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#ifdef CONFIG_USB_OMAP3
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/*
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* MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
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*/
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#if defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST)
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/* MUSB port on OMAP3EVM Rev >= E requires extvbus programming. */
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u8 omap3_evm_need_extvbus(void)
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{
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u8 retval = 0;
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@ -88,7 +105,7 @@ u8 omap3_evm_need_extvbus(void)
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return retval;
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}
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#endif
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#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
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/*
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* Routine: board_init
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@ -105,7 +122,7 @@ int board_init(void)
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return 0;
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}
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#ifdef CONFIG_SPL_BUILD
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#if defined(CONFIG_SPL_BUILD)
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/*
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* Routine: get_board_mem_timings
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* Description: If we use SPL then there is no x-loader nor config header
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@ -138,7 +155,34 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
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timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
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timings->mr = MICRON_V_MR_165;
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}
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#endif
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#endif /* CONFIG_SPL_BUILD */
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#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
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static struct musb_hdrc_config musb_config = {
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.multipoint = 1,
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.dyn_fifo = 1,
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.num_eps = 16,
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.ram_bits = 12,
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};
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static struct omap_musb_board_data musb_board_data = {
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.interface_type = MUSB_INTERFACE_ULPI,
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};
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static struct musb_hdrc_platform_data musb_plat = {
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#if defined(CONFIG_USB_MUSB_HOST)
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.mode = MUSB_HOST,
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#elif defined(CONFIG_USB_MUSB_GADGET)
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.mode = MUSB_PERIPHERAL,
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#else
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#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
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#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
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.config = &musb_config,
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.power = 100,
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.platform_ops = &omap2430_ops,
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.board_data = &musb_board_data,
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};
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#endif /* CONFIG_USB_MUSB_OMAP2PLUS */
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/*
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* Routine: misc_init_r
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@ -146,6 +190,7 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
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*/
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int misc_init_r(void)
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{
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twl4030_power_init();
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#ifdef CONFIG_SYS_I2C_OMAP24XX
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i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
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@ -161,6 +206,13 @@ int misc_init_r(void)
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#endif
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omap_die_id_display();
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#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
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musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
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#endif
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#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
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omap_die_id_usbethaddr();
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#endif
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return 0;
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}
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@ -175,7 +227,7 @@ void set_muxconf_regs(void)
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MUX_EVM();
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}
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#ifdef CONFIG_CMD_NET
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#if defined(CONFIG_CMD_NET)
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/*
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* Routine: setup_net_chip
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* Description: Setting up the configuration GPMC registers specific to the
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@ -237,7 +289,7 @@ static void reset_net_chip(void)
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC911X
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#if defined(CONFIG_SMC911X)
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#define STR_ENV_ETHADDR "ethaddr"
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struct eth_device *dev;
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@ -254,7 +306,7 @@ int board_eth_init(bd_t *bis)
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rc = -1;
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}
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}
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#endif
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#endif /* CONFIG_SMC911X */
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return rc;
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}
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#endif /* CONFIG_CMD_NET */
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@ -264,11 +316,35 @@ int board_mmc_init(bd_t *bis)
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{
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return omap_mmc_init(0, 0, 0, -1, -1);
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}
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#endif
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#if defined(CONFIG_MMC)
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void board_mmc_power_init(void)
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{
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twl4030_power_mmc_init(0);
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}
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#endif
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#endif /* CONFIG_MMC */
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#if defined(CONFIG_USB_EHCI_HCD)
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static struct omap_usbhs_board_data usbhs_bdata = {
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.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
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.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
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.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
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};
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int ehci_hcd_init(int index, enum usb_init_type init,
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struct ehci_hccr **hccr, struct ehci_hcor **hcor)
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{
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return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
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}
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int ehci_hcd_stop(int index)
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{
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return omap_ehci_hcd_stop();
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}
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#endif /* CONFIG_USB_EHCI_HCD */
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#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) && !defined(CONFIG_CMD_NET)
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int board_eth_init(bd_t *bis)
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{
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return usb_eth_initialize(bis);
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}
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#endif /* CONFIG_USB_ETHER */
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@ -278,12 +278,19 @@ static void reset_net_chip(void);
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/* TS_PEN_IRQ */\
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MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176*/\
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/* - LAN_INTR*/\
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MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M0)) /*McSPI1_CS3*/\
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MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) /*McSPI2_CLK*/\
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MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) /*McSPI2_SIMO*/\
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MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) /*McSPI2_SOMI*/\
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MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M0)) /*McSPI2_CS0*/\
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MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)) /*McSPI2_CS1*/\
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/* USB EHCI (port 2) */\
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MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M3)) /*HSUSB2_DATA2*/\
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MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | EN | M3)) /*HSUSB2_DATA7*/\
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MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | EN | M3)) /*HSUSB2_DATA4*/\
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MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | EN | M3)) /*HSUSB2_DATA5*/\
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MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M3)) /*HSUSB2_DATA6*/\
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MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M3)) /*HSUSB2_DATA3*/\
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MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\
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MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\
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MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_DIR*/\
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MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_NXT*/\
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MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_DATA0*/\
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MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_DATA1*/\
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/*Control and debug */\
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MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\
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MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\
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@ -318,12 +325,6 @@ static void reset_net_chip(void);
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MUX_VAL(CP(ETK_D7_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D7*/\
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MUX_VAL(CP(ETK_D8_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D8*/\
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MUX_VAL(CP(ETK_D9_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D9*/\
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MUX_VAL(CP(ETK_D10_ES2), (IEN | PTD | DIS | M0)) /*ETK_D10*/\
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MUX_VAL(CP(ETK_D11_ES2), (IEN | PTD | DIS | M0)) /*ETK_D11*/\
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MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M0)) /*ETK_D12*/\
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MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M0)) /*ETK_D13*/\
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MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M0)) /*ETK_D14*/\
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MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M0)) /*ETK_D15*/\
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/*Die to Die */\
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MUX_VAL(CP(D2D_MCAD1), (IEN | PTD | EN | M0)) /*d2d_mcad1*/\
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MUX_VAL(CP(D2D_MCAD2), (IEN | PTD | EN | M0)) /*d2d_mcad2*/\
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@ -2,32 +2,61 @@ CONFIG_ARM=y
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# CONFIG_SYS_THUMB_BUILD is not set
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CONFIG_ARCH_OMAP2PLUS=y
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CONFIG_SYS_TEXT_BASE=0x80100000
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_SYS_MPUCLK=720
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CONFIG_TARGET_OMAP3_EVM=y
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CONFIG_SPL_STACK_R_ADDR=0x82000000
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_SYS_EXTRA_OPTIONS="NAND"
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CONFIG_ENV_IS_IN_NAND=y
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CONFIG_BOOTDELAY=3
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb"
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CONFIG_VERSION_VARIABLE=y
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CONFIG_SPL=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_STACK_R=y
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# CONFIG_SPL_EXT_SUPPORT is not set
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CONFIG_HUSH_PARSER=y
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CONFIG_SPL_MTD_SUPPORT=y
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CONFIG_SYS_PROMPT="OMAP3_EVM # "
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# CONFIG_CMD_IMI is not set
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_ASKENV=y
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_FPGA is not set
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_NAND_TRIMFFS=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_FPGA is not set
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_JFFS2=y
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CONFIG_EFI_PARTITION=y
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# CONFIG_PARTITION_UUIDS is not set
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# CONFIG_SPL_PARTITION_UUIDS is not set
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FS_UUID=y
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CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
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CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(spl),1792k(u-boot),128k(dtb),128k(u-boot-env),6m(kernel),-(rootfs)"
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CONFIG_CMD_UBI=y
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# CONFIG_ISO_PARTITION is not set
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# CONFIG_EFI_PARTITION is not set
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CONFIG_SPL_PARTITION_UUIDS=y
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CONFIG_DM=y
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CONFIG_SPL_DM=y
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CONFIG_DM_GPIO=y
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CONFIG_MMC_OMAP_HS=y
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CONFIG_MTD=y
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CONFIG_DM_SERIAL=y
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CONFIG_SYS_NS16550=y
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CONFIG_USB=y
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CONFIG_USB_STORAGE=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_MUSB_GADGET=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_DOWNLOAD=y
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CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
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CONFIG_G_DNL_VENDOR_NUM=0x0451
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CONFIG_G_DNL_PRODUCT_NUM=0x5678
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CONFIG_FAT_WRITE=y
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CONFIG_OF_LIBFDT=y
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CONFIG_OF_LIBFDT_OVERLAY=y
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CONFIG_SPL_OF_LIBFDT=y
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# CONFIG_EFI_LOADER is not set
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@ -14,348 +14,138 @@
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __OMAP3EVM_CONFIG_H
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#define __OMAP3EVM_CONFIG_H
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/cpu.h>
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#include <asm/arch/omap.h>
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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/* ----------------------------------------------------------------------------
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* Supported U-Boot features
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* ----------------------------------------------------------------------------
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*/
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#define CONFIG_SYS_LONGHELP
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/* Allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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/* Add auto-completion support */
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#define CONFIG_AUTO_COMPLETE
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/* ----------------------------------------------------------------------------
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* Supported hardware
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* ----------------------------------------------------------------------------
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*/
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/* SPL */
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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/* Partition tables */
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/* USB
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*
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* Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
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* Enable CONFIG_USB_MUSB_UDD for Device functionalities.
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*/
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#define CONFIG_USB_OMAP3
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#define CONFIG_USB_MUSB_HCD
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/* #define CONFIG_USB_MUSB_UDC */
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/* NAND SPL */
|
||||
#define CONFIG_SPL_NAND_SIMPLE
|
||||
#define CONFIG_SPL_NAND_BASE
|
||||
#define CONFIG_SPL_NAND_DRIVERS
|
||||
#define CONFIG_SPL_NAND_ECC
|
||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
|
||||
#define CONFIG_SYS_NAND_PAGE_COUNT 64
|
||||
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
|
||||
#define CONFIG_SYS_NAND_OOBSIZE 64
|
||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
|
||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
|
||||
#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
|
||||
10, 11, 12, 13}
|
||||
#define CONFIG_SYS_NAND_ECCSIZE 512
|
||||
#define CONFIG_SYS_NAND_ECCBYTES 3
|
||||
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
|
||||
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
|
||||
#include <configs/ti_omap3_common.h>
|
||||
|
||||
/*
|
||||
* High level configuration options
|
||||
* We are only ever GP parts and will utilize all of the "downloaded image"
|
||||
* area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
|
||||
*/
|
||||
#undef CONFIG_SPL_TEXT_BASE
|
||||
#define CONFIG_SPL_TEXT_BASE 0x40200000
|
||||
|
||||
#define CONFIG_SDRC /* The chip has SDRC controller */
|
||||
|
||||
/*
|
||||
* Clock related definitions
|
||||
*/
|
||||
#define V_OSCK 26000000 /* Clock output from T2 */
|
||||
#define V_SCLK (V_OSCK >> 1)
|
||||
|
||||
/*
|
||||
* OMAP3 has 12 GP timers, they can be driven by the system clock
|
||||
* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
|
||||
* This rate is divided by a local divisor.
|
||||
*/
|
||||
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
|
||||
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
|
||||
|
||||
/* Size of environment - 128KB */
|
||||
#define CONFIG_ENV_SIZE (128 << 10)
|
||||
|
||||
/* Size of malloc pool */
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
|
||||
|
||||
/*
|
||||
* Physical Memory Map
|
||||
* Note 1: CS1 may or may not be populated
|
||||
* Note 2: SDRAM size is expected to be at least 32MB
|
||||
*/
|
||||
#define CONFIG_NR_DRAM_BANKS 2
|
||||
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
|
||||
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
|
||||
|
||||
/* Limits for memtest */
|
||||
#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
|
||||
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
|
||||
0x01F00000) /* 31MB */
|
||||
|
||||
/* Default load address */
|
||||
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
|
||||
|
||||
/* -----------------------------------------------------------------------------
|
||||
* Hardware drivers
|
||||
* -----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*
|
||||
* NS16550 Configuration
|
||||
*/
|
||||
#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
|
||||
|
||||
#define CONFIG_SYS_NS16550_SERIAL
|
||||
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
|
||||
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
|
||||
|
||||
/*
|
||||
* select serial console configuration
|
||||
*/
|
||||
#define CONFIG_CONS_INDEX 1
|
||||
#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
|
||||
#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
|
||||
115200}
|
||||
|
||||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
|
||||
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
|
||||
|
||||
/*
|
||||
* PISMO support
|
||||
*/
|
||||
/* Monitor at start of flash - Reserve 2 sectors */
|
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
|
||||
|
||||
#define CONFIG_SYS_MONITOR_LEN (256 << 10)
|
||||
|
||||
/* Start location & size of environment */
|
||||
#define ONENAND_ENV_OFFSET 0x260000
|
||||
#define SMNAND_ENV_OFFSET 0x260000
|
||||
|
||||
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
|
||||
|
||||
/*
|
||||
* NAND
|
||||
*/
|
||||
/* Physical address to access NAND */
|
||||
#define CONFIG_SYS_NAND_ADDR NAND_BASE
|
||||
|
||||
/* Physical address to access NAND at CS0 */
|
||||
#define CONFIG_SYS_NAND_BASE NAND_BASE
|
||||
|
||||
/* Max number of NAND devices */
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
|
||||
/* Timeout values (in ticks) */
|
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
|
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
|
||||
|
||||
/* Flash banks JFFS2 should use */
|
||||
#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
|
||||
CONFIG_SYS_MAX_NAND_DEVICE)
|
||||
|
||||
#define CONFIG_SYS_JFFS2_MEM_NAND
|
||||
#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
|
||||
#define CONFIG_SYS_JFFS2_NUM_BANKS 1
|
||||
|
||||
#define CONFIG_JFFS2_NAND
|
||||
/* nand device jffs2 lives on */
|
||||
#define CONFIG_JFFS2_DEV "nand0"
|
||||
/* Start of jffs2 partition */
|
||||
#define CONFIG_JFFS2_PART_OFFSET 0x680000
|
||||
/* Size of jffs2 partition */
|
||||
#define CONFIG_JFFS2_PART_SIZE 0xf980000
|
||||
|
||||
/*
|
||||
* USB
|
||||
*/
|
||||
#ifdef CONFIG_USB_OMAP3
|
||||
|
||||
#ifdef CONFIG_USB_MUSB_HCD
|
||||
|
||||
#ifdef CONFIG_USB_KEYBOARD
|
||||
#define CONFIG_SYS_USB_EVENT_POLL
|
||||
#define CONFIG_PREBOOT "usb start"
|
||||
#endif /* CONFIG_USB_KEYBOARD */
|
||||
|
||||
#endif /* CONFIG_USB_MUSB_HCD */
|
||||
|
||||
#ifdef CONFIG_USB_MUSB_UDC
|
||||
/* USB device configuration */
|
||||
#define CONFIG_USB_DEVICE
|
||||
#define CONFIG_USB_TTY
|
||||
|
||||
/* Change these to suit your needs */
|
||||
#define CONFIG_USBD_VENDORID 0x0451
|
||||
#define CONFIG_USBD_PRODUCTID 0x5678
|
||||
#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
|
||||
#define CONFIG_USBD_PRODUCT_NAME "EVM"
|
||||
#endif /* CONFIG_USB_MUSB_UDC */
|
||||
|
||||
#endif /* CONFIG_USB_OMAP3 */
|
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* U-Boot features
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max args for a command */
|
||||
#define CONFIG_SPL_FRAMEWORK
|
||||
|
||||
#define CONFIG_MISC_INIT_R
|
||||
|
||||
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
|
||||
#define CONFIG_CMDLINE_TAG
|
||||
#define CONFIG_SETUP_MEMORY_TAGS
|
||||
#define CONFIG_INITRD_TAG
|
||||
#define CONFIG_REVISION_TAG
|
||||
|
||||
/* Size of Console IO buffer */
|
||||
#define CONFIG_SYS_CBSIZE 512
|
||||
|
||||
/* Size of print buffer */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
|
||||
sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
|
||||
/* Size of bootarg buffer */
|
||||
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
|
||||
|
||||
#define CONFIG_BOOTFILE "uImage"
|
||||
|
||||
/*
|
||||
* NAND / OneNAND
|
||||
*/
|
||||
#if defined(CONFIG_CMD_NAND)
|
||||
#define CONFIG_SYS_FLASH_BASE NAND_BASE
|
||||
/* Override OMAP3 serial console configuration */
|
||||
#undef CONFIG_CONS_INDEX
|
||||
#define CONFIG_CONS_INDEX 1
|
||||
#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
|
||||
#if defined(CONFIG_SPL_BUILD)
|
||||
#undef CONFIG_SYS_NS16550_REG_SIZE
|
||||
#else /* !CONFIG_SPL_BUILD */
|
||||
#define CONFIG_SYS_NS16550_REG_SIZE (-1)
|
||||
#endif /* CONFIG_SPL_BUILD */
|
||||
|
||||
/* NAND */
|
||||
#if defined(CONFIG_NAND)
|
||||
#define CONFIG_NAND_OMAP_GPMC
|
||||
#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
|
||||
#elif defined(CONFIG_CMD_ONENAND)
|
||||
#define CONFIG_SYS_FLASH_BASE ONENAND_MAP
|
||||
#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
|
||||
#endif
|
||||
#define CONFIG_SYS_FLASH_BASE NAND_BASE
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_BCH
|
||||
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
|
||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
|
||||
#define CONFIG_SYS_NAND_PAGE_COUNT 64
|
||||
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
|
||||
#define CONFIG_SYS_NAND_OOBSIZE 64
|
||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
|
||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
|
||||
#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
|
||||
10, 11, 12, 13}
|
||||
#define CONFIG_SYS_NAND_ECCSIZE 512
|
||||
#define CONFIG_SYS_NAND_ECCBYTES 3
|
||||
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
|
||||
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
|
||||
#define CONFIG_ENV_IS_IN_NAND 1
|
||||
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
|
||||
#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
|
||||
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
|
||||
#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
|
||||
#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
#define CONFIG_SPL_OMAP3_ID_NAND
|
||||
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
|
||||
#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
|
||||
#endif /* CONFIG_NAND */
|
||||
|
||||
#if !defined(CONFIG_ENV_IS_NOWHERE)
|
||||
#if defined(CONFIG_CMD_NAND)
|
||||
#elif defined(CONFIG_CMD_ONENAND)
|
||||
#define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
|
||||
#endif
|
||||
#endif /* CONFIG_ENV_IS_NOWHERE */
|
||||
#define CONFIG_USB_OMAP3
|
||||
|
||||
#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
|
||||
/* MUSB */
|
||||
#define CONFIG_USB_MUSB_OMAP2PLUS
|
||||
#define CONFIG_USB_MUSB_PIO_ONLY
|
||||
#define CONFIG_USB_ETHER
|
||||
#define CONFIG_USB_ETHER_RNDIS
|
||||
|
||||
/* USB EHCI */
|
||||
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
|
||||
|
||||
/* SMSC911x Ethernet */
|
||||
#if defined(CONFIG_CMD_NET)
|
||||
|
||||
/* Ethernet (SMSC9115 from SMSC9118 family) */
|
||||
#define CONFIG_SMC911X
|
||||
#define CONFIG_SMC911X_32_BIT
|
||||
#define CONFIG_SMC911X_BASE 0x2C000000
|
||||
|
||||
/* BOOTP fields */
|
||||
#define CONFIG_BOOTP_SUBNETMASK 0x00000001
|
||||
#define CONFIG_BOOTP_GATEWAY 0x00000002
|
||||
#define CONFIG_BOOTP_HOSTNAME 0x00000004
|
||||
#define CONFIG_BOOTP_BOOTPATH 0x00000010
|
||||
|
||||
#define CONFIG_SMC911X_BASE 0x2C000000
|
||||
#endif /* CONFIG_CMD_NET */
|
||||
|
||||
/* Support for relocation */
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE 0x800
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
|
||||
CONFIG_SYS_INIT_RAM_SIZE - \
|
||||
GENERATED_GBL_DATA_SIZE)
|
||||
|
||||
/* -----------------------------------------------------------------------------
|
||||
* Board specific
|
||||
* -----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Uncomment to define the board revision statically */
|
||||
/* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
|
||||
|
||||
/* Defines for SPL */
|
||||
#define CONFIG_SPL_FRAMEWORK
|
||||
#define CONFIG_SPL_TEXT_BASE 0x40200800
|
||||
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
|
||||
CONFIG_SPL_TEXT_BASE)
|
||||
|
||||
#define CONFIG_SPL_BSS_START_ADDR 0x80000000
|
||||
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
|
||||
|
||||
#define CONFIG_SPL_OMAP3_ID_NAND
|
||||
#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
|
||||
|
||||
/*
|
||||
* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
|
||||
* 64 bytes before this address should be set aside for u-boot.img's
|
||||
* header. That is 0x800FFFC0--0x80100000 should not be used for any
|
||||
* other needs.
|
||||
*/
|
||||
#define CONFIG_SYS_TEXT_BASE 0x80100000
|
||||
#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
|
||||
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
|
||||
|
||||
/* -----------------------------------------------------------------------------
|
||||
* Default environment
|
||||
* -----------------------------------------------------------------------------
|
||||
*/
|
||||
/* Environment */
|
||||
#define CONFIG_PREBOOT "usb start"
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
DEFAULT_LINUX_BOOT_ENV \
|
||||
"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
|
||||
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
|
||||
"loadaddr=0x82000000\0" \
|
||||
"usbtty=cdc_acm\0" \
|
||||
"mmcdev=0\0" \
|
||||
"console=ttyO0,115200n8\0" \
|
||||
"mmcargs=setenv bootargs console=${console} " \
|
||||
"${optargs} " \
|
||||
"root=/dev/mmcblk0p2 rw " \
|
||||
"rootfstype=ext3 rootwait\0" \
|
||||
"rootfstype=ext4 rootwait\0" \
|
||||
"nandargs=setenv bootargs console=${console} " \
|
||||
"root=/dev/mtdblock4 rw " \
|
||||
"rootfstype=jffs2\0" \
|
||||
"${optargs} " \
|
||||
"root=ubi0:rootfs rw ubi.mtd=rootfs noinitrd " \
|
||||
"rootfstype=ubifs rootwait\0" \
|
||||
"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
|
||||
"bootscript=echo Running bootscript from mmc ...; " \
|
||||
"source ${loadaddr}\0" \
|
||||
"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
|
||||
"mmcboot=echo Booting from mmc ...; " \
|
||||
"loaduimage=setenv bootfile uImage; " \
|
||||
"fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
|
||||
"loadzimage=setenv bootfile zImage; " \
|
||||
"fatload mmc ${mmcdev} ${loadaddr} zImage\0" \
|
||||
"loaddtb=fatload mmc ${mmcdev} ${fdtaddr} omap3-evm.dtb\0" \
|
||||
"mmcboot=echo Booting ${bootfile} from mmc ...; " \
|
||||
"run mmcargs; " \
|
||||
"bootm ${loadaddr}\0" \
|
||||
"nandboot=echo Booting from nand ...; " \
|
||||
"bootm ${loadaddr} - ${fdtaddr}\0" \
|
||||
"mmcbootz=echo Booting ${bootfile} from mmc ...; " \
|
||||
"run mmcargs; " \
|
||||
"bootz ${loadaddr} - ${fdtaddr}\0" \
|
||||
"nandboot=echo Booting uImage from nand ...; " \
|
||||
"run nandargs; " \
|
||||
"onenand read ${loadaddr} 280000 400000; " \
|
||||
"bootm ${loadaddr}\0" \
|
||||
"nand read ${loadaddr} kernel; " \
|
||||
"nand read ${fdtaddr} dtb; " \
|
||||
"bootm ${loadaddr} - ${fdtaddr}\0"
|
||||
|
||||
#define CONFIG_BOOTCOMMAND \
|
||||
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
||||
"if run loadbootscript; then " \
|
||||
"run bootscript; " \
|
||||
"else " \
|
||||
"if run loaduimage; then " \
|
||||
"run mmcboot; " \
|
||||
"else run nandboot; " \
|
||||
"fi; " \
|
||||
"if run loadzimage && run loaddtb; then " \
|
||||
"run mmcbootz; fi; " \
|
||||
"if run loaduimage && run loaddtb; then " \
|
||||
"run mmcboot; fi; " \
|
||||
"run nandboot; " \
|
||||
"fi; " \
|
||||
"else run nandboot; fi"
|
||||
|
||||
#endif /* __OMAP3EVM_CONFIG_H */
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
|
|||
Loading…
Reference in a new issue