axs101: bump DDR size from 256 to 512 Mb

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This commit is contained in:
Alexey Brodkin 2014-03-27 19:30:18 +04:00
parent 6bfa44206e
commit 0cdd762027

View file

@ -16,7 +16,7 @@
#define CONFIG_SYS_CLK_FREQ 750000000
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
/* dwgmac doesn't work with D$ enabled now */
/* NAND controller DMA doesn't work correctly with D$ enabled */
#define CONFIG_SYS_DCACHE_OFF
/*
@ -40,7 +40,7 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 Mb */
#define CONFIG_SYS_SDRAM_SIZE 0x20000000 /* 512 Mb */
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)