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axs101: bump DDR size from 256 to 512 Mb
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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0cdd762027
1 changed files with 2 additions and 2 deletions
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@ -16,7 +16,7 @@
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#define CONFIG_SYS_CLK_FREQ 750000000
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#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
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/* dwgmac doesn't work with D$ enabled now */
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/* NAND controller DMA doesn't work correctly with D$ enabled */
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#define CONFIG_SYS_DCACHE_OFF
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/*
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@ -40,7 +40,7 @@
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#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 Mb */
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#define CONFIG_SYS_SDRAM_SIZE 0x20000000 /* 512 Mb */
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
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