From 7654f62f4e84c40e0f604f23126fc794ae843da1 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Mon, 21 Aug 2017 20:17:03 +1200 Subject: [PATCH 1/8] ARM: mvebu: Convert CONFIG_MVNETA to Kconfig This converts the following to Kconfig: CONFIG_MVNETA Signed-off-by: Chris Packham Reviewed-by: Simon Glass Signed-off-by: Stefan Roese --- arch/arm/mach-mvebu/include/mach/config.h | 3 --- configs/clearfog_defconfig | 2 +- configs/controlcenterdc_defconfig | 2 +- configs/db-88f6820-amc_defconfig | 2 +- configs/db-88f6820-gp_defconfig | 2 +- configs/db-mv784mp-gp_defconfig | 2 +- configs/ds414_defconfig | 2 +- configs/maxbcm_defconfig | 2 +- configs/theadorable_debug_defconfig | 2 +- configs/turris_omnia_defconfig | 2 +- drivers/net/Kconfig | 8 ++++++++ include/configs/mvebu_armada-37xx.h | 1 - scripts/config_whitelist.txt | 1 - 13 files changed, 17 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index 2dc9b1dea3..cfd0952470 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -76,9 +76,6 @@ */ #ifdef CONFIG_CMD_NET #define CONFIG_MII /* expose smi ove miiphy interface */ -#if !defined(CONFIG_ARMADA_375) -#define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */ -#endif #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_ARP_TIMEOUT 200 #define CONFIG_NET_RETRY_COUNT 50 diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 580eaf3e57..5eceacf491 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -35,8 +35,8 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_MV=y CONFIG_SPI_FLASH=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_PCI=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index 836e00b2b5..04f622a574 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -46,8 +46,8 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_MV=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_SCSI=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 3074994ec6..e73d883cbe 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -47,8 +47,8 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_PCI=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=200000000 diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index 9d1771d292..d63992573c 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -45,8 +45,8 @@ CONFIG_MMC_SDHCI_MV=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_PCI=y CONFIG_SCSI=y CONFIG_DEBUG_UART_BASE=0xd0012000 diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 9458f8c438..03035d1e36 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -44,8 +44,8 @@ CONFIG_NAND_PXA3XX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_PCI=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 96bdbeb0ea..f05ddd0de8 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -38,8 +38,8 @@ CONFIG_SPL_OF_TRANSLATE=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_PCI=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 131d5e1d8e..5efaff3b28 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -32,8 +32,8 @@ CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index a39497984b..0b4025c228 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -51,8 +51,8 @@ CONFIG_DM_GPIO=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_PCI=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index a3834acb96..870cfd51ad 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -33,8 +33,8 @@ CONFIG_MISC=y CONFIG_ATSHA204A=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_MV=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEBUG_UART_SHIFT=2 diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 5ceea44c60..d67927cd3b 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -159,6 +159,14 @@ config FTMAC100 help This MAC is present in Andestech SoCs. +config MVNETA + bool "Marvell Armada 385 network interface support" + depends on ARMADA_XP || ARMADA_38X + select PHYLIB + help + This driver supports the network interface units in the + Marvell ARMADA XP and 38X SoCs + config MVPP2 bool "Marvell Armada 375/7K/8K network interface support" depends on ARMADA_375 || ARMADA_8K diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 66c7001f09..1b2e0d71b4 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -84,7 +84,6 @@ /* * Ethernet Driver configuration */ -#define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */ #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_ARP_TIMEOUT 200 #define CONFIG_NET_RETRY_COUNT 50 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 56bb639091..db5d88b4b5 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1497,7 +1497,6 @@ CONFIG_MVEBU_MMC CONFIG_MVGBE CONFIG_MVGBE_PORTS CONFIG_MVMFP_V2 -CONFIG_MVNETA CONFIG_MVS CONFIG_MVSATA_IDE CONFIG_MVSATA_IDE_USE_PORT0 From a30d3e777741f4d4228b7d621ae3021b108da854 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 30 Aug 2017 09:55:01 +0200 Subject: [PATCH 2/8] arm: mvebu: Remove theadorable_defconfig Currently, we support 2 "theadorable" MVEBU build targets. One with a stripped down configuration (theadorable) and one with a full blown configuration (theadorable_debug), including PCI, ethernet etc. When we introduced these configs, the plan was to remove the debug version at some point. But now it seems better to keep the full-blown version and remove the "non-debug" version instead. At a later stage, I will rename the remaining "theadorable_debug" target into a more fitting one. Signed-off-by: Stefan Roese --- board/theadorable/MAINTAINERS | 1 - configs/theadorable_defconfig | 54 ----------------------------------- 2 files changed, 55 deletions(-) delete mode 100644 configs/theadorable_defconfig diff --git a/board/theadorable/MAINTAINERS b/board/theadorable/MAINTAINERS index 5ae6b6487c..1e8df93d37 100644 --- a/board/theadorable/MAINTAINERS +++ b/board/theadorable/MAINTAINERS @@ -4,4 +4,3 @@ S: Maintained F: board/theadorable/ F: include/configs/theadorable.h F: configs/theadorable_debug_defconfig -F: configs/theadorable_defconfig diff --git a/configs/theadorable_defconfig b/configs/theadorable_defconfig deleted file mode 100644 index 0639f81328..0000000000 --- a/configs/theadorable_defconfig +++ /dev/null @@ -1,54 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MVEBU=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_TARGET_THEADORABLE=y -CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI_SUPPORT=y -CONFIG_VIDEO=y -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable" -CONFIG_DEBUG_UART=y -# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_FIT=y -CONFIG_BOOTDELAY=3 -# CONFIG_CONSOLE_MUX is not set -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL=y -CONFIG_SPL_I2C_SUPPORT=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -# CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_NET is not set -# CONFIG_CMD_NFS is not set -CONFIG_CMD_BMP=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_TIME=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -# CONFIG_SPL_PARTITION_UUIDS is not set -CONFIG_SPL_OF_TRANSLATE=y -CONFIG_FPGA_ALTERA=y -CONFIG_DM_GPIO=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y -CONFIG_VIDEO_MVEBU=y -# CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_REGEX=y -CONFIG_LIB_RAND=y From 0f8031a3334144246ecaa45c739a7c6c998a443f Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Mon, 4 Sep 2017 17:38:31 +1200 Subject: [PATCH 3/8] ARM: mvebu: Add SoC IDs for Marvell's integrated CPUs These SoCs are network packet processors (switch chips) with integrated ARMv7 cores. They share a great deal of commonality with the Armada-XP CPUs. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese --- arch/arm/mach-mvebu/cpu.c | 14 ++++++++++++++ arch/arm/mach-mvebu/include/mach/cpu.h | 1 + arch/arm/mach-mvebu/include/mach/soc.h | 3 +++ 3 files changed, 18 insertions(+) diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 14457317ce..f7f83bfa36 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -62,6 +62,11 @@ int mvebu_soc_family(void) case SOC_88F6820_ID: case SOC_88F6828_ID: return MVEBU_SOC_A38X; + + case SOC_98DX3236_ID: + case SOC_98DX3336_ID: + case SOC_98DX4251_ID: + return MVEBU_SOC_MSYS; } return MVEBU_SOC_UNKNOWN; @@ -208,6 +213,15 @@ int print_cpuinfo(void) case SOC_88F6828_ID: puts("MV88F6828-"); break; + case SOC_98DX3236_ID: + puts("98DX3236-"); + break; + case SOC_98DX3336_ID: + puts("98DX3336-"); + break; + case SOC_98DX4251_ID: + puts("98DX4251-"); + break; default: puts("Unknown-"); break; diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index d241eea956..b67b77ae0d 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -65,6 +65,7 @@ enum { MVEBU_SOC_AXP, MVEBU_SOC_A375, MVEBU_SOC_A38X, + MVEBU_SOC_MSYS, MVEBU_SOC_UNKNOWN, }; diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 0900e4008c..cdd64fb285 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -18,6 +18,9 @@ #define SOC_88F6810_ID 0x6810 #define SOC_88F6820_ID 0x6820 #define SOC_88F6828_ID 0x6828 +#define SOC_98DX3236_ID 0xf410 +#define SOC_98DX3336_ID 0xf400 +#define SOC_98DX4251_ID 0xfc00 /* A375 revisions */ #define MV_88F67XX_A0_ID 0x3 From 631407c5c03b8503b7f297452154d6100d95510b Mon Sep 17 00:00:00 2001 From: Joshua Scott Date: Mon, 4 Sep 2017 17:38:32 +1200 Subject: [PATCH 4/8] ARM: mvebu: add additional information to board_add_ram_info() Display more information about the current RAM configuration. With these changes the output on a 88F6820 board is SoC: MV88F6820-A0 at 1600 MHz DRAM: 2 GiB (800 MHz, 32-bit, ECC not enabled) Signed-off-by: Joshua Scott Signed-off-by: Chris Packham Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese --- arch/arm/mach-mvebu/dram.c | 45 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm/mach-mvebu/dram.c b/arch/arm/mach-mvebu/dram.c index e3f304c366..55e9ad726a 100644 --- a/arch/arm/mach-mvebu/dram.c +++ b/arch/arm/mach-mvebu/dram.c @@ -216,6 +216,35 @@ static int ecc_enabled(void) return 0; } + +/* Return the width of the DRAM bus, or 0 for unknown. */ +static int bus_width(void) +{ + int full_width = 0; + + if (reg_read(REG_SDRAM_CONFIG_ADDR) & (1 << REG_SDRAM_CONFIG_WIDTH_OFFS)) + full_width = 1; + + switch (mvebu_soc_family()) { + case MVEBU_SOC_AXP: + return full_width ? 64 : 32; + break; + case MVEBU_SOC_A375: + case MVEBU_SOC_A38X: + case MVEBU_SOC_MSYS: + return full_width ? 32 : 16; + default: + return 0; + } +} + +static int cycle_mode(void) +{ + int val = reg_read(REG_DUNIT_CTRL_LOW_ADDR); + + return (val >> REG_DUNIT_CTRL_LOW_2T_OFFS) & REG_DUNIT_CTRL_LOW_2T_MASK; +} + #else static void dram_ecc_scrubbing(void) { @@ -295,10 +324,26 @@ int dram_init_banksize(void) void board_add_ram_info(int use_default) { struct sar_freq_modes sar_freq; + int mode; + int width; get_sar_freq(&sar_freq); printf(" (%d MHz, ", sar_freq.d_clk); + width = bus_width(); + if (width) + printf("%d-bit, ", width); + + mode = cycle_mode(); + /* Mode 0 = Single cycle + * Mode 1 = Two cycles (2T) + * Mode 2 = Three cycles (3T) + */ + if (mode == 1) + printf("2T, "); + if (mode == 2) + printf("3T, "); + if (ecc_enabled()) printf("ECC"); else From 0a91e1cce4497a50af00dc134af6bc19ec87fe34 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Tue, 5 Sep 2017 17:03:26 +1200 Subject: [PATCH 5/8] ARM: mvebu: add SAR frequency values for 1.8/2.0GHz The Armada-38x has 1.8GHz and 2.0GHz variants. Add entries for these variants to the sar_freq_tab. Signed-off-by: Chris Packham Signed-off-by: Stefan Roese --- arch/arm/mach-mvebu/cpu.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index f7f83bfa36..74a63dd656 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -112,13 +112,15 @@ static const struct sar_freq_modes sar_freq_tab[] = { #elif defined(CONFIG_ARMADA_38X) /* SAR frequency values for Armada 38x */ static const struct sar_freq_modes sar_freq_tab[] = { - { 0x0, 0x0, 666, 333, 333 }, - { 0x2, 0x0, 800, 400, 400 }, - { 0x4, 0x0, 1066, 533, 533 }, - { 0x6, 0x0, 1200, 600, 600 }, - { 0x8, 0x0, 1332, 666, 666 }, - { 0xc, 0x0, 1600, 800, 800 }, - { 0xff, 0xff, 0, 0, 0 } /* 0xff marks end of array */ + { 0x0, 0x0, 666, 333, 333 }, + { 0x2, 0x0, 800, 400, 400 }, + { 0x4, 0x0, 1066, 533, 533 }, + { 0x6, 0x0, 1200, 600, 600 }, + { 0x8, 0x0, 1332, 666, 666 }, + { 0xc, 0x0, 1600, 800, 800 }, + { 0x10, 0x0, 1866, 933, 933 }, + { 0x13, 0x0, 2000, 1000, 933 }, + { 0xff, 0xff, 0, 0, 0 } /* 0xff marks end of array */ }; #else /* SAR frequency values for Armada XP */ From c3ab2744447db80de3c0a18422256a7b638253b3 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Sat, 23 Sep 2017 04:50:31 +1200 Subject: [PATCH 6/8] ARM: mvebu: handle unused DRAM banks with ECC enabled dram_ecc_scrubbing() had code to skip unused DRAM banks but it would not work because mvebu_sdram_bs() returns 0 and the code was subtracting 1 before checking the size. Remove the -1 from the bank size and the +1 from the total which will skip unused banks and still calculate the correct size. Put the -1 where it is needed for scrubbing via the xor engine. Reported-by: Joshua Scott Signed-off-by: Chris Packham Signed-off-by: Stefan Roese --- arch/arm/mach-mvebu/dram.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-mvebu/dram.c b/arch/arm/mach-mvebu/dram.c index 55e9ad726a..e634905618 100644 --- a/arch/arm/mach-mvebu/dram.c +++ b/arch/arm/mach-mvebu/dram.c @@ -179,11 +179,11 @@ static void dram_ecc_scrubbing(void) reg_write(REG_SDRAM_CONFIG_ADDR, temp); for (cs = 0; cs < CONFIG_NR_DRAM_BANKS; cs++) { - size = mvebu_sdram_bs(cs) - 1; + size = mvebu_sdram_bs(cs); if (size == 0) continue; - total = (u64)size + 1; + total = (u64)size; total_mem += (u32)(total / (1 << 30)); start_addr = 0; mv_xor_init2(cs); @@ -194,7 +194,7 @@ static void dram_ecc_scrubbing(void) size -= start_addr; } - mv_xor_mem_init(SCRB_XOR_CHAN, start_addr, size, + mv_xor_mem_init(SCRB_XOR_CHAN, start_addr, size - 1, SCRUB_MAGIC, SCRUB_MAGIC); /* Wait for previous transfer completion */ From f3a88e2ca17ac1ff54f5eff67c96cdaa5c542f6a Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Sun, 24 Sep 2017 15:50:17 +0300 Subject: [PATCH 7/8] arm: mvebu: fix boot from UART on ClearFog Base The ClearFog Base boot from UART when setting the DIP switches to 01001. Unfortunately, the SPL code sometimes fails to detect the UART boot method at run-time. Add an alternative SAR UART boot value to fix this. Note that this alternative value is not documented (Armada 38x Hardware Specifications, Table 48). But experimentations showed it on the ClearFog Base. Signed-off-by: Baruch Siach Signed-off-by: Stefan Roese --- arch/arm/mach-mvebu/include/mach/soc.h | 1 + arch/arm/mach-mvebu/spl.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index cdd64fb285..1d302761f0 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -142,6 +142,7 @@ #define BOOT_DEV_SEL_MASK (0x3f << BOOT_DEV_SEL_OFFS) #define BOOT_FROM_UART 0x28 +#define BOOT_FROM_UART_ALT 0x3f #define BOOT_FROM_SPI 0x32 #define BOOT_FROM_MMC 0x30 #define BOOT_FROM_MMC_ALT 0x31 diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 3cf02a54ce..a72a769f7c 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -42,6 +42,9 @@ static u32 get_boot_device(void) return BOOT_DEVICE_MMC1; #endif case BOOT_FROM_UART: +#ifdef BOOT_FROM_UART_ALT + case BOOT_FROM_UART_ALT: +#endif return BOOT_DEVICE_UART; case BOOT_FROM_SPI: default: From 0d106f1e731a4ea47eaeb4b70cc8b4fcc13a3e40 Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Sun, 24 Sep 2017 15:50:18 +0300 Subject: [PATCH 8/8] arm: mvebu: clearfog: document boot from UART Signed-off-by: Baruch Siach Signed-off-by: Stefan Roese --- board/solidrun/clearfog/README | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/board/solidrun/clearfog/README b/board/solidrun/clearfog/README index 2cfa5bfc86..ef1e3bf426 100644 --- a/board/solidrun/clearfog/README +++ b/board/solidrun/clearfog/README @@ -16,3 +16,23 @@ $ sudo dd if=u-boot-spl.kwb of=/dev/sdX bs=512 seek=1 Please use the correct device node for your setup instead of "/dev/sdX" here! + +Boot from UART: +--------------- + +Connect the on-board micro-USB (CF Pro: CON11, CF Base: CON5) +to your host. + +Set the SW1 DIP switches to UART boot (0: OFF, 1: ON): + + ClearFog Base: 01001 + ClearFog Pro: 11110 + +Run the following command to initiate U-Boot download: + + ./tools/kwboot -b u-boot-spl.kwb /dev/ttyUSBX + +Use the correct UART device node for /dev/ttyUSBX. + +When download finishes start your favorite terminal emulator +on /dev/ttyUSBX.