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Blackfin: bf518f-ezbrd: handle different PHYs dynamically
The original BF518F-EZBRD's have a Micrel KSZ8893 DSA on them, but newer ones only have a National PHY (which lack a RX Error interrupt line). So in the board eth init code, dynamically detect what is hooked up to the MAC and handle each accordingly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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parent
9280c3f106
commit
0c929426f8
2 changed files with 34 additions and 11 deletions
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@ -61,6 +61,7 @@ static void board_init_enetaddr(uchar *mac_addr)
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#define KSZ_WRITE 0x02
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#define KSZ_READ 0x03
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#define KSZ_REG_CHID 0x00 /* Register 0: Chip ID0 */
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#define KSZ_REG_STPID 0x01 /* Register 1: Chip ID1 / Start Switch */
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#define KSZ_REG_GC9 0x0b /* Register 11: Global Control 9 */
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#define KSZ_REG_P3C0 0x30 /* Register 48: Port 3 Control 0 */
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@ -78,15 +79,17 @@ static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data)
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return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din);
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}
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static int ksz8893m_reg_read(struct spi_slave *slave, uchar reg)
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{
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int ret;
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unsigned char din[3];
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ret = ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
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return ret ? ret : din[2];
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}
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static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)
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{
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int ret = 0;
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unsigned char din[3];
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ret |= ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
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ret |= ksz8893m_reg_set(slave, reg, din[2] & mask);
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return ret;
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return ksz8893m_reg_set(slave, reg, ksz8893m_reg_read(slave, reg) & mask);
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}
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static int ksz8893m_reset(struct spi_slave *slave)
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@ -107,16 +110,16 @@ static int ksz8893m_reset(struct spi_slave *slave)
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int board_eth_init(bd_t *bis)
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{
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static bool switch_is_alive = false;
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static bool switch_is_alive = false, phy_is_ksz = true;
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int ret;
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if (!switch_is_alive) {
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struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3);
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if (slave) {
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if (!spi_claim_bus(slave)) {
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ret = ksz8893m_reset(slave);
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if (!ret)
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switch_is_alive = true;
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phy_is_ksz = (ksz8893m_reg_read(slave, KSZ_REG_CHID) == 0x88);
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ret = phy_is_ksz ? ksz8893m_reset(slave) : 0;
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switch_is_alive = (ret == 0);
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spi_release_bus(slave);
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}
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spi_free_slave(slave);
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@ -63,6 +63,26 @@
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#if !defined(__ADSPBF512__) && !defined(__ADSPBF514__)
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#define ADI_CMDS_NETWORK 1
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#define CONFIG_BFIN_MAC
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#define CONFIG_BFIN_MAC_PINS \
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{ \
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P_MII0_ETxD0, \
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P_MII0_ETxD1, \
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P_MII0_ETxD2, \
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P_MII0_ETxD3, \
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P_MII0_ETxEN, \
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P_MII0_TxCLK, \
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P_MII0_PHYINT, \
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P_MII0_COL, \
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P_MII0_ERxD0, \
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P_MII0_ERxD1, \
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P_MII0_ERxD2, \
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P_MII0_ERxD3, \
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P_MII0_ERxDV, \
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P_MII0_ERxCLK, \
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P_MII0_CRS, \
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P_MII0_MDC, \
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P_MII0_MDIO, \
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0 }
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#define CONFIG_NETCONSOLE 1
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#define CONFIG_NET_MULTI 1
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#endif
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