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arm: zynq: Label whole PL part as fpga_full region

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This will simplify dt overlay structure for the whole PL.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
This commit is contained in:
Michal Simek 2017-02-14 17:40:21 +01:00
parent 6364a5d4bd
commit 0b180d02a3
1 changed files with 8 additions and 0 deletions
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8
arch/arm/dts/zynq-7000.dtsi
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@ -38,6 +38,14 @@
};
};
fpga_full: fpga-full {
compatible = "fpga-region";
fpga-mgr = <&devcfg>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
};
pmu@f8891000 {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 5 4>, <0 6 4>;