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Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv

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- sifive: fix palmer's email address.
- Move all SMP related SBI calls to SBI_v01.
This commit is contained in:
Tom Rini 2020-05-26 15:27:04 -04:00
commit 0ab24c37f0
3 changed files with 21 additions and 23 deletions
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5
arch/riscv/include/asm/sbi.h
View file

@ -106,8 +106,6 @@ void sbi_console_putchar(int ch);
int sbi_console_getchar(void);
void sbi_clear_ipi(void);
void sbi_shutdown(void);
#endif
void sbi_set_timer(uint64_t stime_value);
void sbi_send_ipi(const unsigned long *hart_mask);
void sbi_remote_fence_i(const unsigned long *hart_mask);
void sbi_remote_sfence_vma(const unsigned long *hart_mask,
@ -117,7 +115,8 @@ void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
unsigned long start,
unsigned long size,
unsigned long asid);
#endif
void sbi_set_timer(uint64_t stime_value);
int sbi_probe_extension(int ext);
#endif

37
arch/riscv/lib/sbi.c
View file

@ -39,6 +39,23 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
return ret;
}
/**
* sbi_set_timer() - Program the timer for next timer event.
* @stime_value: The value after which next timer event should fire.
*
* Return: None
*/
void sbi_set_timer(uint64_t stime_value)
{
#if __riscv_xlen == 32
sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
stime_value >> 32, 0, 0, 0, 0);
#else
sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
0, 0, 0, 0, 0);
#endif
}
#ifdef CONFIG_SBI_V01
/**
@ -86,25 +103,6 @@ void sbi_shutdown(void)
sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
}
#endif /* CONFIG_SBI_V01 */
/**
* sbi_set_timer() - Program the timer for next timer event.
* @stime_value: The value after which next timer event should fire.
*
* Return: None
*/
void sbi_set_timer(uint64_t stime_value)
{
#if __riscv_xlen == 32
sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
stime_value >> 32, 0, 0, 0, 0);
#else
sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
0, 0, 0, 0, 0);
#endif
}
/**
* sbi_send_ipi() - Send an IPI to any hart.
* @hart_mask: A cpu mask containing all the target harts.
@ -185,3 +183,4 @@ int sbi_probe_extension(int extid)
return -ENOTSUPP;
}
#endif /* CONFIG_SBI_V01 */

2
board/sifive/fu540/MAINTAINERS
View file

@ -1,6 +1,6 @@
SiFive FU540 BOARD
M: Paul Walmsley <paul.walmsley@sifive.com>
M: Palmer Dabbelt <palmer@sifive.com>
M: Palmer Dabbelt <palmer@dabbelt.com>
M: Anup Patel <anup.patel@wdc.com>
M: Atish Patra <atish.patra@wdc.com>
S: Maintained