mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-24 13:43:28 +00:00
Add support for Lite5200B board.
Patch by Patch by Jose Maria (Txema) Lopez, 16 Jan 2006
This commit is contained in:
Wolfgang Denk
parent
ff7fefe679
commit
09e4b0c5d3
11 changed files with 192 additions and 83 deletions
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@ -2,6 +2,9 @@
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Changes since U-Boot 1.1.4:
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======================================================================
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* Add support for Lite5200B board.
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Patch by Patch by Jose Maria (Txema) Lopez, 16 Jan 2006
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* Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific
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timer and cpu_reset code from cpu/$(CPU) into the new
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cpu/$(CPU)/$(SOC) directories
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7
MAKEALL
7
MAKEALL
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@ -25,9 +25,10 @@ LIST_5xx=" \
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#########################################################################
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LIST_5xxx=" \
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cpci5200 icecube_5100 icecube_5200 EVAL5200 \
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mcc200 o2dnt pf5200 PM520 \
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Total5100 Total5200 Total5200_Rev2 TQM5200_auto \
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cpci5200 EVAL5200 icecube_5100 icecube_5200 \
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lite5200b mcc200 o2dnt pf5200 \
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PM520 Total5100 Total5200 Total5200_Rev2 \
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TQM5200_auto \
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"
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#########################################################################
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14
Makefile
14
Makefile
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@ -303,6 +303,20 @@ icecube_5100_config: unconfig
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inka4x0_config: unconfig
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@./mkconfig inka4x0 ppc mpc5xxx inka4x0
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lite5200b_config \
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lite5200b_LOWBOOT_config: unconfig
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@ >include/config.h
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@ echo "#define CONFIG_MPC5200_DDR" >>include/config.h
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@ echo "... DDR memory revision"
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@ echo "#define CONFIG_MPC5200" >>include/config.h
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@ echo "#define CONFIG_LITE5200B" >>include/config.h
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@[ -z "$(findstring LOWBOOT_,$@)" ] || \
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{ echo "TEXT_BASE = 0xFF000000" >board/icecube/config.tmp ; \
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echo "... with LOWBOOT configuration" ; \
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}
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@ echo "... with MPC5200B processor"
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@./mkconfig -a IceCube ppc mpc5xxx icecube
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mcc200_config \
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mcc200_lowboot_config: unconfig
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@ >include/config.h
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76
README
76
README
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@ -261,44 +261,44 @@ The following options need to be configured:
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PowerPC based boards:
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---------------------
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CONFIG_ADCIOP CONFIG_GEN860T CONFIG_PCIPPC2
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CONFIG_ADS860 CONFIG_GENIETV CONFIG_PCIPPC6
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CONFIG_AMX860 CONFIG_GTH CONFIG_pcu_e
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CONFIG_AP1000 CONFIG_gw8260 CONFIG_PIP405
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CONFIG_AR405 CONFIG_hermes CONFIG_PM826
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CONFIG_BAB7xx CONFIG_hymod CONFIG_ppmc8260
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CONFIG_c2mon CONFIG_IAD210 CONFIG_QS823
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CONFIG_CANBT CONFIG_ICU862 CONFIG_QS850
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CONFIG_CCM CONFIG_IP860 CONFIG_QS860T
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CONFIG_CMI CONFIG_IPHASE4539 CONFIG_RBC823
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CONFIG_cogent_mpc8260 CONFIG_IVML24 CONFIG_RPXClassic
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CONFIG_cogent_mpc8xx CONFIG_IVML24_128 CONFIG_RPXlite
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CONFIG_CPCI405 CONFIG_IVML24_256 CONFIG_RPXsuper
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CONFIG_CPCI4052 CONFIG_IVMS8 CONFIG_rsdproto
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CONFIG_CPCIISER4 CONFIG_IVMS8_128 CONFIG_sacsng
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CONFIG_CPU86 CONFIG_IVMS8_256 CONFIG_Sandpoint8240
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CONFIG_CRAYL1 CONFIG_JSE CONFIG_Sandpoint8245
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CONFIG_CSB272 CONFIG_LANTEC CONFIG_sbc8260
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CONFIG_CU824 CONFIG_lwmon CONFIG_sbc8560
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CONFIG_DASA_SIM CONFIG_MBX CONFIG_SM850
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CONFIG_DB64360 CONFIG_MBX860T CONFIG_SPD823TS
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CONFIG_DB64460 CONFIG_MHPC CONFIG_STXGP3
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CONFIG_DU405 CONFIG_MIP405 CONFIG_SXNI855T
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CONFIG_DUET_ADS CONFIG_MOUSSE CONFIG_TQM823L
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CONFIG_EBONY CONFIG_MPC8260ADS CONFIG_TQM8260
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CONFIG_ELPPC CONFIG_MPC8540ADS CONFIG_TQM850L
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CONFIG_ELPT860 CONFIG_MPC8540EVAL CONFIG_TQM855L
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CONFIG_ep8260 CONFIG_MPC8560ADS CONFIG_TQM860L
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CONFIG_ERIC CONFIG_MUSENKI CONFIG_TTTech
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CONFIG_ESTEEM192E CONFIG_MVS1 CONFIG_UTX8245
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CONFIG_ETX094 CONFIG_NETPHONE CONFIG_V37
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CONFIG_EVB64260 CONFIG_NETTA CONFIG_W7OLMC
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CONFIG_FADS823 CONFIG_NETVIA CONFIG_W7OLMG
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CONFIG_FADS850SAR CONFIG_NX823 CONFIG_WALNUT
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CONFIG_FADS860T CONFIG_OCRTC CONFIG_ZPC1900
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CONFIG_FLAGADM CONFIG_ORSG CONFIG_ZUMA
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CONFIG_FPS850L CONFIG_OXC
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CONFIG_FPS860L CONFIG_PCI405
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CONFIG_ADCIOP CONFIG_GEN860T CONFIG_PCI405
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CONFIG_ADS860 CONFIG_GENIETV CONFIG_PCIPPC2
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CONFIG_AMX860 CONFIG_GTH CONFIG_PCIPPC6
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CONFIG_AP1000 CONFIG_gw8260 CONFIG_pcu_e
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CONFIG_AR405 CONFIG_hermes CONFIG_PIP405
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CONFIG_BAB7xx CONFIG_hymod CONFIG_PM826
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CONFIG_c2mon CONFIG_IAD210 CONFIG_ppmc8260
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CONFIG_CANBT CONFIG_ICU862 CONFIG_QS823
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CONFIG_CCM CONFIG_IP860 CONFIG_QS850
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CONFIG_CMI CONFIG_IPHASE4539 CONFIG_QS860T
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CONFIG_cogent_mpc8260 CONFIG_IVML24 CONFIG_RBC823
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CONFIG_cogent_mpc8xx CONFIG_IVML24_128 CONFIG_RPXClassic
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CONFIG_CPCI405 CONFIG_IVML24_256 CONFIG_RPXlite
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CONFIG_CPCI4052 CONFIG_IVMS8 CONFIG_RPXsuper
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CONFIG_CPCIISER4 CONFIG_IVMS8_128 CONFIG_rsdproto
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CONFIG_CPU86 CONFIG_IVMS8_256 CONFIG_sacsng
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CONFIG_CRAYL1 CONFIG_JSE CONFIG_Sandpoint8240
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CONFIG_CSB272 CONFIG_LANTEC CONFIG_Sandpoint8245
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CONFIG_CU824 CONFIG_LITE5200B CONFIG_sbc8260
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CONFIG_DASA_SIM CONFIG_lwmon CONFIG_sbc8560
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CONFIG_DB64360 CONFIG_MBX CONFIG_SM850
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CONFIG_DB64460 CONFIG_MBX860T CONFIG_SPD823TS
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CONFIG_DU405 CONFIG_MHPC CONFIG_STXGP3
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CONFIG_DUET_ADS CONFIG_MIP405 CONFIG_SXNI855T
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CONFIG_EBONY CONFIG_MOUSSE CONFIG_TQM823L
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CONFIG_ELPPC CONFIG_MPC8260ADS CONFIG_TQM8260
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CONFIG_ELPT860 CONFIG_MPC8540ADS CONFIG_TQM850L
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CONFIG_ep8260 CONFIG_MPC8540EVAL CONFIG_TQM855L
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CONFIG_ERIC CONFIG_MPC8560ADS CONFIG_TQM860L
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CONFIG_ESTEEM192E CONFIG_MUSENKI CONFIG_TTTech
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CONFIG_ETX094 CONFIG_MVS1 CONFIG_UTX8245
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CONFIG_EVB64260 CONFIG_NETPHONE CONFIG_V37
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CONFIG_FADS823 CONFIG_NETTA CONFIG_W7OLMC
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CONFIG_FADS850SAR CONFIG_NETVIA CONFIG_W7OLMG
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CONFIG_FADS860T CONFIG_NX823 CONFIG_WALNUT
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CONFIG_FLAGADM CONFIG_OCRTC CONFIG_ZPC1900
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CONFIG_FPS850L CONFIG_ORSG CONFIG_ZUMA
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CONFIG_FPS860L CONFIG_OXC
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ARM based boards:
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-----------------
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@ -23,6 +23,7 @@
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#include <common.h>
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#ifndef CFG_FLASH_CFI_DRIVER
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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/* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
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@ -489,3 +490,4 @@ static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
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return (res);
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}
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#endif /*CFG_FLASH_CFI_DRIVER*/
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@ -28,12 +28,15 @@
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#include <mpc5xxx.h>
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#include <pci.h>
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#if defined(CONFIG_MPC5200_DDR)
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#include "mt46v16m16-75.h"
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#if defined(CONFIG_LITE5200B)
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#include "mt46v32m16.h"
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#else
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# if defined(CONFIG_MPC5200_DDR)
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# include "mt46v16m16-75.h"
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# else
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#include "mt48lc16m16a2-75.h"
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# endif
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#endif
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#ifndef CFG_RAMBOOT
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static void sdram_start (int hi_addr)
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{
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@ -236,7 +239,9 @@ long int initdram (int board_type)
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int checkboard (void)
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{
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#if defined(CONFIG_MPC5200)
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#if defined (CONFIG_LITE5200B)
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puts ("Board: Freescale Lite5200B\n");
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#elif defined(CONFIG_MPC5200)
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puts ("Board: Motorola MPC5200 (IceCube)\n");
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#elif defined(CONFIG_MGT5100)
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puts ("Board: Motorola MGT5100 (IceCube)\n");
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37
board/icecube/mt46v32m16.h
Normal file
37
board/icecube/mt46v32m16.h
Normal file
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@ -0,0 +1,37 @@
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/*
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* (C) Copyright 2004
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* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#define SDRAM_DDR 1 /* is DDR */
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#if defined(CONFIG_MPC5200)
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/* Settings for XLB = 132 MHz */
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#define SDRAM_MODE 0x018D0000
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#define SDRAM_EMODE 0x40090000
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#define SDRAM_CONTROL 0x704f0f00
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#define SDRAM_CONFIG1 0x73722930
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#define SDRAM_CONFIG2 0x47770000
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#define SDRAM_TAPDELAY 0x10000000
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#else
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#error CONFIG_MPC5200 not defined
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#endif
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@ -246,9 +246,9 @@ pci_init_board(void)
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/* System memory space */
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pci_set_region(hose->regions + 3,
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CONFIG_PCI_SYS_MEM_BUS,
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CONFIG_PCI_SYS_MEM_PHYS,
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gd->ram_size,
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PCI_REGION_MEM | PCI_REGION_MEMORY);
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CONFIG_PCI_SYS_MEM_PHYS,
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gd->ram_size,
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PCI_REGION_MEM | PCI_REGION_MEMORY);
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hose->region_count = 4;
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@ -342,9 +342,9 @@ pci_init_board(void)
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/* System memory space */
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pci_set_region(hose->regions + 3,
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CONFIG_PCI_SYS_MEM_BUS,
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CONFIG_PCI_SYS_MEM_PHYS,
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gd->ram_size,
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PCI_REGION_MEM | PCI_REGION_MEMORY);
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CONFIG_PCI_SYS_MEM_PHYS,
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gd->ram_size,
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PCI_REGION_MEM | PCI_REGION_MEMORY);
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hose->region_count = 4;
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@ -89,8 +89,8 @@ static inline int
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data_crc(struct jffs2_raw_inode *node)
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{
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if (node->data_crc != crc32_no_comp(0, (unsigned char *)
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((int) &node->node_crc + sizeof (node->node_crc)),
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node->csize)) {
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((int) &node->node_crc + sizeof (node->node_crc)),
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node->csize)) {
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return 0;
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} else {
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return 1;
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@ -122,9 +122,13 @@
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# define CFG_LOWBOOT16 1
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#endif
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#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */
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#if defined(CONFIG_LITE5200B)
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# error CFG_LOWBOOT08 is incompatible with the Lite5200B
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#else
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# define CFG_LOWBOOT 1
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# define CFG_LOWBOOT08 1
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#endif
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#endif
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/*
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* Autobooting
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@ -160,8 +164,12 @@
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/*
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* IPB Bus clocking configuration.
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*/
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#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
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#if defined(CONFIG_LITE5200B)
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#define CFG_IPBSPEED_133 /* define for 133MHz speed */
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#else
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#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
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#endif
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#endif /* CONFIG_MPC5200 */
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/*
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* I2C configuration
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*/
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@ -182,6 +190,20 @@
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/*
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* Flash configuration
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*/
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#if defined(CONFIG_LITE5200B)
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#define CFG_FLASH_BASE 0xFE000000
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#define CFG_FLASH_SIZE 0x01000000
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#if !defined(CFG_LOWBOOT)
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#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x01760000 + 0x00800000)
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#else /* CFG_LOWBOOT */
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#if defined(CFG_LOWBOOT08)
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# error CFG_LOWBOOT08 is incompatible with the Lite5200B
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#endif
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#if defined(CFG_LOWBOOT16)
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#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x01060000)
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#endif
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#endif /* CFG_LOWBOOT */
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#else /* !CONFIG_LITE5200B (IceCube)*/
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#define CFG_FLASH_BASE 0xFF000000
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#define CFG_FLASH_SIZE 0x01000000
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#if !defined(CFG_LOWBOOT)
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@ -194,6 +216,7 @@
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#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
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#endif
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#endif /* CFG_LOWBOOT */
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#endif /* CONFIG_LITE5200B */
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#define CFG_MAX_FLASH_BANKS 2 /* max num of memory banks */
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#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */
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@ -203,13 +226,23 @@
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#undef CONFIG_FLASH_16BIT /* Flash is 8-bit */
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#if defined(CONFIG_LITE5200B)
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#define CFG_FLASH_CFI_DRIVER
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#define CFG_FLASH_CFI
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#define CFG_FLASH_BANKS_LIST {CFG_CS1_START,CFG_CS0_START}
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#endif
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/*
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* Environment settings
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*/
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#define CFG_ENV_IS_IN_FLASH 1
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#define CFG_ENV_SIZE 0x10000
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#if defined(CONFIG_LITE5200B)
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#define CFG_ENV_SECT_SIZE 0x20000
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#else
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#define CFG_ENV_SECT_SIZE 0x10000
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#endif
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#define CONFIG_ENV_OVERWRITE 1
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/*
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@ -246,6 +279,9 @@
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*/
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/* #define CONFIG_FEC_10MBIT 1 */
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#define CONFIG_PHY_ADDR 0x00
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#if defined(CONFIG_LITE5200B)
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#define CONFIG_FEC_MII100 1
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#endif
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/*
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* GPIO configuration
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@ -288,6 +324,16 @@
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#define CFG_HID0_FINAL 0
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#endif
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#if defined(CONFIG_LITE5200B)
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#define CFG_CS1_START CFG_FLASH_BASE
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#define CFG_CS1_SIZE CFG_FLASH_SIZE
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#define CFG_CS1_CFG 0x00047800
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#define CFG_CS0_START (CFG_FLASH_BASE + CFG_FLASH_SIZE)
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#define CFG_CS0_SIZE CFG_FLASH_SIZE
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#define CFG_BOOTCS_START CFG_CS0_START
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#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
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#define CFG_BOOTCS_CFG 0x00047800
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#else /* IceCube aka Lite5200 */
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#ifdef CONFIG_MPC5200_DDR
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#define CFG_BOOTCS_START (CFG_CS1_START + CFG_CS1_SIZE)
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@ -306,6 +352,7 @@
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#define CFG_CS0_SIZE CFG_FLASH_SIZE
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#endif /* CONFIG_MPC5200_DDR */
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#endif /*CONFIG_LITE5200B */
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#define CFG_CS_BURST 0x00000000
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#define CFG_CS_DEADCYCLE 0x33333333
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|
|
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@ -45,7 +45,7 @@
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*/
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/* #define DEBUG 1 */
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/* #define DEPLOYMENT 1 */
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/* #define DEPLOYMENT 1 */
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#undef CONFIG_MPC860
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#define CONFIG_MPC823 1 /* This is a MPC823e CPU. */
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|
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@ -61,23 +61,23 @@
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#define CONFIG_BAUDRATE 9600 /* console default baudrate = 9600bps */
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#ifdef DEBUG
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#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
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#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
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#else
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#define CONFIG_BOOTDELAY 6 /* autoboot after 6 seconds */
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#define CONFIG_BOOTDELAY 6 /* autoboot after 6 seconds */
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#ifdef DEPLOYMENT
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#define CONFIG_BOOT_RETRY_TIME -1
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#define CONFIG_BOOT_RETRY_TIME -1
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#define CONFIG_AUTOBOOT_KEYED
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#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds (stop with 'st')...\n"
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#define CONFIG_AUTOBOOT_STOP_STR "st"
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#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds (stop with 'st')...\n"
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#define CONFIG_AUTOBOOT_STOP_STR "st"
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#define CONFIG_ZERO_BOOTDELAY_CHECK
|
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#define CONFIG_RESET_TO_RETRY 1
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#define CONFIG_BOOT_RETRY_MIN 1
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#define CONFIG_RESET_TO_RETRY 1
|
||||
#define CONFIG_BOOT_RETRY_MIN 1
|
||||
#endif /* DEPLOYMENT */
|
||||
#endif /* DEBUG */
|
||||
|
||||
/* pre-boot commands */
|
||||
#define CONFIG_PREBOOT "setenv stdout serial;setenv stdin serial"
|
||||
#define CONFIG_PREBOOT "setenv stdout serial;setenv stdin serial"
|
||||
|
||||
#undef CONFIG_BOOTARGS
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
|
|
@ -117,35 +117,35 @@
|
|||
|
||||
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
|
||||
|
||||
#if 1 /* Enable this staff could make image enlarge about 25KB. Mask it if you
|
||||
don't want the advanced function */
|
||||
#if 1 /* Enable this stuff could make image enlarge about 25KB. Mask it if you
|
||||
don't want the advanced function */
|
||||
|
||||
#ifdef CONFIG_SPLASH_SCREEN
|
||||
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
|
||||
#ifdef CONFIG_SPLASH_SCREEN
|
||||
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
|
||||
CFG_CMD_ASKENV | \
|
||||
CFG_CMD_BMP | \
|
||||
CFG_CMD_JFFS2 | \
|
||||
CFG_CMD_PING | \
|
||||
CFG_CMD_ELF | \
|
||||
CFG_CMD_BMP | \
|
||||
CFG_CMD_JFFS2 | \
|
||||
CFG_CMD_PING | \
|
||||
CFG_CMD_ELF | \
|
||||
CFG_CMD_REGINFO | \
|
||||
CFG_CMD_DHCP )
|
||||
CFG_CMD_DHCP )
|
||||
#else
|
||||
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
|
||||
CFG_CMD_ASKENV | \
|
||||
CFG_CMD_JFFS2 | \
|
||||
CFG_CMD_PING | \
|
||||
CFG_CMD_ELF | \
|
||||
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
|
||||
CFG_CMD_ASKENV | \
|
||||
CFG_CMD_JFFS2 | \
|
||||
CFG_CMD_PING | \
|
||||
CFG_CMD_ELF | \
|
||||
CFG_CMD_REGINFO | \
|
||||
CFG_CMD_DHCP )
|
||||
#endif /* CONFIG_SPLASH_SCREEN */
|
||||
CFG_CMD_DHCP )
|
||||
#endif /* CONFIG_SPLASH_SCREEN */
|
||||
|
||||
/* test-only */
|
||||
#define CFG_JFFS2_FIRST_BANK 0 /* use for JFFS2 */
|
||||
#define CFG_JFFS2_NUM_BANKS 1 /* ! second bank contains U-Boot */
|
||||
#define CFG_JFFS2_FIRST_BANK 0 /* use for JFFS2 */
|
||||
#define CFG_JFFS2_NUM_BANKS 1 /* ! second bank contains U-Boot */
|
||||
|
||||
#define CONFIG_NETCONSOLE
|
||||
|
||||
#endif /* 1 */
|
||||
#endif /* 1 */
|
||||
|
||||
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
|
||||
#include <cmd_confdefs.h>
|
||||
|
|
@ -310,7 +310,7 @@
|
|||
#if defined(RPXlite_64MHz)
|
||||
#define CFG_SCCR ( SCCR_TBS | SCCR_EBDF01 ) /* %%%SCCR:0x02020000 */
|
||||
#else
|
||||
#define CFG_SCCR ( SCCR_TBS | SCCR_EBDF00 ) /* %%%SCCR:0x02000000 */
|
||||
#define CFG_SCCR ( SCCR_TBS | SCCR_EBDF00 ) /* %%%SCCR:0x02000000 */
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
|
|
|
|||
Loading…
Reference in a new issue