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arm nomadik: use 1000 as HZ value and rewrite timer code
This sets CONFIG_SYS_HZ to 1000 as required, and completely rewrites timer code, which is now both correct and much smaller. Unused functions like udelay_masked() have been removed as no driver uses them, even the ones that are not currently active for this board. mtu.h is copied literally from the kernel sources. Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This commit is contained in:
Alessandro Rubini
Jean-Christophe PLAGNIOL-VILLARD
parent
f7aa59b29a
commit
095a460b49
3 changed files with 94 additions and 140 deletions
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@ -1,20 +1,5 @@
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/*
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* (C) Copyright 2003
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* Texas Instruments <www.ti.com>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* (C) Copyright 2002-2004
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* (C) Copyright 2004
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* Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
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* (C) Copyright 2009 Alessandro Rubini
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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@ -37,146 +22,49 @@
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/mtu.h>
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#define TIMER_LOAD_VAL 0xffffffff
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/*
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* The timer is a decrementer, we'll left it free running at 2.4MHz.
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* We have 2.4 ticks per microsecond and an overflow in almost 30min
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*/
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#define TIMER_CLOCK (24 * 100 * 1000)
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#define COUNT_TO_USEC(x) ((x) * 5 / 12) /* overflows at 6min */
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#define USEC_TO_COUNT(x) ((x) * 12 / 5) /* overflows at 6min */
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#define TICKS_PER_HZ (TIMER_CLOCK / CONFIG_SYS_HZ)
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#define TICKS_TO_HZ(x) ((x) / TICKS_PER_HZ)
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/* macro to read the 32 bit timer */
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#define READ_TIMER readl(CONFIG_SYS_TIMERBASE + 20)
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/* macro to read the 32 bit timer: since it decrements, we invert read value */
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#define READ_TIMER() (~readl(CONFIG_SYS_TIMERBASE + MTU_VAL(0)))
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static ulong timestamp;
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static ulong lastdec;
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/* nothing really to do with interrupts, just starts up a counter. */
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/* Configure a free-running, auto-wrap counter with no prescaler */
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int timer_init(void)
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{
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/* Load timer with initial value */
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writel(TIMER_LOAD_VAL, CONFIG_SYS_TIMERBASE + 16);
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/*
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* Set timer to be enabled, free-running, no interrupts, 256 divider,
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* 32-bit, wrap-mode
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*/
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writel(0x8a, CONFIG_SYS_TIMERBASE + 24);
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/* init the timestamp and lastdec value */
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reset_timer_masked();
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writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS,
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CONFIG_SYS_TIMERBASE + MTU_CR(0));
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reset_timer();
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return 0;
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}
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/*
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* timer without interrupts
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*/
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/* Restart counting from 0 */
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void reset_timer(void)
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{
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reset_timer_masked();
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writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(0)); /* Immediate effect */
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}
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/* Return how many HZ passed since "base" */
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ulong get_timer(ulong base)
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{
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return get_timer_masked() - base;
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return TICKS_TO_HZ(READ_TIMER()) - base;
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}
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void set_timer(ulong t)
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{
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timestamp = t;
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}
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/* delay x useconds AND perserve advance timstamp value */
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/* Delay x useconds */
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void udelay(unsigned long usec)
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{
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ulong tmo, tmp;
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ulong ini, end;
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if (usec >= 1000) {
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/* if "big" number, spread normalization to seconds */
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tmo = usec / 1000; /* start to normalize */
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tmo *= CONFIG_SYS_HZ; /* find number of "ticks" */
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tmo /= 1000; /* finish normalize. */
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} else {
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/* small number, don't kill it prior to HZ multiply */
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tmo = usec * CONFIG_SYS_HZ;
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tmo /= (1000 * 1000);
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}
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tmp = get_timer(0); /* get current timestamp */
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if ((tmo + tmp + 1) < tmp) /* will roll time stamp? */
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reset_timer_masked(); /* reset to 0, set lastdec value */
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else
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tmo += tmp;
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while (get_timer_masked() < tmo)
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/* nothing */ ;
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}
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void reset_timer_masked(void)
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{
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/* reset time */
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lastdec = READ_TIMER; /* capure current decrementer value time */
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timestamp = 0; /* start "advancing" time stamp from 0 */
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}
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ulong get_timer_masked(void)
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{
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ulong now = READ_TIMER; /* current tick value */
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if (lastdec >= now) { /* normal mode (non roll) */
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/* move stamp fordward */
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timestamp += lastdec - now;
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} else {
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/*
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* An overflow is expected.
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* nts = ts + ld + (TLV - now)
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* ts=old stamp, ld=time that passed before passing through -1
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* (TLV-now) amount of time after passing though -1
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* nts = new "advancing time stamp"...it could also roll
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*/
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timestamp += lastdec + TIMER_LOAD_VAL - now;
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}
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lastdec = now;
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return timestamp;
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}
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/* waits specified delay value and resets timestamp */
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void udelay_masked(unsigned long usec)
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{
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ulong tmo;
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if (usec >= 1000) {
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/* if "big" number, spread normalization to seconds */
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tmo = usec / 1000; /* start to normalize */
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tmo *= CONFIG_SYS_HZ; /* find number of "ticks" */
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tmo /= 1000; /* finish normalize. */
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} else {
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/* else small number, don't kill it prior to HZ multiply */
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tmo = usec * CONFIG_SYS_HZ;
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tmo /= (1000*1000);
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}
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reset_timer_masked();
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/* set "advancing" timestamp to 0, set lastdec vaule */
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while (get_timer_masked() < tmo)
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/* nothing */ ;
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}
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On ARM it just returns the timer value.
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*/
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unsigned long long get_ticks(void)
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{
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return get_timer(0);
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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ulong get_tbclk(void)
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{
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ulong tbclk;
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tbclk = CONFIG_SYS_HZ;
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return tbclk;
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ini = READ_TIMER();
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end = ini + USEC_TO_COUNT(usec);
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while ((signed)(end - READ_TIMER()) > 0)
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;
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}
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66
include/asm-arm/arch-nomadik/mtu.h
Normal file
66
include/asm-arm/arch-nomadik/mtu.h
Normal file
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@ -0,0 +1,66 @@
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/*
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* (C) Copyright 2009 Alessandro Rubini
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __ASM_ARCH_MTU_H
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#define __ASM_ARCH_MTU_H
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/*
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* The MTU device hosts four different counters, with 4 set of
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* registers. These are register names.
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*/
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#define MTU_IMSC 0x00 /* Interrupt mask set/clear */
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#define MTU_RIS 0x04 /* Raw interrupt status */
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#define MTU_MIS 0x08 /* Masked interrupt status */
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#define MTU_ICR 0x0C /* Interrupt clear register */
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/* per-timer registers take 0..3 as argument */
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#define MTU_LR(x) (0x10 + 0x10 * (x) + 0x00) /* Load value */
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#define MTU_VAL(x) (0x10 + 0x10 * (x) + 0x04) /* Current value */
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#define MTU_CR(x) (0x10 + 0x10 * (x) + 0x08) /* Control reg */
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#define MTU_BGLR(x) (0x10 + 0x10 * (x) + 0x0c) /* At next overflow */
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/* bits for the control register */
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#define MTU_CRn_ENA 0x80
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#define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */
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#define MTU_CRn_PRESCALE_MASK 0x0c
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#define MTU_CRn_PRESCALE_1 0x00
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#define MTU_CRn_PRESCALE_16 0x04
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#define MTU_CRn_PRESCALE_256 0x08
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#define MTU_CRn_32BITS 0x02
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#define MTU_CRn_ONESHOT 0x01 /* if 0 = wraps reloading from BGLR*/
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/* Other registers are usual amba/primecell registers, currently not used */
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#define MTU_ITCR 0xff0
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#define MTU_ITOP 0xff4
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#define MTU_PERIPH_ID0 0xfe0
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#define MTU_PERIPH_ID1 0xfe4
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#define MTU_PERIPH_ID2 0xfe8
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#define MTU_PERIPH_ID3 0xfeC
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#define MTU_PCELL0 0xff0
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#define MTU_PCELL1 0xff4
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#define MTU_PCELL2 0xff8
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#define MTU_PCELL3 0xffC
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#endif /* __ASM_ARCH_MTU_H */
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@ -96,7 +96,7 @@
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#define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
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/* timing informazion */
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#define CONFIG_SYS_HZ (2400000 / 256) /* Timer0: 2.4Mhz + divider */
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#define CONFIG_SYS_HZ 1000 /* Mandatory... */
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#define CONFIG_SYS_TIMERBASE 0x101E2000
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/* serial port (PL011) configuration */
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