mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-24 21:54:01 +00:00
arm: Remove snapper9260 board
This board is behind on several mandatory DM migrations and is missing OF_CONTROL support that makes other conversions impossible. Remove it. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
7751f54f91
commit
08f80184a9
8 changed files with 0 additions and 387 deletions
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@ -79,15 +79,6 @@ config TARGET_ETHERNUT5
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bool "Ethernut5 board"
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bool "Ethernut5 board"
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select AT91SAM9XE
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select AT91SAM9XE
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config TARGET_SNAPPER9260
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bool "Support snapper9260"
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select AT91SAM9260
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select AT91_WANTS_COMMON_PHY
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select DM
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select DM_GPIO
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select DM_SERIAL
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imply CMD_DM
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config TARGET_GURNARD
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config TARGET_GURNARD
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bool "Support gurnard"
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bool "Support gurnard"
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select AT91SAM9G45
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select AT91SAM9G45
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@ -364,7 +355,6 @@ source "board/atmel/sama5d3xek/Kconfig"
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source "board/atmel/sama5d4_xplained/Kconfig"
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source "board/atmel/sama5d4_xplained/Kconfig"
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source "board/atmel/sama5d4ek/Kconfig"
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source "board/atmel/sama5d4ek/Kconfig"
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source "board/bluewater/gurnard/Kconfig"
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source "board/bluewater/gurnard/Kconfig"
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source "board/bluewater/snapper9260/Kconfig"
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source "board/calao/usb_a9263/Kconfig"
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source "board/calao/usb_a9263/Kconfig"
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source "board/egnite/ethernut5/Kconfig"
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source "board/egnite/ethernut5/Kconfig"
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source "board/esd/meesc/Kconfig"
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source "board/esd/meesc/Kconfig"
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@ -1,12 +0,0 @@
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if TARGET_SNAPPER9260
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config SYS_BOARD
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default "snapper9260"
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config SYS_VENDOR
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default "bluewater"
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config SYS_CONFIG_NAME
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default "snapper9260"
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endif
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@ -1,7 +0,0 @@
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SNAPPER9260 BOARD
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M: Simon Glass <sjg@chromium.org>
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S: Maintained
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F: board/bluewater/snapper9260/
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F: include/configs/snapper9260.h
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F: configs/snapper9260_defconfig
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F: configs/snapper9g20_defconfig
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@ -1,9 +0,0 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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# (C) Copyright 2003-2008
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2011 Bluewater Systems
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# Ryan Mallon <ryan@bluewatersys.com>
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obj-y += snapper9260.o
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@ -1,154 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Bluewater Systems Snapper 9260/9G20 modules
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*
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* (C) Copyright 2011 Bluewater Systems
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* Author: Andre Renaud <andre@bluewatersys.com>
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* Author: Ryan Mallon <ryan@bluewatersys.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <init.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/mach-types.h>
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#include <asm/arch/at91sam9260_matrix.h>
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#include <asm/arch/at91sam9_smc.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/atmel_serial.h>
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#include <net.h>
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#include <netdev.h>
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#include <i2c.h>
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#include <pca953x.h>
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#include <linux/delay.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* IO Expander pins */
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#define IO_EXP_ETH_RESET (0 << 1)
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#define IO_EXP_ETH_POWER (1 << 1)
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static void macb_hw_init(void)
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{
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struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
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at91_periph_clk_enable(ATMEL_ID_EMAC0);
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/* Disable pull-ups to prevent PHY going into test mode */
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writel(pin_to_mask(AT91_PIN_PA14) |
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pin_to_mask(AT91_PIN_PA15) |
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pin_to_mask(AT91_PIN_PA18),
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&pioa->pudr);
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/* Power down ethernet */
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pca953x_set_dir(0x28, IO_EXP_ETH_POWER, PCA953X_DIR_OUT);
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pca953x_set_val(0x28, IO_EXP_ETH_POWER, 1);
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/* Hold ethernet in reset */
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pca953x_set_dir(0x28, IO_EXP_ETH_RESET, PCA953X_DIR_OUT);
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pca953x_set_val(0x28, IO_EXP_ETH_RESET, 0);
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/* Enable ethernet power */
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pca953x_set_val(0x28, IO_EXP_ETH_POWER, 0);
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at91_phy_reset();
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/* Bring the ethernet out of reset */
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pca953x_set_val(0x28, IO_EXP_ETH_RESET, 1);
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/* The phy internal reset take 21ms */
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udelay(21 * 1000);
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/* Re-enable pull-up */
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writel(pin_to_mask(AT91_PIN_PA14) |
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pin_to_mask(AT91_PIN_PA15) |
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pin_to_mask(AT91_PIN_PA18),
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&pioa->puer);
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at91_macb_hw_init();
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}
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static void nand_hw_init(void)
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{
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struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
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struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
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unsigned long csa;
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/* Enable CS3 as NAND/SmartMedia */
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csa = readl(&matrix->ebicsa);
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csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
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writel(csa, &matrix->ebicsa);
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/* Configure SMC CS3 for NAND/SmartMedia */
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writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
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AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
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&smc->cs[3].setup);
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writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
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AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
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&smc->cs[3].pulse);
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writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
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&smc->cs[3].cycle);
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writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
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AT91_SMC_MODE_EXNW_DISABLE |
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AT91_SMC_MODE_DBW_8 |
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AT91_SMC_MODE_TDF_CYCLE(3),
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&smc->cs[3].mode);
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/* Configure RDY/BSY */
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gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand_rdy");
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gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
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/* Enable NandFlash */
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gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand_ce");
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gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
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}
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int board_init(void)
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{
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at91_periph_clk_enable(ATMEL_ID_PIOA);
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at91_periph_clk_enable(ATMEL_ID_PIOB);
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at91_periph_clk_enable(ATMEL_ID_PIOC);
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/* The mach-type is the same for both Snapper 9260 and 9G20 */
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gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260;
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/* Address of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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/* Initialise peripherals */
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at91_seriald_hw_init();
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i2c_set_bus_num(0);
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nand_hw_init();
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macb_hw_init();
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return 0;
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}
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int board_eth_init(struct bd_info *bis)
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{
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return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x1f);
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}
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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return 0;
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}
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void reset_phy(void)
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{
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}
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static struct atmel_serial_plat at91sam9260_serial_plat = {
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.base_addr = ATMEL_BASE_DBGU,
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};
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U_BOOT_DRVINFO(at91sam9260_serial) = {
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.name = "serial_atmel",
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.plat = &at91sam9260_serial_plat,
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};
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@ -1,58 +0,0 @@
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CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_ARCH_CPU_INIT=y
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CONFIG_ARCH_AT91=y
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CONFIG_SYS_TEXT_BASE=0x21f00000
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CONFIG_SYS_MALLOC_LEN=0x100000
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CONFIG_SYS_MALLOC_F_LEN=0x400
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CONFIG_TARGET_SNAPPER9260=y
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CONFIG_AT91_GPIO_PULLUP=y
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CONFIG_ATMEL_LEGACY=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x40000
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CONFIG_ENV_OFFSET=0x80000
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CONFIG_SYS_LOAD_ADDR=0x23000000
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CONFIG_FIT=y
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CONFIG_BOOTDELAY=3
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS0,115200 ip=any"
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_RESET_PHY_R=y
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_PROMPT="Snapper> "
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CONFIG_SYS_CBSIZE=256
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CONFIG_SYS_PBSIZE=282
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# CONFIG_CMD_BDI is not set
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# CONFIG_CMD_IMI is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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# CONFIG_CMD_LOADS is not set
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CONFIG_CMD_NAND=y
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# CONFIG_CMD_SOURCE is not set
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_BOOTP_BOOTFILESIZE=y
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CONFIG_CMD_MII=y
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# CONFIG_CMD_MDIO is not set
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CONFIG_CMD_PING=y
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CONFIG_CMD_FAT=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_NAND=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_NET_RETRY_COUNT=20
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CONFIG_TFTP_PORT=y
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CONFIG_TFTP_TSIZE=y
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CONFIG_AT91_GPIO=y
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CONFIG_CMD_PCA953X=y
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CONFIG_SYS_I2C_LEGACY=y
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CONFIG_SYS_I2C_SOFT=y
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CONFIG_SYS_I2C_SOFT_SLAVE=0x7F
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# CONFIG_MMC is not set
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
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CONFIG_NAND_ATMEL=y
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CONFIG_MACB=y
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CONFIG_RMII=y
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CONFIG_ATMEL_USART=y
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@ -1,57 +0,0 @@
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CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_ARCH_CPU_INIT=y
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CONFIG_ARCH_AT91=y
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CONFIG_SYS_TEXT_BASE=0x21f00000
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CONFIG_SYS_MALLOC_LEN=0x100000
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CONFIG_SYS_MALLOC_F_LEN=0x400
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CONFIG_TARGET_SNAPPER9260=y
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CONFIG_AT91_GPIO_PULLUP=y
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CONFIG_ATMEL_LEGACY=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x40000
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CONFIG_ENV_OFFSET=0x80000
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CONFIG_SYS_LOAD_ADDR=0x23000000
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CONFIG_FIT=y
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CONFIG_BOOTDELAY=3
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS0,115200 ip=any"
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_RESET_PHY_R=y
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_CBSIZE=256
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CONFIG_SYS_PBSIZE=276
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# CONFIG_CMD_BDI is not set
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# CONFIG_CMD_IMI is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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# CONFIG_CMD_LOADS is not set
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CONFIG_CMD_NAND=y
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# CONFIG_CMD_SOURCE is not set
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_BOOTP_BOOTFILESIZE=y
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CONFIG_CMD_MII=y
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# CONFIG_CMD_MDIO is not set
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CONFIG_CMD_PING=y
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CONFIG_CMD_FAT=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_NAND=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_NET_RETRY_COUNT=20
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CONFIG_TFTP_PORT=y
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CONFIG_TFTP_TSIZE=y
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CONFIG_AT91_GPIO=y
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CONFIG_CMD_PCA953X=y
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CONFIG_SYS_I2C_LEGACY=y
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CONFIG_SYS_I2C_SOFT=y
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CONFIG_SYS_I2C_SOFT_SLAVE=0x7F
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# CONFIG_MMC is not set
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
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CONFIG_NAND_ATMEL=y
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CONFIG_MACB=y
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CONFIG_RMII=y
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CONFIG_ATMEL_USART=y
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@ -1,80 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Bluewater Systems Snapper 9260 and 9G20 modules
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*
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||||||
* (C) Copyright 2011 Bluewater Systems
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|
||||||
* Author: Andre Renaud <andre@bluewatersys.com>
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* Author: Ryan Mallon <ryan@bluewatersys.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* SoC type is defined in boards.cfg */
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#include <asm/hardware.h>
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#include <linux/sizes.h>
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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/* CPU */
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||||||
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|
||||||
/* SDRAM */
|
|
||||||
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
|
|
||||||
#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */
|
|
||||||
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
|
|
||||||
#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1
|
|
||||||
|
|
||||||
/* Mem test settings */
|
|
||||||
|
|
||||||
/* NAND Flash */
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
|
||||||
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
|
||||||
#define CONFIG_SYS_NAND_DBW_8
|
|
||||||
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */
|
|
||||||
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */
|
|
||||||
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
|
|
||||||
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
|
|
||||||
|
|
||||||
/* GPIOs and IO expander */
|
|
||||||
#define CONFIG_PCA953X
|
|
||||||
#define CONFIG_SYS_I2C_PCA953X_ADDR 0x28
|
|
||||||
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x28, 16} }
|
|
||||||
|
|
||||||
/* UARTs/Serial console */
|
|
||||||
#ifndef CONFIG_DM_SERIAL
|
|
||||||
#define CONFIG_USART_BASE ATMEL_BASE_DBGU
|
|
||||||
#define CONFIG_USART_ID ATMEL_ID_SYS
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* I2C - Bit-bashed */
|
|
||||||
#define CONFIG_SOFT_I2C_READ_REPEATED_START
|
|
||||||
#define I2C_INIT do { \
|
|
||||||
at91_set_gpio_output(AT91_PIN_PA23, 1); \
|
|
||||||
at91_set_gpio_output(AT91_PIN_PA24, 1); \
|
|
||||||
at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
|
|
||||||
at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
|
|
||||||
} while (0)
|
|
||||||
#define I2C_SOFT_DECLARATIONS
|
|
||||||
#define I2C_ACTIVE
|
|
||||||
#define I2C_TRISTATE at91_set_gpio_input(AT91_PIN_PA23, 1);
|
|
||||||
#define I2C_READ at91_get_gpio_value(AT91_PIN_PA23);
|
|
||||||
#define I2C_SDA(bit) do { \
|
|
||||||
if (bit) { \
|
|
||||||
at91_set_gpio_input(AT91_PIN_PA23, 1); \
|
|
||||||
} else { \
|
|
||||||
at91_set_gpio_output(AT91_PIN_PA23, 1); \
|
|
||||||
at91_set_gpio_value(AT91_PIN_PA23, bit); \
|
|
||||||
} \
|
|
||||||
} while (0)
|
|
||||||
#define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
|
|
||||||
#define I2C_DELAY udelay(2)
|
|
||||||
|
|
||||||
/* Boot options */
|
|
||||||
|
|
||||||
/* Environment settings */
|
|
||||||
|
|
||||||
/* Console settings */
|
|
||||||
|
|
||||||
#endif /* __CONFIG_H */
|
|
Loading…
Reference in a new issue