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ARM: sam9x5: fix ethernet pins in MII mode
Fix pin setting in MII mode Signed-off-by: Jesse Gilles <jgilles@multitech.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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08f0533a14
1 changed files with 8 additions and 8 deletions
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@ -246,14 +246,14 @@ void at91_macb_hw_init(void)
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#ifndef CONFIG_RMII
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#ifndef CONFIG_RMII
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/* Only emac0 support MII */
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/* Only emac0 support MII */
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if (has_emac0()) {
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if (has_emac0()) {
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at91_set_b_periph(AT91_PIO_PORTB, 16, 0); /* ECRS */
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at91_set_a_periph(AT91_PIO_PORTB, 16, 0); /* ECRS */
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at91_set_b_periph(AT91_PIO_PORTB, 17, 0); /* ECOL */
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at91_set_a_periph(AT91_PIO_PORTB, 17, 0); /* ECOL */
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at91_set_b_periph(AT91_PIO_PORTB, 13, 0); /* ERX2 */
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at91_set_a_periph(AT91_PIO_PORTB, 13, 0); /* ERX2 */
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at91_set_b_periph(AT91_PIO_PORTB, 14, 0); /* ERX3 */
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at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* ERX3 */
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at91_set_b_periph(AT91_PIO_PORTB, 15, 0); /* ERXCK */
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at91_set_a_periph(AT91_PIO_PORTB, 15, 0); /* ERXCK */
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at91_set_b_periph(AT91_PIO_PORTB, 11, 0); /* ETX2 */
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at91_set_a_periph(AT91_PIO_PORTB, 11, 0); /* ETX2 */
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at91_set_b_periph(AT91_PIO_PORTB, 12, 0); /* ETX3 */
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at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* ETX3 */
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at91_set_b_periph(AT91_PIO_PORTB, 8, 0); /* ETXER */
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at91_set_a_periph(AT91_PIO_PORTB, 8, 0); /* ETXER */
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}
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}
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#endif
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#endif
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}
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}
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