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https://github.com/AsahiLinux/u-boot
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drivers: rtc: add max313xx series rtc driver
Adding support for Analog Devices MAX313XX series RTCs. This is ported from the Linux driver and adapted for use in u-boot. Notable differences are - handling of tm_year and tm_mon differ - clock source support is omitted - hwmon support for the MAX31328 and MAX31343 is omitted - rtc_ops->reset is added Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Chris Packham
Tom Rini
parent
b5f045e12f
commit
0798a1ce0f
4 changed files with 474 additions and 0 deletions
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@ -269,6 +269,7 @@ CONFIG_SANDBOX_RESET=y
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CONFIG_RESET_SYSCON=y
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CONFIG_RESET_SCMI=y
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CONFIG_DM_RTC=y
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CONFIG_RTC_MAX313XX=y
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CONFIG_RTC_RV8803=y
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CONFIG_RTC_HT1380=y
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CONFIG_SCSI=y
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@ -134,6 +134,19 @@ config RTC_ISL1208
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This driver supports reading and writing the RTC/calendar and detects
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total power failures.
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config RTC_MAX313XX
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bool "Analog Devices MAX313XX RTC driver"
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depends on DM_RTC
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depends on DM_I2C
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help
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If you say yes here you will get support for the
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Analog Devices MAX313XX series RTC family.
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Chip features not currently supported:
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- Timestamp registers as SRAM
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- Temperature sensor
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- CLKOUT generation
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config RTC_PCF8563
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tristate "Philips PCF8563"
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help
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@ -19,6 +19,7 @@ obj-$(CONFIG_RTC_HT1380) += ht1380.o
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obj-$(CONFIG_$(SPL_TPL_)RTC_SANDBOX) += i2c_rtc_emul.o
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obj-$(CONFIG_RTC_ISL1208) += isl1208.o
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obj-$(CONFIG_RTC_M41T62) += m41t62.o
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obj-$(CONFIG_RTC_MAX313XX) += max313xx.o
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obj-$(CONFIG_RTC_MC13XXX) += mc13xxx-rtc.o
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obj-$(CONFIG_RTC_MC146818) += mc146818.o
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obj-$(CONFIG_MCFRTC) += mcfrtc.o
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459
drivers/rtc/max313xx.c
Normal file
459
drivers/rtc/max313xx.c
Normal file
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@ -0,0 +1,459 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Analog Devices MAX313XX series I2C RTC driver
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*
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* Copyright 2022 Analog Devices Inc.
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*/
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#include <bcd.h>
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#include <dm.h>
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#include <i2c.h>
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#include <rtc.h>
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#include <dm/device_compat.h>
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#include <linux/bitfield.h>
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#include <linux/delay.h>
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#include <linux/kernel.h>
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/* common registers */
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#define MAX313XX_INT_ALARM1 BIT(0)
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#define MAX313XX_INT_ALARM2 BIT(1)
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#define MAX313XX_HRS_F_12_24 BIT(6)
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#define MAX313XX_HRS_F_AM_PM BIT(5)
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#define MAX313XX_MONTH_CENTURY BIT(7)
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#define MAX313XX_TMR_CFG_ENABLE BIT(4)
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#define MAX313XX_TMR_CFG_FREQ_MASK GENMASK(1, 0)
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#define MAX313XX_TMR_CFG_FREQ_16HZ 0x03
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#define MAX313XX_REG_MINUTE 0x01
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#define MAX313XX_REG_HOUR 0x02
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#define MAX313XX_TIME_SIZE 0x07
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/* device specific registers */
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#define MAX3134X_CFG2_REG 0x01
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#define MAX3134X_CFG2_SET_RTC BIT(1)
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#define MAX31341_TRICKLE_RES_MASK GENMASK(1, 0)
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#define MAX31341_TRICKLE_DIODE_EN BIT(2)
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#define MAX31341_TRICKLE_ENABLE_BIT BIT(3)
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#define MAX31341_POWER_MGMT_REG 0x56
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#define MAX31341_POWER_MGMT_TRICKLE_BIT BIT(0)
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#define MAX3133X_TRICKLE_RES_MASK GENMASK(2, 1)
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#define MAX3133X_TRICKLE_DIODE_EN BIT(3)
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#define MAX3133X_TRICKLE_ENABLE_BIT BIT(0)
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#define MAX31329_TRICKLE_ENABLE_BIT BIT(7)
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#define MAX31343_TRICKLE_ENABLE_MASK GENMASK(7, 4)
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#define MAX31343_TRICKLE_ENABLE_CODE 5
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#define MAX31329_43_TRICKLE_RES_MASK GENMASK(1, 0)
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#define MAX31329_43_TRICKLE_DIODE_EN BIT(2)
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#define MAX31329_CONFIG2_REG 0x04
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#define MAX31329_CONFIG2_CLKIN_EN BIT(2)
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#define MAX31329_CONFIG2_CLKIN_FREQ GENMASK(1, 0)
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#define MAX31341_42_CONFIG1_REG 0x00
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#define MAX31341_42_CONFIG1_CLKIN_EN BIT(7)
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#define MAX31341_42_CONFIG1_CLKIN_FREQ GENMASK(5, 4)
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#define MAX31341_42_CONFIG1_OSC_DISABLE BIT(3)
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#define MAX31341_42_CONFIG1_SWRST BIT(0)
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enum max313xx_ids {
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ID_MAX31328,
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ID_MAX31329,
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ID_MAX31331,
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ID_MAX31334,
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ID_MAX31341,
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ID_MAX31342,
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ID_MAX31343,
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MAX313XX_ID_NR
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};
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/**
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* struct chip_desc - descriptor for MAX313xx variants
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* @sec_reg: Offset to seconds register. Used to denote the start of the
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* current time registers.
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* @alarm1_sec_reg: Offset to Alarm1 seconds register. Used to denote the
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* start of the alarm registers.
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* @int_en_reg: Offset to the interrupt enable register.
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* @int_status_reg: Offset to the interrupt status register.
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* @ram_reg: Offset to the timestamp RAM (which can be used as SRAM).
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* @ram_size: Size of the timestamp RAM.
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* @temp_reg: Offset to the temperature register (or 0 if temperature
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* sensor is not supported).
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* @trickle_reg: Offset to the trickle charger configuration register (or
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* 0 if trickle charger is not supported).
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* @rst_reg: Offset to the reset register.
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* @rst_bit: Bit within the reset register for the software reset.
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*/
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struct chip_desc {
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u8 sec_reg;
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u8 alarm1_sec_reg;
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u8 int_en_reg;
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u8 int_status_reg;
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u8 ram_reg;
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u8 ram_size;
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u8 temp_reg;
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u8 trickle_reg;
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u8 rst_reg;
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u8 rst_bit;
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};
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struct max313xx_priv {
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enum max313xx_ids id;
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const struct chip_desc *chip;
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};
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static const struct chip_desc chip[MAX313XX_ID_NR] = {
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[ID_MAX31328] = {
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.int_en_reg = 0x0E,
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.int_status_reg = 0x0F,
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.sec_reg = 0x00,
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.alarm1_sec_reg = 0x07,
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.temp_reg = 0x11,
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},
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[ID_MAX31329] = {
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.int_en_reg = 0x01,
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.int_status_reg = 0x00,
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.sec_reg = 0x06,
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.alarm1_sec_reg = 0x0D,
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.ram_reg = 0x22,
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.ram_size = 64,
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.trickle_reg = 0x19,
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.rst_reg = 0x02,
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.rst_bit = BIT(0),
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},
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[ID_MAX31331] = {
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.int_en_reg = 0x01,
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.int_status_reg = 0x00,
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.sec_reg = 0x08,
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.alarm1_sec_reg = 0x0F,
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.ram_reg = 0x20,
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.ram_size = 32,
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.trickle_reg = 0x1B,
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.rst_reg = 0x02,
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.rst_bit = BIT(0),
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},
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[ID_MAX31334] = {
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.int_en_reg = 0x01,
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.int_status_reg = 0x00,
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.sec_reg = 0x09,
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.alarm1_sec_reg = 0x10,
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.ram_reg = 0x30,
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.ram_size = 32,
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.trickle_reg = 0x1E,
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.rst_reg = 0x02,
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.rst_bit = BIT(0),
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},
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[ID_MAX31341] = {
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.int_en_reg = 0x04,
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.int_status_reg = 0x05,
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.sec_reg = 0x06,
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.alarm1_sec_reg = 0x0D,
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.ram_reg = 0x16,
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.ram_size = 64,
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.trickle_reg = 0x57,
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.rst_reg = 0x00,
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.rst_bit = BIT(0),
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},
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[ID_MAX31342] = {
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.int_en_reg = 0x04,
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.int_status_reg = 0x05,
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.sec_reg = 0x06,
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.alarm1_sec_reg = 0x0D,
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.rst_reg = 0x00,
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.rst_bit = BIT(0),
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},
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[ID_MAX31343] = {
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.int_en_reg = 0x01,
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.int_status_reg = 0x00,
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.sec_reg = 0x06,
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.alarm1_sec_reg = 0x0D,
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.ram_reg = 0x22,
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.ram_size = 64,
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.temp_reg = 0x1A,
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.trickle_reg = 0x19,
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.rst_reg = 0x02,
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.rst_bit = BIT(0),
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},
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};
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static const u32 max313xx_trickle_ohms[] = { 3000, 6000, 11000 };
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static int max313xx_set_bits(struct udevice *dev, unsigned int reg, unsigned int bits)
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{
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int ret;
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ret = dm_i2c_reg_read(dev, reg);
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if (ret < 0)
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return ret;
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return dm_i2c_reg_write(dev, reg, ret | bits);
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}
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static int max313xx_clear_bits(struct udevice *dev, unsigned int reg, unsigned int bits)
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{
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int ret;
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ret = dm_i2c_reg_read(dev, reg);
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if (ret < 0)
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return ret;
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return dm_i2c_reg_write(dev, reg, ret & ~bits);
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}
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static int max313xx_get_hour(u8 hour_reg)
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{
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int hour;
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/* 24Hr mode */
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if (!FIELD_GET(MAX313XX_HRS_F_12_24, hour_reg))
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return bcd2bin(hour_reg & 0x3f);
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/* 12Hr mode */
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hour = bcd2bin(hour_reg & 0x1f);
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if (hour == 12)
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hour = 0;
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if (FIELD_GET(MAX313XX_HRS_F_AM_PM, hour_reg))
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hour += 12;
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return hour;
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}
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static int max313xx_read_time(struct udevice *dev, struct rtc_time *t)
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{
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struct max313xx_priv *rtc = dev_get_priv(dev);
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u8 regs[7];
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int ret;
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ret = dm_i2c_read(dev, rtc->chip->sec_reg, regs, 7);
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if (ret)
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return ret;
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t->tm_sec = bcd2bin(regs[0] & 0x7f);
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t->tm_min = bcd2bin(regs[1] & 0x7f);
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t->tm_hour = max313xx_get_hour(regs[2]);
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t->tm_wday = bcd2bin(regs[3] & 0x07) - 1;
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t->tm_mday = bcd2bin(regs[4] & 0x3f);
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t->tm_mon = bcd2bin(regs[5] & 0x1f);
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t->tm_year = bcd2bin(regs[6]) + 2000;
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if (FIELD_GET(MAX313XX_MONTH_CENTURY, regs[5]))
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t->tm_year += 100;
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dev_dbg(dev, "read %4d-%02d-%02d (wday=%d) %2d:%02d:%02d\n",
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t->tm_year, t->tm_mon, t->tm_mday,
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t->tm_wday, t->tm_hour, t->tm_min, t->tm_sec);
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return 0;
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}
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static int max313xx_set_time(struct udevice *dev, const struct rtc_time *t)
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{
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struct max313xx_priv *rtc = dev_get_priv(dev);
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u8 regs[7];
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int ret;
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dev_dbg(dev, "set %4d-%02d-%02d (wday=%d) %2d:%02d:%02d\n",
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t->tm_year, t->tm_mon, t->tm_mday,
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t->tm_wday, t->tm_hour, t->tm_min, t->tm_sec);
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if (t->tm_year < 2000) {
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dev_err(dev, "year %d (before 2000) not supported\n",
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t->tm_year);
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return -EINVAL;
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}
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if (rtc->chip->rst_bit) {
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ret = max313xx_clear_bits(dev, rtc->chip->rst_reg, rtc->chip->rst_bit);
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if (ret)
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return ret;
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}
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regs[0] = bin2bcd(t->tm_sec);
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regs[1] = bin2bcd(t->tm_min);
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regs[2] = bin2bcd(t->tm_hour);
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regs[3] = bin2bcd(t->tm_wday + 1);
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regs[4] = bin2bcd(t->tm_mday);
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regs[5] = bin2bcd(t->tm_mon);
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regs[6] = bin2bcd((t->tm_year - 2000) % 100);
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if ((t->tm_year - 2000) >= 200)
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regs[5] |= FIELD_PREP(MAX313XX_MONTH_CENTURY, 1);
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ret = dm_i2c_write(dev, rtc->chip->sec_reg, regs, 7);
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if (ret)
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return ret;
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switch (rtc->id) {
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case ID_MAX31341:
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case ID_MAX31342:
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ret = max313xx_set_bits(dev, MAX3134X_CFG2_REG,
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MAX3134X_CFG2_SET_RTC);
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if (ret)
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return ret;
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udelay(10000);
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ret = max313xx_clear_bits(dev, MAX3134X_CFG2_REG,
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MAX3134X_CFG2_SET_RTC);
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if (ret)
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return ret;
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break;
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default:
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break;
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}
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return ret;
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}
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static int max313xx_reset(struct udevice *dev)
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{
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struct max313xx_priv *rtc = dev_get_priv(dev);
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int ret = -EINVAL;
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if (rtc->chip->rst_bit)
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ret = max313xx_set_bits(dev, rtc->chip->rst_reg, rtc->chip->rst_bit);
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return ret;
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}
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static const struct rtc_ops max3133x_rtc_ops = {
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.get = max313xx_read_time,
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.set = max313xx_set_time,
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.reset = max313xx_reset,
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};
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static int max313xx_init(struct udevice *dev)
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{
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struct max313xx_priv *rtc = dev_get_priv(dev);
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int ret;
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switch (rtc->id) {
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case ID_MAX31341:
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case ID_MAX31342:
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ret = max313xx_clear_bits(dev, MAX31341_42_CONFIG1_REG,
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MAX31341_42_CONFIG1_OSC_DISABLE);
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if (ret)
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return ret;
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return max313xx_set_bits(dev, MAX31341_42_CONFIG1_REG,
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MAX31341_42_CONFIG1_SWRST);
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default:
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return 0;
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}
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}
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static int max313xx_trickle_charger_setup(struct udevice *dev)
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{
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struct max313xx_priv *rtc = dev_get_priv(dev);
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bool diode;
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int index, reg;
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u32 ohms;
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u32 chargeable;
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int ret;
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if (dev_read_u32(dev, "trickle-resistor-ohms", &ohms) ||
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dev_read_u32(dev, "aux-voltage-chargeable", &chargeable))
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return 0;
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switch (chargeable) {
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case 0:
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diode = false;
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break;
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case 1:
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diode = true;
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break;
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default:
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dev_dbg(dev, "unsupported aux-voltage-chargeable value\n");
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return -EINVAL;
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}
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if (!rtc->chip->trickle_reg) {
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dev_warn(dev, "device does not have trickle charger\n");
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return -ENOTSUPP;
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}
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index = find_closest(ohms, max313xx_trickle_ohms,
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ARRAY_SIZE(max313xx_trickle_ohms)) + 1;
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switch (rtc->id) {
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case ID_MAX31329:
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reg = FIELD_PREP(MAX31329_TRICKLE_ENABLE_BIT, 1) |
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FIELD_PREP(MAX31329_43_TRICKLE_RES_MASK, index) |
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FIELD_PREP(MAX31329_43_TRICKLE_DIODE_EN, diode);
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break;
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case ID_MAX31331:
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case ID_MAX31334:
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reg = FIELD_PREP(MAX3133X_TRICKLE_ENABLE_BIT, 1) |
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FIELD_PREP(MAX3133X_TRICKLE_DIODE_EN, diode) |
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FIELD_PREP(MAX3133X_TRICKLE_RES_MASK, index);
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break;
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case ID_MAX31341:
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if (index == 1)
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index = 0;
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reg = FIELD_PREP(MAX31341_TRICKLE_ENABLE_BIT, 1) |
|
||||
FIELD_PREP(MAX31341_TRICKLE_DIODE_EN, diode) |
|
||||
FIELD_PREP(MAX31341_TRICKLE_RES_MASK, index);
|
||||
|
||||
ret = max313xx_set_bits(dev, MAX31341_POWER_MGMT_REG,
|
||||
MAX31341_POWER_MGMT_TRICKLE_BIT);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
break;
|
||||
case ID_MAX31343:
|
||||
reg = FIELD_PREP(MAX31329_43_TRICKLE_RES_MASK, index) |
|
||||
FIELD_PREP(MAX31329_43_TRICKLE_DIODE_EN, diode) |
|
||||
FIELD_PREP(MAX31343_TRICKLE_ENABLE_MASK,
|
||||
MAX31343_TRICKLE_ENABLE_CODE);
|
||||
break;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
return dm_i2c_reg_write(dev, rtc->chip->trickle_reg, reg);
|
||||
}
|
||||
|
||||
static int max313xx_probe(struct udevice *dev)
|
||||
{
|
||||
struct max313xx_priv *max313xx = dev_get_priv(dev);
|
||||
int ret;
|
||||
|
||||
max313xx->id = dev_get_driver_data(dev);
|
||||
max313xx->chip = &chip[max313xx->id];
|
||||
|
||||
ret = max313xx_init(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return max313xx_trickle_charger_setup(dev);
|
||||
}
|
||||
|
||||
static const struct udevice_id max313xx_of_id[] = {
|
||||
{ .compatible = "adi,max31328", .data = ID_MAX31328 },
|
||||
{ .compatible = "adi,max31329", .data = ID_MAX31329 },
|
||||
{ .compatible = "adi,max31331", .data = ID_MAX31331 },
|
||||
{ .compatible = "adi,max31334", .data = ID_MAX31334 },
|
||||
{ .compatible = "adi,max31341", .data = ID_MAX31341 },
|
||||
{ .compatible = "adi,max31342", .data = ID_MAX31342 },
|
||||
{ .compatible = "adi,max31343", .data = ID_MAX31343 },
|
||||
{ }
|
||||
};
|
||||
|
||||
U_BOOT_DRIVER(rtc_max313xx) = {
|
||||
.name = "rtc-max313xx",
|
||||
.id = UCLASS_RTC,
|
||||
.probe = max313xx_probe,
|
||||
.of_match = max313xx_of_id,
|
||||
.priv_auto = sizeof(struct max313xx_priv),
|
||||
.ops = &max3133x_rtc_ops,
|
||||
};
|
||||
Loading…
Add table
Reference in a new issue