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https://github.com/AsahiLinux/u-boot
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nand: Remove CONFIG_MTD_NAND_VERIFY_WRITE
The CONFIG_MTD_NAND_VERIFY_WRITE has been removed from Linux for some time and a more generic method of NAND verification now exists in U-Boot. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
parent
9ac71f112e
commit
073adf987e
43 changed files with 0 additions and 328 deletions
3
README
3
README
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@ -3483,9 +3483,6 @@ FIT uImage format:
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Adds the MTD partitioning infrastructure from the Linux
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Adds the MTD partitioning infrastructure from the Linux
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kernel. Needed for UBI support.
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kernel. Needed for UBI support.
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CONFIG_MTD_NAND_VERIFY_WRITE
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verify if the written data is correct reread.
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- UBI support
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- UBI support
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CONFIG_CMD_UBI
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CONFIG_CMD_UBI
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@ -93,19 +93,6 @@ static void alpr_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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}
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}
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}
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}
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#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
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static int alpr_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
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{
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int i;
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for (i = 0; i < len; i++)
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if (buf[i] != readb(&(alpr_ndfc->data)))
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return i;
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return 0;
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}
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#endif
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static int alpr_nand_dev_ready(struct mtd_info *mtd)
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static int alpr_nand_dev_ready(struct mtd_info *mtd)
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{
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{
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/*
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/*
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@ -130,9 +117,6 @@ int board_nand_init(struct nand_chip *nand)
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nand->read_byte = alpr_nand_read_byte;
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nand->read_byte = alpr_nand_read_byte;
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nand->write_buf = alpr_nand_write_buf;
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nand->write_buf = alpr_nand_write_buf;
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nand->read_buf = alpr_nand_read_buf;
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nand->read_buf = alpr_nand_read_buf;
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#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
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nand->verify_buf = alpr_nand_verify_buf;
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#endif
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nand->dev_ready = alpr_nand_dev_ready;
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nand->dev_ready = alpr_nand_dev_ready;
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return 0;
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return 0;
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@ -18,9 +18,6 @@ static void sc_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len);
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static u_char sc_nand_read_byte(struct mtd_info *mtd);
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static u_char sc_nand_read_byte(struct mtd_info *mtd);
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static u16 sc_nand_read_word(struct mtd_info *mtd);
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static u16 sc_nand_read_word(struct mtd_info *mtd);
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static void sc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len);
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static void sc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len);
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#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
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static int sc_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len);
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#endif
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static int sc_nand_device_ready(struct mtd_info *mtdinfo);
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static int sc_nand_device_ready(struct mtd_info *mtdinfo);
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#define FPGA_NAND_CMD_MASK (0x7 << 28)
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#define FPGA_NAND_CMD_MASK (0x7 << 28)
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@ -102,25 +99,6 @@ static void sc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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}
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}
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}
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}
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#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
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/**
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* sc_nand_verify_buf - Verify chip data against buffer
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* @mtd: MTD device structure
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* @buf: buffer containing the data to compare
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* @len: number of bytes to compare
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*/
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static int sc_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
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{
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int i;
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for (i = 0; i < len; i++) {
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if (buf[i] != sc_nand_read_byte(mtd));
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return -EFAULT;
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}
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return 0;
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}
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#endif
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/**
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/**
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* sc_nand_device_ready - Check the NAND device is ready for next command.
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* sc_nand_device_ready - Check the NAND device is ready for next command.
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* @mtd: MTD device structure
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* @mtd: MTD device structure
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@ -178,9 +156,6 @@ int board_nand_init(struct nand_chip *nand)
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nand->read_word = sc_nand_read_word;
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nand->read_word = sc_nand_read_word;
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nand->write_buf = sc_nand_write_buf;
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nand->write_buf = sc_nand_write_buf;
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nand->read_buf = sc_nand_read_buf;
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nand->read_buf = sc_nand_read_buf;
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#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
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nand->verify_buf = sc_nand_verify_buf;
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#endif
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return 0;
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return 0;
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}
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}
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@ -405,18 +405,6 @@ static int nand_davinci_write_page(struct mtd_info *mtd, struct nand_chip *chip,
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goto err;
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goto err;
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}
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}
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#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
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/* Send command to read back the data */
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chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
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if (chip->verify_buf(mtd, buf, mtd->writesize)) {
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ret = -EIO;
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goto err;
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}
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/* Make sure the next page prog is preceded by a status read */
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chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
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#endif
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err:
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err:
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/* restore ECC layout */
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/* restore ECC layout */
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if (page < CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE) {
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if (page < CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE) {
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@ -561,41 +561,6 @@ static void fsl_elbc_read_buf(struct mtd_info *mtd, u8 *buf, int len)
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len, avail);
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len, avail);
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}
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}
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#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
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/*
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* Verify buffer against the FCM Controller Data Buffer
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*/
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static int fsl_elbc_verify_buf(struct mtd_info *mtd,
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const u_char *buf, int len)
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{
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struct nand_chip *chip = mtd->priv;
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struct fsl_elbc_mtd *priv = chip->priv;
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struct fsl_elbc_ctrl *ctrl = priv->ctrl;
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int i;
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if (len < 0) {
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printf("write_buf of %d bytes", len);
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return -EINVAL;
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}
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if ((unsigned int)len > ctrl->read_bytes - ctrl->index) {
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printf("verify_buf beyond end of buffer "
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"(%d requested, %u available)\n",
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len, ctrl->read_bytes - ctrl->index);
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ctrl->index = ctrl->read_bytes;
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return -EINVAL;
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}
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for (i = 0; i < len; i++)
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if (in_8(&ctrl->addr[ctrl->index + i]) != buf[i])
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break;
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ctrl->index += len;
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return i == len && ctrl->status == LTESR_CC ? 0 : -EIO;
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}
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#endif
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/* This function is called after Program and Erase Operations to
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/* This function is called after Program and Erase Operations to
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* check for success or failure.
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* check for success or failure.
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*/
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*/
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@ -727,9 +692,6 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr)
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nand->read_byte = fsl_elbc_read_byte;
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nand->read_byte = fsl_elbc_read_byte;
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nand->write_buf = fsl_elbc_write_buf;
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nand->write_buf = fsl_elbc_write_buf;
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nand->read_buf = fsl_elbc_read_buf;
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nand->read_buf = fsl_elbc_read_buf;
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#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
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nand->verify_buf = fsl_elbc_verify_buf;
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#endif
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nand->select_chip = fsl_elbc_select_chip;
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nand->select_chip = fsl_elbc_select_chip;
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nand->cmdfunc = fsl_elbc_cmdfunc;
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nand->cmdfunc = fsl_elbc_cmdfunc;
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nand->waitfunc = fsl_elbc_wait;
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nand->waitfunc = fsl_elbc_wait;
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@ -683,41 +683,6 @@ static void fsl_ifc_read_buf(struct mtd_info *mtd, u8 *buf, int len)
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__func__, len, avail);
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__func__, len, avail);
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}
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}
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#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
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/*
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* Verify buffer against the IFC Controller Data Buffer
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*/
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static int fsl_ifc_verify_buf(struct mtd_info *mtd,
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const u_char *buf, int len)
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{
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struct nand_chip *chip = mtd->priv;
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struct fsl_ifc_mtd *priv = chip->priv;
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struct fsl_ifc_ctrl *ctrl = priv->ctrl;
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int i;
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if (len < 0) {
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printf("%s of %d bytes", __func__, len);
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return -EINVAL;
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}
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if ((unsigned int)len > ctrl->read_bytes - ctrl->index) {
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printf("%s beyond end of buffer "
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"(%d requested, %u available)\n",
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__func__, len, ctrl->read_bytes - ctrl->index);
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ctrl->index = ctrl->read_bytes;
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return -EINVAL;
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}
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for (i = 0; i < len; i++)
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if (in_8(&ctrl->addr[ctrl->index + i]) != buf[i])
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break;
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ctrl->index += len;
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return i == len && ctrl->status == IFC_NAND_EVTER_STAT_OPC ? 0 : -EIO;
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}
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#endif
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/* This function is called after Program and Erase Operations to
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/* This function is called after Program and Erase Operations to
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* check for success or failure.
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* check for success or failure.
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*/
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*/
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@ -940,9 +905,6 @@ static int fsl_ifc_chip_init(int devnum, u8 *addr)
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nand->write_buf = fsl_ifc_write_buf;
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nand->write_buf = fsl_ifc_write_buf;
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nand->read_buf = fsl_ifc_read_buf;
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nand->read_buf = fsl_ifc_read_buf;
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#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
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nand->verify_buf = fsl_ifc_verify_buf;
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#endif
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nand->select_chip = fsl_ifc_select_chip;
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nand->select_chip = fsl_ifc_select_chip;
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nand->cmdfunc = fsl_ifc_cmdfunc;
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nand->cmdfunc = fsl_ifc_cmdfunc;
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nand->waitfunc = fsl_ifc_wait;
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nand->waitfunc = fsl_ifc_wait;
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@ -153,21 +153,6 @@ static void upm_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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buf[i] = in_8(chip->IO_ADDR_R);
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buf[i] = in_8(chip->IO_ADDR_R);
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}
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}
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#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
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static int upm_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
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{
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int i;
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struct nand_chip *chip = mtd->priv;
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for (i = 0; i < len; i++) {
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if (buf[i] != in_8(chip->IO_ADDR_R))
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return -EFAULT;
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}
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return 0;
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}
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#endif
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static int nand_dev_ready(struct mtd_info *mtd)
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static int nand_dev_ready(struct mtd_info *mtd)
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{
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{
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struct nand_chip *chip = mtd->priv;
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struct nand_chip *chip = mtd->priv;
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@ -193,9 +178,6 @@ int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun)
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chip->read_byte = upm_nand_read_byte;
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chip->read_byte = upm_nand_read_byte;
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chip->read_buf = upm_nand_read_buf;
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chip->read_buf = upm_nand_read_buf;
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chip->write_buf = upm_nand_write_buf;
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chip->write_buf = upm_nand_write_buf;
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#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
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chip->verify_buf = upm_nand_verify_buf;
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#endif
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if (fun->dev_ready)
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if (fun->dev_ready)
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chip->dev_ready = nand_dev_ready;
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chip->dev_ready = nand_dev_ready;
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@ -459,29 +459,6 @@ static void mpc5121_nfc_write_buf(struct mtd_info *mtd,
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mpc5121_nfc_buf_copy(mtd, (u_char *) buf, len, 1);
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mpc5121_nfc_buf_copy(mtd, (u_char *) buf, len, 1);
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}
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}
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#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
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/* Compare buffer with NAND flash */
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static int mpc5121_nfc_verify_buf(struct mtd_info *mtd,
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const u_char * buf, int len)
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{
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u_char tmp[256];
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uint bsize;
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while (len) {
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bsize = min(len, 256);
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mpc5121_nfc_read_buf(mtd, tmp, bsize);
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if (memcmp(buf, tmp, bsize))
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return 1;
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buf += bsize;
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len -= bsize;
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}
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return 0;
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}
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#endif
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/* Read byte from NFC buffers */
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/* Read byte from NFC buffers */
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static u8 mpc5121_nfc_read_byte(struct mtd_info *mtd)
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static u8 mpc5121_nfc_read_byte(struct mtd_info *mtd)
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{
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{
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@ -609,9 +586,6 @@ int board_nand_init(struct nand_chip *chip)
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chip->read_word = mpc5121_nfc_read_word;
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chip->read_word = mpc5121_nfc_read_word;
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chip->read_buf = mpc5121_nfc_read_buf;
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chip->read_buf = mpc5121_nfc_read_buf;
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chip->write_buf = mpc5121_nfc_write_buf;
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chip->write_buf = mpc5121_nfc_write_buf;
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#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
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chip->verify_buf = mpc5121_nfc_verify_buf;
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#endif
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chip->select_chip = mpc5121_nfc_select_chip;
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chip->select_chip = mpc5121_nfc_select_chip;
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chip->bbt_options = NAND_BBT_USE_FLASH;
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chip->bbt_options = NAND_BBT_USE_FLASH;
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chip->ecc.mode = NAND_ECC_SOFT;
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chip->ecc.mode = NAND_ECC_SOFT;
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@ -949,34 +949,6 @@ static void mxc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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host->col_addr = col;
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host->col_addr = col;
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}
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}
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#ifdef __UBOOT__
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#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
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/*
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* Used by the upper layer to verify the data in NAND Flash
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* with the data in the buf.
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*/
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static int mxc_nand_verify_buf(struct mtd_info *mtd,
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const u_char *buf, int len)
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{
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u_char tmp[256];
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uint bsize;
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while (len) {
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bsize = min(len, 256);
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mxc_nand_read_buf(mtd, tmp, bsize);
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if (memcmp(buf, tmp, bsize))
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return 1;
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buf += bsize;
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len -= bsize;
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}
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|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This function is used by upper layer for select and
|
* This function is used by upper layer for select and
|
||||||
* deselect of the NAND chip
|
* deselect of the NAND chip
|
||||||
|
@ -1207,11 +1179,6 @@ int board_nand_init(struct nand_chip *this)
|
||||||
this->read_word = mxc_nand_read_word;
|
this->read_word = mxc_nand_read_word;
|
||||||
this->write_buf = mxc_nand_write_buf;
|
this->write_buf = mxc_nand_write_buf;
|
||||||
this->read_buf = mxc_nand_read_buf;
|
this->read_buf = mxc_nand_read_buf;
|
||||||
#ifdef __UBOOT__
|
|
||||||
#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
|
|
||||||
this->verify_buf = mxc_nand_verify_buf;
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
host->regs = (struct mxc_nand_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE;
|
host->regs = (struct mxc_nand_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE;
|
||||||
#ifdef MXC_NFC_V3_2
|
#ifdef MXC_NFC_V3_2
|
||||||
|
|
|
@ -361,51 +361,6 @@ void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
|
||||||
ioread8_rep(chip->IO_ADDR_R, buf, len);
|
ioread8_rep(chip->IO_ADDR_R, buf, len);
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef __UBOOT__
|
|
||||||
#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
|
|
||||||
/**
|
|
||||||
* nand_verify_buf - [DEFAULT] Verify chip data against buffer
|
|
||||||
* @mtd: MTD device structure
|
|
||||||
* @buf: buffer containing the data to compare
|
|
||||||
* @len: number of bytes to compare
|
|
||||||
*
|
|
||||||
* Default verify function for 8bit buswidth.
|
|
||||||
*/
|
|
||||||
static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
struct nand_chip *chip = mtd->priv;
|
|
||||||
|
|
||||||
for (i = 0; i < len; i++)
|
|
||||||
if (buf[i] != readb(chip->IO_ADDR_R))
|
|
||||||
return -EFAULT;
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
|
|
||||||
* @mtd: MTD device structure
|
|
||||||
* @buf: buffer containing the data to compare
|
|
||||||
* @len: number of bytes to compare
|
|
||||||
*
|
|
||||||
* Default verify function for 16bit buswidth.
|
|
||||||
*/
|
|
||||||
static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
struct nand_chip *chip = mtd->priv;
|
|
||||||
u16 *p = (u16 *) buf;
|
|
||||||
len >>= 1;
|
|
||||||
|
|
||||||
for (i = 0; i < len; i++)
|
|
||||||
if (p[i] != readw(chip->IO_ADDR_R))
|
|
||||||
return -EFAULT;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* nand_write_buf16 - [DEFAULT] write buffer to chip
|
* nand_write_buf16 - [DEFAULT] write buffer to chip
|
||||||
* @mtd: MTD device structure
|
* @mtd: MTD device structure
|
||||||
|
@ -2435,20 +2390,6 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
|
||||||
status = chip->waitfunc(mtd, chip);
|
status = chip->waitfunc(mtd, chip);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
#ifdef __UBOOT__
|
|
||||||
#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
|
|
||||||
/* Send command to read back the data */
|
|
||||||
chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
|
|
||||||
|
|
||||||
if (chip->verify_buf(mtd, buf, mtd->writesize))
|
|
||||||
return -EIO;
|
|
||||||
|
|
||||||
/* Make sure the next page prog is preceded by a status read */
|
|
||||||
chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -3139,12 +3080,6 @@ static void nand_set_defaults(struct nand_chip *chip, int busw)
|
||||||
chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
|
chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
|
||||||
if (!chip->scan_bbt)
|
if (!chip->scan_bbt)
|
||||||
chip->scan_bbt = nand_default_bbt;
|
chip->scan_bbt = nand_default_bbt;
|
||||||
#ifdef __UBOOT__
|
|
||||||
#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
|
|
||||||
if (!chip->verify_buf)
|
|
||||||
chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
if (!chip->controller) {
|
if (!chip->controller) {
|
||||||
chip->controller = &chip->hwcontrol;
|
chip->controller = &chip->hwcontrol;
|
||||||
|
|
|
@ -118,21 +118,6 @@ static void ndfc_write_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len
|
||||||
out_be32((u32 *)(base + NDFC_DATA), *p++);
|
out_be32((u32 *)(base + NDFC_DATA), *p++);
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
|
|
||||||
static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len)
|
|
||||||
{
|
|
||||||
struct nand_chip *this = mtdinfo->priv;
|
|
||||||
ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
|
|
||||||
uint32_t *p = (uint32_t *) buf;
|
|
||||||
|
|
||||||
for (; len > 0; len -= 4)
|
|
||||||
if (*p++ != in_be32((u32 *)(base + NDFC_DATA)))
|
|
||||||
return -1;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Read a byte from the NDFC.
|
* Read a byte from the NDFC.
|
||||||
*/
|
*/
|
||||||
|
@ -207,9 +192,6 @@ int board_nand_init(struct nand_chip *nand)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
nand->write_buf = ndfc_write_buf;
|
nand->write_buf = ndfc_write_buf;
|
||||||
#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
|
|
||||||
nand->verify_buf = ndfc_verify_buf;
|
|
||||||
#endif
|
|
||||||
nand->read_byte = ndfc_read_byte;
|
nand->read_byte = ndfc_read_byte;
|
||||||
|
|
||||||
chip++;
|
chip++;
|
||||||
|
|
|
@ -391,7 +391,6 @@ unsigned long get_board_ddr_clk(void);
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
|
@ -198,7 +198,6 @@ extern unsigned long get_sdram_size(void);
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
||||||
|
|
|
@ -320,7 +320,6 @@ combinations. this should be removed later
|
||||||
/* NAND */
|
/* NAND */
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
|
@ -234,7 +234,6 @@
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (1024 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (1024 * 1024)
|
||||||
|
|
||||||
|
|
|
@ -272,7 +272,6 @@
|
||||||
"mtdparts=e2800000.flash:512k(uboot),128k(env),3m@1m(kernel),-(fs)"
|
"mtdparts=e2800000.flash:512k(uboot),128k(env),3m@1m(kernel),-(fs)"
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND 1
|
#define CONFIG_CMD_NAND 1
|
||||||
#define CONFIG_NAND_FSL_ELBC 1
|
#define CONFIG_NAND_FSL_ELBC 1
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE 16384
|
#define CONFIG_SYS_NAND_BLOCK_SIZE 16384
|
||||||
|
|
|
@ -245,7 +245,6 @@
|
||||||
"mtdparts=e0600000.flash:512k(uboot),128k(env),3m@1m(kernel),-(fs)"
|
"mtdparts=e0600000.flash:512k(uboot),128k(env),3m@1m(kernel),-(fs)"
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE 1
|
|
||||||
#define CONFIG_CMD_NAND 1
|
#define CONFIG_CMD_NAND 1
|
||||||
#define CONFIG_NAND_FSL_ELBC 1
|
#define CONFIG_NAND_FSL_ELBC 1
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE 16384
|
#define CONFIG_SYS_NAND_BLOCK_SIZE 16384
|
||||||
|
|
|
@ -283,7 +283,6 @@
|
||||||
* NAND Flash on the Local Bus
|
* NAND Flash on the Local Bus
|
||||||
*/
|
*/
|
||||||
#define CONFIG_CMD_NAND 1
|
#define CONFIG_CMD_NAND 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE 1
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_NAND_FSL_ELBC 1
|
#define CONFIG_NAND_FSL_ELBC 1
|
||||||
|
|
||||||
|
|
|
@ -308,7 +308,6 @@
|
||||||
CONFIG_SYS_NAND_BASE + 0x80000, \
|
CONFIG_SYS_NAND_BASE + 0x80000, \
|
||||||
CONFIG_SYS_NAND_BASE + 0xC0000}
|
CONFIG_SYS_NAND_BASE + 0xC0000}
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 4
|
#define CONFIG_SYS_MAX_NAND_DEVICE 4
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND 1
|
#define CONFIG_CMD_NAND 1
|
||||||
#define CONFIG_NAND_FSL_ELBC 1
|
#define CONFIG_NAND_FSL_ELBC 1
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
|
@ -194,7 +194,6 @@ extern unsigned long get_clock_freq(void);
|
||||||
#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
|
#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE 1
|
|
||||||
#define CONFIG_CMD_NAND 1
|
#define CONFIG_CMD_NAND 1
|
||||||
#define CONFIG_NAND_FSL_ELBC 1
|
#define CONFIG_NAND_FSL_ELBC 1
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
|
@ -303,7 +303,6 @@
|
||||||
CONFIG_SYS_NAND_BASE + 0x80000,\
|
CONFIG_SYS_NAND_BASE + 0x80000,\
|
||||||
CONFIG_SYS_NAND_BASE + 0xC0000}
|
CONFIG_SYS_NAND_BASE + 0xC0000}
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 4
|
#define CONFIG_SYS_MAX_NAND_DEVICE 4
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND 1
|
#define CONFIG_CMD_NAND 1
|
||||||
#define CONFIG_NAND_FSL_ELBC 1
|
#define CONFIG_NAND_FSL_ELBC 1
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
|
@ -444,7 +444,6 @@ extern unsigned long get_sdram_size(void);
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
|
|
||||||
#if defined(CONFIG_P1010RDB_PA)
|
#if defined(CONFIG_P1010RDB_PA)
|
||||||
|
|
|
@ -290,7 +290,6 @@
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
|
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND 1
|
#define CONFIG_CMD_NAND 1
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (256 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (256 * 1024)
|
||||||
#define CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE
|
#define CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE
|
||||||
|
|
|
@ -136,7 +136,6 @@ extern unsigned long get_clock_freq(void);
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
#define CONFIG_NAND_FSL_ELBC
|
#define CONFIG_NAND_FSL_ELBC
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
|
@ -251,7 +251,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
|
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
||||||
|
|
|
@ -398,7 +398,6 @@ unsigned long get_board_ddr_clk(void);
|
||||||
#define CONFIG_SYS_NAND_DDR_LAW 11
|
#define CONFIG_SYS_NAND_DDR_LAW 11
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
|
@ -379,7 +379,6 @@ unsigned long get_board_ddr_clk(void);
|
||||||
#define CONFIG_SYS_NAND_DDR_LAW 11
|
#define CONFIG_SYS_NAND_DDR_LAW 11
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
|
||||||
|
|
|
@ -308,7 +308,6 @@ unsigned long get_board_ddr_clk(void);
|
||||||
#define CONFIG_SYS_NAND_DDR_LAW 11
|
#define CONFIG_SYS_NAND_DDR_LAW 11
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
|
@ -341,7 +341,6 @@
|
||||||
#define CONFIG_SYS_NAND_DDR_LAW 11
|
#define CONFIG_SYS_NAND_DDR_LAW 11
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
|
||||||
|
|
|
@ -357,7 +357,6 @@ unsigned long get_board_ddr_clk(void);
|
||||||
#define CONFIG_SYS_NAND_DDR_LAW 11
|
#define CONFIG_SYS_NAND_DDR_LAW 11
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
||||||
|
|
|
@ -328,7 +328,6 @@ unsigned long get_board_ddr_clk(void);
|
||||||
#define CONFIG_SYS_NAND_DDR_LAW 11
|
#define CONFIG_SYS_NAND_DDR_LAW 11
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
|
||||||
|
|
||||||
|
|
|
@ -281,7 +281,6 @@ unsigned long get_board_ddr_clk(void);
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
|
@ -467,7 +467,6 @@ unsigned long get_board_ddr_clk(void);
|
||||||
#define CONFIG_SYS_NAND_DDR_LAW 11
|
#define CONFIG_SYS_NAND_DDR_LAW 11
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
|
||||||
|
|
|
@ -248,7 +248,6 @@
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
|
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
||||||
|
|
|
@ -214,7 +214,6 @@
|
||||||
#define CONFIG_SYS_NAND_BASE 0xE1000000
|
#define CONFIG_SYS_NAND_BASE 0xE1000000
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_SYS_NAND_MAX_CHIPS 1
|
#define CONFIG_SYS_NAND_MAX_CHIPS 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_NAND_FSL_ELBC
|
#define CONFIG_NAND_FSL_ELBC
|
||||||
#define CONFIG_SYS_NAND_PAGE_SIZE (2048)
|
#define CONFIG_SYS_NAND_PAGE_SIZE (2048)
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
|
||||||
|
|
|
@ -167,7 +167,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
|
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
||||||
|
|
|
@ -251,7 +251,6 @@ unsigned long get_board_ddr_clk(void);
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
|
@ -191,7 +191,6 @@
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
|
@ -494,7 +494,6 @@
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND
|
#define CONFIG_CMD_NAND
|
||||||
#if defined(CONFIG_P1020RDB_PD)
|
#if defined(CONFIG_P1020RDB_PD)
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
|
||||||
|
|
|
@ -186,7 +186,6 @@
|
||||||
*/
|
*/
|
||||||
#define CONFIG_SYS_NAND_BASE 0x61000000
|
#define CONFIG_SYS_NAND_BASE 0x61000000
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_CMD_NAND 1
|
#define CONFIG_CMD_NAND 1
|
||||||
#define CONFIG_NAND_FSL_ELBC 1
|
#define CONFIG_NAND_FSL_ELBC 1
|
||||||
#define CONFIG_SYS_NAND_BLOCK_SIZE 16384
|
#define CONFIG_SYS_NAND_BLOCK_SIZE 16384
|
||||||
|
|
|
@ -131,7 +131,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \
|
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \
|
||||||
CONFIG_SYS_NAND_BASE2}
|
CONFIG_SYS_NAND_BASE2}
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 2
|
#define CONFIG_SYS_MAX_NAND_DEVICE 2
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_SYS_NAND_QUIET_TEST /* 2nd NAND flash not always populated */
|
#define CONFIG_SYS_NAND_QUIET_TEST /* 2nd NAND flash not always populated */
|
||||||
#define CONFIG_NAND_FSL_ELBC
|
#define CONFIG_NAND_FSL_ELBC
|
||||||
|
|
||||||
|
|
|
@ -122,7 +122,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
|
||||||
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \
|
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \
|
||||||
CONFIG_SYS_NAND_BASE2}
|
CONFIG_SYS_NAND_BASE2}
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 2
|
#define CONFIG_SYS_MAX_NAND_DEVICE 2
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_SYS_NAND_QUIET_TEST /* 2nd NAND flash not always populated */
|
#define CONFIG_SYS_NAND_QUIET_TEST /* 2nd NAND flash not always populated */
|
||||||
#define CONFIG_NAND_FSL_ELBC
|
#define CONFIG_NAND_FSL_ELBC
|
||||||
|
|
||||||
|
|
|
@ -678,11 +678,6 @@ struct nand_chip {
|
||||||
void (*write_byte)(struct mtd_info *mtd, uint8_t byte);
|
void (*write_byte)(struct mtd_info *mtd, uint8_t byte);
|
||||||
void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
|
void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
|
||||||
void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
|
void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
|
||||||
#ifdef __UBOOT__
|
|
||||||
#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
|
|
||||||
int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
void (*select_chip)(struct mtd_info *mtd, int chip);
|
void (*select_chip)(struct mtd_info *mtd, int chip);
|
||||||
int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
|
int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
|
||||||
int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
|
int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
|
||||||
|
|
Loading…
Reference in a new issue