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armv8: ls2085a: Add support of LS2085A SoC

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Freescale's LS2085A is a another personality of LS2080A SoC with
support of AIOP and DP-DDR.
This Patch adds support of LS2085A Personality.

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: Updated MAINTAINERS files
           Dropped #ifdef in cpu.h
           Add CONFIG_SYS_NS16550=y in defconfig]
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Prabhakar Kushwaha 2015-11-09 16:42:20 +05:30 committed by York Sun
parent 449372148f
commit 06b5301043
29 changed files with 140 additions and 20 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
arch/arm/cpu/armv8/fsl-layerscape/Makefile
View file

@ -23,8 +23,12 @@ endif
ifneq ($(CONFIG_LS2080A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls2080a_serdes.o
else
endif
ifneq ($(CONFIG_LS2085A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls2080a_serdes.o
endif
ifneq ($(CONFIG_LS1043A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls1043a_serdes.o
endif
endif

5
arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
View file

@ -28,7 +28,12 @@ static struct serdes_config serdes1_cfg_tbl[] = {
SGMII1 } },
{0x26, {SGMII8, SGMII7, SGMII6, SGMII5, SGMII4, SGMII3, XFI2, XFI1 } },
{0x28, {SGMII8, SGMII7, SGMII6, SGMII5, XFI4, XFI3, XFI2, XFI1 } },
#ifdef CONFIG_LS2080A
{0x2A, {NONE, NONE, NONE, XFI5, XFI4, XFI3, XFI2, XFI1 } },
#endif
#ifdef CONFIG_LS2085A
{0x2A, {XFI8, XFI7, XFI6, XFI5, XFI4, XFI3, XFI2, XFI1 } },
#endif
{0x2B, {SGMII8, SGMII7, SGMII6, SGMII5, XAUI1, XAUI1, XAUI1, XAUI1 } },
{0x32, {XAUI2, XAUI2, XAUI2, XAUI2, XAUI1, XAUI1, XAUI1, XAUI1 } },
{0x33, {PCIE2, PCIE2, PCIE2, PCIE2, QSGMII_C, QSGMII_D, QSGMII_A,

2
arch/arm/cpu/armv8/fsl-layerscape/soc.c
View file

@ -12,7 +12,7 @@
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_LS2080A
#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
static void erratum_a008751(void)
{
#ifdef CONFIG_SYS_FSL_ERRATUM_A008751

4
arch/arm/cpu/armv8/fsl-layerscape/spl.c
View file

@ -48,7 +48,7 @@ void board_init_f(ulong dummy)
gd = &gdata;
/* Clear global data */
memset((void *)gd, 0, sizeof(gd_t));
#ifdef CONFIG_LS2080A
#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
arch_cpu_init();
#endif
#ifdef CONFIG_FSL_IFC
@ -56,7 +56,7 @@ void board_init_f(ulong dummy)
#endif
board_early_init_f();
timer_init();
#ifdef CONFIG_LS2080A
#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
env_init();
#endif
get_clocks();

8
arch/arm/include/asm/arch-fsl-layerscape/config.h
View file

@ -17,10 +17,16 @@
#define CONFIG_SYS_FSL_DDR /* Freescale DDR driver */
#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0
#if defined(CONFIG_LS2080A)
#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
#define CONFIG_MAX_CPUS 16
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
#ifdef CONFIG_LS2080A
#define CONFIG_NUM_DDR_CONTROLLERS 2
#endif
#ifdef CONFIG_LS2085A
#define CONFIG_NUM_DDR_CONTROLLERS 3
#define CONFIG_SYS_FSL_HAS_DP_DDR
#endif
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4, 4 }
#define SRDS_MAX_LANES 8
#define CONFIG_SYS_FSL_SRDS_1

2
arch/arm/include/asm/arch-fsl-layerscape/cpu.h
View file

@ -180,7 +180,7 @@ static const struct sys_mmu_table final_mmu_table[] = {
CONFIG_SYS_PCIE2_PHYS_SIZE, MT_DEVICE_NGNRNE, PMD_SECT_NON_SHARE },
{ CONFIG_SYS_PCIE3_PHYS_ADDR, CONFIG_SYS_PCIE3_PHYS_ADDR,
CONFIG_SYS_PCIE3_PHYS_SIZE, MT_DEVICE_NGNRNE, PMD_SECT_NON_SHARE },
#ifdef CONFIG_LS2080A
#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
{ CONFIG_SYS_PCIE4_PHYS_ADDR, CONFIG_SYS_PCIE4_PHYS_ADDR,
CONFIG_SYS_PCIE4_PHYS_SIZE, MT_DEVICE_NGNRNE, PMD_SECT_NON_SHARE },
#endif

2
arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
View file

@ -9,7 +9,7 @@
#include <config.h>
#if defined(CONFIG_LS2080A)
#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
enum srds_prtcl {
NONE = 0,
PCIE1,

2
board/freescale/ls2080a/MAINTAINERS
View file

@ -6,3 +6,5 @@ F: include/configs/ls2080a_emu.h
F: configs/ls2080a_emu_defconfig
F: include/configs/ls2080a_simu.h
F: configs/ls2080a_simu_defconfig
F: configs/ls2085a_emu_defconfig
F: configs/ls2085a_simu_defconfig

2
board/freescale/ls2080aqds/MAINTAINERS
View file

@ -6,3 +6,5 @@ F: board/freescale/ls2080a/ls2080aqds.c
F: include/configs/ls2080aqds.h
F: configs/ls2080aqds_defconfig
F: configs/ls2080aqds_nand_defconfig
F: configs/ls2085aqds_defconfig
F: configs/ls2085aqds_nand_defconfig

2
board/freescale/ls2080ardb/MAINTAINERS
View file

@ -6,3 +6,5 @@ F: board/freescale/ls2080a/ls2080ardb.c
F: include/configs/ls2080ardb.h
F: configs/ls2080ardb_defconfig
F: configs/ls2080ardb_nand_defconfig
F: configs/ls2085ardb_defconfig
F: configs/ls2085ardb_nand_defconfig

2
configs/ls2080a_emu_defconfig
View file

@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2080A_EMU=y
CONFIG_SYS_EXTRA_OPTIONS="EMU,SYS_FSL_DDR4"
CONFIG_SYS_EXTRA_OPTIONS="EMU,SYS_FSL_DDR4, LS2080A"
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set

2
configs/ls2080a_simu_defconfig
View file

@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2080A_SIMU=y
CONFIG_SYS_EXTRA_OPTIONS="SIMU"
CONFIG_SYS_EXTRA_OPTIONS="SIMU, LS2080A"
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set

2
configs/ls2080aqds_defconfig
View file

@ -4,7 +4,7 @@ CONFIG_TARGET_LS2080AQDS=y
CONFIG_DM_SPI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y

2
configs/ls2080aqds_nand_defconfig
View file

@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2080AQDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND"
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, NAND, LS2080A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETDEVICES=y

2
configs/ls2080ardb_defconfig
View file

@ -4,7 +4,7 @@ CONFIG_TARGET_LS2080ARDB=y
CONFIG_DM_SPI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb"
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y

2
configs/ls2080ardb_nand_defconfig
View file

@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2080ARDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND"
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, NAND, LS2080A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETDEVICES=y

15
configs/ls2085a_emu_defconfig Normal file
View file

@ -0,0 +1,15 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2080A_EMU=y
CONFIG_SYS_EXTRA_OPTIONS="EMU,SYS_FSL_DDR4, LS2085A"
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_SYS_NS16550=y

16
configs/ls2085a_simu_defconfig Normal file
View file

@ -0,0 +1,16 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2080A_SIMU=y
CONFIG_SYS_EXTRA_OPTIONS="SIMU, LS2085A"
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_NS16550=y

15
configs/ls2085aqds_defconfig Normal file
View file

@ -0,0 +1,15 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2080AQDS=y
# CONFIG_SYS_MALLOC_F is not set
CONFIG_DM_SPI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2085A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_DSPI=y

9
configs/ls2085aqds_nand_defconfig Normal file
View file

@ -0,0 +1,9 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2080AQDS=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND,LS2085A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y

15
configs/ls2085ardb_defconfig Normal file
View file

@ -0,0 +1,15 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2080ARDB=y
# CONFIG_SYS_MALLOC_F is not set
CONFIG_DM_SPI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb"
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2085A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_DSPI=y

9
configs/ls2085ardb_nand_defconfig Normal file
View file

@ -0,0 +1,9 @@
CONFIG_ARM=y
CONFIG_TARGET_LS2080ARDB=y
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,NAND,LS2085A"
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y

4
drivers/ddr/fsl/fsl_ddr_gen4.c
View file

@ -107,14 +107,14 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
goto step2;
#ifdef CONFIG_SYS_FSL_ERRATUM_A008336
#ifdef CONFIG_LS2080A
#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
/* A008336 only applies to general DDR controllers */
if ((ctrl_num == 0) || (ctrl_num == 1))
#endif
ddr_out32(eddrtqcr1, 0x63b30002);
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_A008514
#ifdef CONFIG_LS2080A
#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
/* A008514 only applies to DP-DDR controler */
if (ctrl_num == 2)
#endif

1
drivers/net/ldpaa_eth/Makefile
View file

@ -7,3 +7,4 @@
obj-y += ldpaa_wriop.o
obj-y += ldpaa_eth.o
obj-$(CONFIG_LS2080A) += ls2080a.o
obj-$(CONFIG_LS2085A) += ls2080a.o

2
drivers/pci/pcie_layerscape.c
View file

@ -665,7 +665,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
}
#endif
#ifdef CONFIG_LS2080A
#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
void pcie_set_available_streamids(void *blob, const char *pcie_path,
u32 *stream_ids, int count)

9
include/configs/ls2080a_common.h
View file

@ -11,7 +11,6 @@
#define CONFIG_REMAKE_ELF
#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_FSL_LSCH3
#define CONFIG_LS2080A
#define CONFIG_MP
#define CONFIG_GICV3
#define CONFIG_FSL_TZPC_BP147
@ -184,7 +183,7 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000
#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000
#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000
#ifndef CONFIG_LS2080A
#ifdef CONFIG_LS2085A
#define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 0x200000
#define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 0x07000000
#endif
@ -208,7 +207,13 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_PCIE3 /* PCIE controler 3 */
#define CONFIG_PCIE4 /* PCIE controler 4 */
#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
#ifdef CONFIG_LS2080A
#define FSL_PCIE_COMPAT "fsl,ls2080a-pcie"
#endif
#ifdef CONFIG_LS2085A
#define FSL_PCIE_COMPAT "fsl,ls2085a-pcie"
#endif
#define CONFIG_SYS_PCI_64BIT

7
include/configs/ls2080a_emu.h
View file

@ -9,8 +9,15 @@
#include "ls2080a_common.h"
#ifdef CONFIG_LS2080A
#define CONFIG_IDENT_STRING " LS2080A-EMU"
#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2080A-EMU"
#endif
#ifdef CONFIG_LS2085A
#define CONFIG_IDENT_STRING " LS2085A-EMU"
#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-EMU"
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 133333333

7
include/configs/ls2080a_simu.h
View file

@ -9,8 +9,15 @@
#include "ls2080a_common.h"
#ifdef CONFIG_LS2080A
#define CONFIG_IDENT_STRING " LS2080A-SIMU"
#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2080A-SIMU"
#endif
#ifdef CONFIG_LS2085A
#define CONFIG_IDENT_STRING " LS2085A-SIMU"
#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-SIMU"
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 133333333

2
include/linux/usb/xhci-fsl.h
View file

@ -54,7 +54,7 @@ struct fsl_xhci {
#if defined(CONFIG_LS102XA)
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS102XA_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
#elif defined(CONFIG_LS2080A)
#elif defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS2080A_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_LS2080A_XHCI_USB2_ADDR
#endif