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riscv: Modify generic codes to support RISC-V
Support common commands bdinfo and image format, also modify common generic flow for RISC-V. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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6 changed files with 29 additions and 3 deletions
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@ -54,6 +54,10 @@ config PPC
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select HAVE_PRIVATE_LIBGCC
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select SUPPORT_OF_CONTROL
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config RISCV
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bool "riscv architecture"
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select SUPPORT_OF_CONTROL
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config SANDBOX
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bool "Sandbox"
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select BOARD_LATE_INIT
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@ -194,3 +198,4 @@ source "arch/sandbox/Kconfig"
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source "arch/sh/Kconfig"
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source "arch/x86/Kconfig"
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source "arch/xtensa/Kconfig"
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source "arch/riscv/Kconfig"
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15
cmd/bdinfo.c
15
cmd/bdinfo.c
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@ -417,6 +417,21 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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return 0;
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}
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#elif defined(CONFIG_RISCV)
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int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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bd_t *bd = gd->bd;
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print_num("arch_number", bd->bi_arch_number);
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print_bi_boot_params(bd);
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print_bi_dram(bd);
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print_eth_ip_addr();
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print_baudrate();
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return 0;
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}
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#elif defined(CONFIG_ARC)
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int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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@ -218,7 +218,7 @@ static int setup_mon_len(void)
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gd->mon_len = (ulong)&_end - (ulong)_init;
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#elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
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gd->mon_len = CONFIG_SYS_MONITOR_LEN;
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#elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
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#elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
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gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
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#elif defined(CONFIG_SYS_MONITOR_BASE)
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/* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
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@ -126,7 +126,7 @@ static int initr_reloc_global_data(void)
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{
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#ifdef __ARM__
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monitor_flash_len = _end - __image_copy_start;
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#elif defined(CONFIG_NDS32)
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#elif defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
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monitor_flash_len = (ulong)&_end - (ulong)&_start;
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#elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2)
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monitor_flash_len = (ulong)&__init_end - gd->relocaddr;
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@ -704,7 +704,7 @@ static init_fnc_t init_sequence_r[] = {
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#ifdef CONFIG_DM
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initr_dm,
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#endif
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#if defined(CONFIG_ARM) || defined(CONFIG_NDS32)
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#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
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board_init, /* Setup chipselects */
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#endif
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/*
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@ -613,6 +613,11 @@ unsigned long elf_hash(const unsigned char *name);
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#define R_AARCH64_NONE 0 /* No relocation. */
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#define R_AARCH64_RELATIVE 1027 /* Adjust by program base. */
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/* RISC-V relocations */
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#define R_RISCV_32 1
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#define R_RISCV_64 2
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#define R_RISCV_RELATIVE 3
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#ifndef __ASSEMBLER__
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int valid_elf_image(unsigned long addr);
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#endif
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@ -190,6 +190,7 @@ enum {
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IH_ARCH_ARC, /* Synopsys DesignWare ARC */
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IH_ARCH_X86_64, /* AMD x86_64, Intel and Via */
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IH_ARCH_XTENSA, /* Xtensa */
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IH_ARCH_RISCV, /* RISC-V */
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IH_ARCH_COUNT,
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};
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