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Kconfig: Move TEXT_BASE et al under general setup
These don't relate to booting. Move them out of there and into the same place as the other related settings. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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2 changed files with 65 additions and 65 deletions
65
Kconfig
65
Kconfig
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@ -585,6 +585,71 @@ config MP
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This provides an option to bringup different processors
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in multiprocessor cases.
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config HAVE_TEXT_BASE
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bool
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depends on !NIOS2 && !XTENSA
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depends on !EFI_APP
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default y
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config TEXT_BASE
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depends on HAVE_TEXT_BASE
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default 0x0 if POSITION_INDEPENDENT
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default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3
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default 0x81700000 if MACH_SUNIV
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default 0x2a000000 if MACH_SUN9I
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default 0x4a000000 if SUNXI_MINIMUM_DRAM_MB >= 256
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default 0x42e00000 if SUNXI_MINIMUM_DRAM_MB >= 64
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hex "Text Base"
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help
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The address in memory that U-Boot will be running from, initially.
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config HAVE_SYS_MONITOR_BASE
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bool
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depends on ARC || MIPS || M68K || NIOS2 || PPC || XTENSA || X86 \
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|| ENV_IS_IN_FLASH || MTD_NOR_FLASH
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depends on !EFI_APP
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default y
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config SYS_MONITOR_BASE
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depends on HAVE_SYS_MONITOR_BASE
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hex "Physical start address of boot monitor code"
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default TEXT_BASE
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help
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The physical start address of boot monitor code (which is the same as
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CONFIG_TEXT_BASE when linking) and the same as CFG_SYS_FLASH_BASE
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when booting from flash.
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config SPL_SYS_MONITOR_BASE
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depends on MPC85xx && SPL && HAVE_SYS_MONITOR_BASE
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hex "Physical start address of SPL monitor code"
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default SPL_TEXT_BASE
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config TPL_SYS_MONITOR_BASE
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depends on MPC85xx && TPL && HAVE_SYS_MONITOR_BASE
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hex "Physical start address of TPL monitor code"
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config DYNAMIC_SYS_CLK_FREQ
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bool "Determine CPU clock frequency at run-time"
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help
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Implement a get_board_sys_clk function that will determine the CPU
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clock frequency at run time, rather than define it statically.
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config SYS_CLK_FREQ
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depends on !DYNAMIC_SYS_CLK_FREQ
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int "CPU clock frequency"
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default 125000000 if ARCH_LS1012A
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default 100000000 if ARCH_P2020 || ARCH_T1024 || ARCH_T1042 || \
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ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
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default 66666666 if ARCH_P1010 || ARCH_P1020 || ARCH_T4240
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default 66660000 if ARCH_T2080
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default 33333333 if RCAR_GEN3
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default 24000000 if ARCH_EXYNOS
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default 20000000 if RCAR_GEN2
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default 0
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help
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A static value for the CPU frequency. Note that if not required
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for a given SoC, this can be left at 0.
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source "api/Kconfig"
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endmenu # General setup
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65
boot/Kconfig
65
boot/Kconfig
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@ -693,71 +693,6 @@ config SUPPORT_RAW_INITRD
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address of the initrd must be augmented by it's size, in the following
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format: "<initrd address>:<initrd size>".
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config HAVE_TEXT_BASE
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bool
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depends on !NIOS2 && !XTENSA
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depends on !EFI_APP
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default y
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config TEXT_BASE
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depends on HAVE_TEXT_BASE
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default 0x0 if POSITION_INDEPENDENT
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default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3
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default 0x81700000 if MACH_SUNIV
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default 0x2a000000 if MACH_SUN9I
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default 0x4a000000 if SUNXI_MINIMUM_DRAM_MB >= 256
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default 0x42e00000 if SUNXI_MINIMUM_DRAM_MB >= 64
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hex "Text Base"
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help
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The address in memory that U-Boot will be running from, initially.
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config HAVE_SYS_MONITOR_BASE
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bool
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depends on ARC || MIPS || M68K || NIOS2 || PPC || XTENSA || X86 \
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|| ENV_IS_IN_FLASH || MTD_NOR_FLASH
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depends on !EFI_APP
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default y
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config SYS_MONITOR_BASE
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depends on HAVE_SYS_MONITOR_BASE
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hex "Physical start address of boot monitor code"
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default TEXT_BASE
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help
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The physical start address of boot monitor code (which is the same as
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CONFIG_TEXT_BASE when linking) and the same as CFG_SYS_FLASH_BASE
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when booting from flash.
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config SPL_SYS_MONITOR_BASE
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depends on MPC85xx && SPL && HAVE_SYS_MONITOR_BASE
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hex "Physical start address of SPL monitor code"
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default SPL_TEXT_BASE
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config TPL_SYS_MONITOR_BASE
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depends on MPC85xx && TPL && HAVE_SYS_MONITOR_BASE
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hex "Physical start address of TPL monitor code"
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config DYNAMIC_SYS_CLK_FREQ
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bool "Determine CPU clock frequency at run-time"
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help
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Implement a get_board_sys_clk function that will determine the CPU
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clock frequency at run time, rather than define it statically.
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config SYS_CLK_FREQ
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depends on !DYNAMIC_SYS_CLK_FREQ
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int "CPU clock frequency"
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default 125000000 if ARCH_LS1012A
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default 100000000 if ARCH_P2020 || ARCH_T1024 || ARCH_T1042 || \
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ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
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default 66666666 if ARCH_P1010 || ARCH_P1020 || ARCH_T4240
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default 66660000 if ARCH_T2080
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default 33333333 if RCAR_GEN3
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default 24000000 if ARCH_EXYNOS
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default 20000000 if RCAR_GEN2
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default 0
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help
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A static value for the CPU frequency. Note that if not required
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for a given SoC, this can be left at 0.
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config ARCH_FIXUP_FDT_MEMORY
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bool "Enable arch_fixup_memory_banks() call"
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default y
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