From 69820e02d2251d27238139ffa8f4c2ff9a07dca4 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Mon, 2 May 2022 11:42:22 +0200 Subject: [PATCH 01/19] arm: dts: rockchip: rk3288: rename mmc nodenames The boot_devices constants for rk3288 were changed to match the binding, but the dtsi file was not synced. Fix by renaming the rk3288 mmc node names. Also correct the clock name for "ciu-drive". Signed-off-by: Johan Jonker Reviewed-by: Kever Yang --- arch/arm/dts/rk3288.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi index 9fb6d86bc1..53ee760b98 100644 --- a/arch/arm/dts/rk3288.dtsi +++ b/arch/arm/dts/rk3288.dtsi @@ -109,48 +109,48 @@ ports = <&vopl_out>, <&vopb_out>; }; - sdmmc: dwmmc@ff0c0000 { + sdmmc: mmc@ff0c0000 { compatible = "rockchip,rk3288-dw-mshc"; max-frequency = <150000000>; clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; interrupts = ; reg = <0xff0c0000 0x4000>; status = "disabled"; }; - sdio0: dwmmc@ff0d0000 { + sdio0: mmc@ff0d0000 { compatible = "rockchip,rk3288-dw-mshc"; max-frequency = <150000000>; clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>, <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>; - clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; interrupts = ; reg = <0xff0d0000 0x4000>; status = "disabled"; }; - sdio1: dwmmc@ff0e0000 { + sdio1: mmc@ff0e0000 { compatible = "rockchip,rk3288-dw-mshc"; max-frequency = <150000000>; clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>, <&cru SCLK_SDIO1_DRV>, <&cru SCLK_SDIO1_SAMPLE>; - clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; interrupts = ; reg = <0xff0e0000 0x4000>; status = "disabled"; }; - emmc: dwmmc@ff0f0000 { + emmc: mmc@ff0f0000 { compatible = "rockchip,rk3288-dw-mshc"; max-frequency = <150000000>; clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; interrupts = ; reg = <0xff0f0000 0x4000>; From fc1526f651a557ddbf7c3cba8575be963573871f Mon Sep 17 00:00:00 2001 From: Han Pengfei Date: Sun, 15 May 2022 14:11:59 +0800 Subject: [PATCH 02/19] drivers: ram: rockchip: Fix dram channels calculation for rk3399 Only add the dram channel when we finally setup it successfully at the last step. Signed-off-by: Han Pengfei Reviewed-by: Kever Yang --- drivers/ram/rockchip/sdram_rk3399.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index c0a06dcaed..8b4d525292 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -2964,8 +2964,6 @@ static int sdram_init(struct dram_info *dram, if (cap_info->rank == 0) { clear_channel_params(params, 1); continue; - } else { - params->base.num_channels++; } if (IS_ENABLED(CONFIG_RAM_ROCKCHIP_DEBUG)) { @@ -2991,6 +2989,8 @@ static int sdram_init(struct dram_info *dram, printf("no ddrconfig find, Cap not support!\n"); continue; } + + params->base.num_channels++; set_ddrconfig(chan, params, channel, cap_info->ddrconfig); set_cap_relate_config(chan, params, channel); } From 7b561e2ab8ac980023c5e5325f45a8ca1951c0dd Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 11 Aug 2022 08:58:46 +0100 Subject: [PATCH 03/19] ram: rk3399: Fix .set_rate_index() error handling Functions pointed to by this op pointer can return non-zero values indicating an error. Ensure any error value is propagated back up the call-chain. Signed-off-by: Lee Jones Tested-by: Xavier Drudis Ferran Reviewed-by: Kever Yang --- drivers/ram/rockchip/sdram_rk3399.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 8b4d525292..5faff39641 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -3005,7 +3005,9 @@ static int sdram_init(struct dram_info *dram, params->base.stride = calculate_stride(params); dram_all_config(dram, params); - dram->ops->set_rate_index(dram, params); + ret = dram->ops->set_rate_index(dram, params); + if (ret) + return ret; debug("Finish SDRAM initialization...\n"); return 0; From daef678cffb9fb387c44d45d827d2b8ea199eb5b Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 11 Aug 2022 08:58:47 +0100 Subject: [PATCH 04/19] ram: rk3399: Fix faulty frequency change reports Frequency changes to 400MHz are presently reported as: lpddr4_set_rate_0: change freq to 400000000 mhz 0, 1 This is obviously wrong by 6 orders of magnitude. Ensure frequency changes are reported accurately. Signed-off-by: Lee Jones Tested-by: Xavier Drudis Ferran Reviewed-by: Kever Yang --- drivers/ram/rockchip/sdram_rk3399.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 5faff39641..f76904f05b 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -2552,8 +2552,8 @@ static int lpddr4_set_rate(struct dram_info *dram, dfs_cfgs_lpddr4[ctl_fn].base.ddr_freq); if (IS_ENABLED(CONFIG_RAM_ROCKCHIP_DEBUG)) - printf("%s: change freq to %d mhz %d, %d\n", __func__, - dfs_cfgs_lpddr4[ctl_fn].base.ddr_freq, + printf("%s: change freq to %dMHz %d, %d\n", __func__, + dfs_cfgs_lpddr4[ctl_fn].base.ddr_freq / MHz, ctl_fn, phy_fn); } From 337e92e79c95ffb8c0c6e7b4023c955c50fca018 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 11 Aug 2022 08:58:48 +0100 Subject: [PATCH 05/19] ram: rk3399: Conduct memory training at 400MHz MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently the default initialisation frequency is 50MHz. Although this does appear to be suitable for some LPDDR4 RAM chips, training at this low frequency has been seen to cause Column errors, leading to Capacity check errors on others. Here we force RAM initialisation to happen at 400MHz before ramping up to the final value running value of 800MHz after everything has been successfully configured. Link: https://lore.kernel.org/u-boot/Yo4v3jUeHXTovjOH@google.com/ Suggested-by: YouMin Chen Signed-off-by: Lee Jones Tested-by: Xavier Drudis Ferran Reviewed-by: Kever Yang Tested-by: Michal Suchánek --- drivers/ram/rockchip/sdram_rk3399.c | 36 +++++++++++++++++------------ 1 file changed, 21 insertions(+), 15 deletions(-) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index f76904f05b..cbf502bd0e 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -85,7 +85,7 @@ struct sdram_rk3399_ops { int (*data_training_first)(struct dram_info *dram, u32 channel, u8 rank, struct rk3399_sdram_params *sdram); int (*set_rate_index)(struct dram_info *dram, - struct rk3399_sdram_params *params); + struct rk3399_sdram_params *params, u32 ctl_fn); void (*modify_param)(const struct chan_info *chan, struct rk3399_sdram_params *params); struct rk3399_sdram_params * @@ -1644,7 +1644,8 @@ static int data_training_first(struct dram_info *dram, u32 channel, u8 rank, } static int switch_to_phy_index1(struct dram_info *dram, - struct rk3399_sdram_params *params) + struct rk3399_sdram_params *params, + u32 unused) { u32 channel; u32 *denali_phy; @@ -2539,26 +2540,25 @@ static int lpddr4_set_ctl(struct dram_info *dram, } static int lpddr4_set_rate(struct dram_info *dram, - struct rk3399_sdram_params *params) + struct rk3399_sdram_params *params, + u32 ctl_fn) { - u32 ctl_fn; u32 phy_fn; - for (ctl_fn = 0; ctl_fn < 2; ctl_fn++) { - phy_fn = lpddr4_get_phy_fn(params, ctl_fn); + phy_fn = lpddr4_get_phy_fn(params, ctl_fn); - lpddr4_set_phy(dram, params, phy_fn, &dfs_cfgs_lpddr4[ctl_fn]); - lpddr4_set_ctl(dram, params, ctl_fn, - dfs_cfgs_lpddr4[ctl_fn].base.ddr_freq); + lpddr4_set_phy(dram, params, phy_fn, &dfs_cfgs_lpddr4[ctl_fn]); + lpddr4_set_ctl(dram, params, ctl_fn, + dfs_cfgs_lpddr4[ctl_fn].base.ddr_freq); - if (IS_ENABLED(CONFIG_RAM_ROCKCHIP_DEBUG)) - printf("%s: change freq to %dMHz %d, %d\n", __func__, - dfs_cfgs_lpddr4[ctl_fn].base.ddr_freq / MHz, - ctl_fn, phy_fn); - } + if (IS_ENABLED(CONFIG_RAM_ROCKCHIP_DEBUG)) + printf("%s: change freq to %dMHz %d, %d\n", __func__, + dfs_cfgs_lpddr4[ctl_fn].base.ddr_freq / MHz, + ctl_fn, phy_fn); return 0; } + #endif /* CONFIG_RAM_RK3399_LPDDR4 */ /* CS0,n=1 @@ -2955,6 +2955,12 @@ static int sdram_init(struct dram_info *dram, params->ch[ch].cap_info.rank = rank; } +#if defined(CONFIG_RAM_RK3399_LPDDR4) + /* LPDDR4 needs to be trained at 400MHz */ + lpddr4_set_rate(dram, params, 0); + params->base.ddr_freq = dfs_cfgs_lpddr4[0].base.ddr_freq / MHz; +#endif + params->base.num_channels = 0; for (channel = 0; channel < 2; channel++) { const struct chan_info *chan = &dram->chan[channel]; @@ -3005,7 +3011,7 @@ static int sdram_init(struct dram_info *dram, params->base.stride = calculate_stride(params); dram_all_config(dram, params); - ret = dram->ops->set_rate_index(dram, params); + ret = dram->ops->set_rate_index(dram, params, 1); if (ret) return ret; From 07b5d348a6b0856741eff23b9ed133fe27eab2ad Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Mon, 11 Jul 2022 16:15:33 +0200 Subject: [PATCH 06/19] rockchip: rk3399: boot_devices: fix eMMC node name When idbloader.img is flashed on the eMMC, the SPL still tries to load from SPI-NOR first. This is due to an incorrect look-up in the Device Tree. Since commit 822556a93459 ("arm: dts: sync the Rockhip 3399 SoCs from Linux"), the node name (but not label) changed from sdhci@fe330000 to mmc@fe330000 meaning U-Boot SPL is not looking for the correct node name anymore and fails to find the "same-as-spl" node when eMMC is the medium from which the SPL booted. Fixes: 822556a93459 ("arm: dts: sync the Rockhip 3399 SoCs from Linux") Cc: Quentin Schulz Signed-off-by: Quentin Schulz Reviewed-by: Xavier Drudis Ferran Reviewed-by: Artem Lapkin Tested-by: Artem Lapkin Tested-by: Lapkin Artem Tested-by: Lapkin Artem Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/rk3399/rk3399.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 01a05599cd..de11a3fa30 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR; #define GRF_BASE 0xff770000 const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { - [BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000", + [BROM_BOOTSOURCE_EMMC] = "/mmc@fe330000", [BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000/flash@0", [BROM_BOOTSOURCE_SD] = "/mmc@fe320000", }; @@ -181,7 +181,7 @@ const char *spl_decode_boot_device(u32 boot_device) const char *ofpath; } spl_boot_devices_tbl[] = { { BOOT_DEVICE_MMC1, "/mmc@fe320000" }, - { BOOT_DEVICE_MMC2, "/sdhci@fe330000" }, + { BOOT_DEVICE_MMC2, "/mmc@fe330000" }, { BOOT_DEVICE_SPI, "/spi@ff1d0000" }, }; From 9b0e344fa1a88f8b7c14fa289aeb90d86f1dbb71 Mon Sep 17 00:00:00 2001 From: John Keeping Date: Thu, 14 Jul 2022 15:09:12 +0100 Subject: [PATCH 07/19] rockchip: rk3308: fix rockchip_dnl_key_pressed() on roc-cc Commit 6aa4fe3912 ("dm: core: Rename and fix uclass_get_by_name_len()") changed uclass_get_device_by_name() to an exact match when previously it behaved as a prefix match. The roc-cc code relied on this prefix match by only specifying part of the device name. Fix this by using the full name including the address. Signed-off-by: John Keeping Reviewed-by: Kever Yang --- board/firefly/firefly-rk3308/roc_cc_rk3308.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/firefly/firefly-rk3308/roc_cc_rk3308.c b/board/firefly/firefly-rk3308/roc_cc_rk3308.c index 28dcc2a690..bdf3cc03dc 100644 --- a/board/firefly/firefly-rk3308/roc_cc_rk3308.c +++ b/board/firefly/firefly-rk3308/roc_cc_rk3308.c @@ -70,7 +70,7 @@ int rockchip_dnl_key_pressed(void) { unsigned int val; - if (adc_channel_single_shot("saradc", 1, &val)) { + if (adc_channel_single_shot("saradc@ff1e0000", 1, &val)) { printf("%s read adc key val failed\n", __func__); return false; } From 74f7025ea67ee4165405e51dfb032d4fd050e345 Mon Sep 17 00:00:00 2001 From: John Keeping Date: Thu, 14 Jul 2022 15:18:37 +0100 Subject: [PATCH 08/19] rockchip: rk3308: fix same-as-spl boot order Rockchip SoCs need the boot_devices array defined in order to map the bootloader's value to a U-Boot device. Implement this for rk3308. Signed-off-by: John Keeping Reviewed-by: Philipp Tomsich Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/rk3308/rk3308.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c index 70fe0d0ac3..dd9109b7c3 100644 --- a/arch/arm/mach-rockchip/rk3308/rk3308.c +++ b/arch/arm/mach-rockchip/rk3308/rk3308.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -142,6 +143,11 @@ enum { #define GPIO0_A4 4 +const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { + [BROM_BOOTSOURCE_EMMC] = "/mmc@ff490000", + [BROM_BOOTSOURCE_SD] = "/mmc@ff480000", +}; + int rk_board_init(void) { static struct rk3308_grf * const grf = (void *)GRF_BASE; From 72ebe8b8cb4ce2a1edcdfd36aa186bb78b08b06e Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Fri, 15 Jul 2022 17:15:51 +0200 Subject: [PATCH 09/19] rockchip: rk3399: fix incorrect boot-device in u-boot, spl-boot-device On RK3399, mmc0 is eMMC and mmc1 is SD card, c.f. console: MMC: mmc@fe320000: 1, mmc@fe330000: 0 In arch/arm/mach-rockchip/spl-boot-order.c:board_boot_order, the boot_device (BOOT_DEVICE_*) value is gotten from spl_node_to_boot_device function. Said function returns BOOT_DEVICE_MMC1 for mmc0 (eMMC) and BOOT_DEVICE_MMC2 for mmc1 (SD card). Since the SD card controller is at mmc@fe320000, it should be associated with BOOT_DEVICE_MMC2 and not BOOT_DEVICE_MMC1. Same applies to eMMC. Let's fix that by swapping the two BOOT_DEVICEs. Cc: Quentin Schulz Signed-off-by: Quentin Schulz Tested-by: Xavier Drudis Ferran --- arch/arm/mach-rockchip/rk3399/rk3399.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index de11a3fa30..819cc7fa1b 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -180,8 +180,8 @@ const char *spl_decode_boot_device(u32 boot_device) u32 boot_device; const char *ofpath; } spl_boot_devices_tbl[] = { - { BOOT_DEVICE_MMC1, "/mmc@fe320000" }, - { BOOT_DEVICE_MMC2, "/mmc@fe330000" }, + { BOOT_DEVICE_MMC2, "/mmc@fe320000" }, + { BOOT_DEVICE_MMC1, "/mmc@fe330000" }, { BOOT_DEVICE_SPI, "/spi@ff1d0000" }, }; From 7a81a44caf9b2ca8ad80d0f6fca7950e5a224e93 Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Fri, 15 Jul 2022 17:15:52 +0200 Subject: [PATCH 10/19] rockchip: rk3399: sync spl_boot_devices_tbl and boot_devices node paths While technically not a bug, let's have some consistency in paths returned by u-boot,spl-boot-order look-up and the one saved in u-boot,spl-boot-device by syncing spl_boot_devices_tbl and boot_devices node paths. Cc: Quentin Schulz Signed-off-by: Quentin Schulz Tested-by: Xavier Drudis Ferran Reviewed-by: Xavier Drudis Ferran Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/rk3399/rk3399.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 819cc7fa1b..21db03b961 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -182,7 +182,7 @@ const char *spl_decode_boot_device(u32 boot_device) } spl_boot_devices_tbl[] = { { BOOT_DEVICE_MMC2, "/mmc@fe320000" }, { BOOT_DEVICE_MMC1, "/mmc@fe330000" }, - { BOOT_DEVICE_SPI, "/spi@ff1d0000" }, + { BOOT_DEVICE_SPI, "/spi@ff1d0000/flash@0" }, }; for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i) From 4d91df0548a8d71e3a2fd769b6ee65e76a764f25 Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Fri, 2 Sep 2022 15:10:48 +0200 Subject: [PATCH 11/19] binman: add support for skipping file concatenation for mkimage Some image types handled by mkimage require the datafiles to be passed independently (-d data1:data2) for specific handling of each. A concatenation of datafiles prior to passing them to mkimage wouldn't work. That is the case for rkspi for example which requires page alignment and only writing 2KB every 4KB. This adds the ability to tell binman to pass the datafiles without prior concatenation to mkimage, by adding the multiple-data-files boolean property to the mkimage node. Cc: Quentin Schulz Signed-off-by: Quentin Schulz Reviewed-by: Simon Glass --- tools/binman/entries.rst | 22 ++++++++++ tools/binman/etype/mkimage.py | 41 +++++++++++++++++-- tools/binman/ftest.py | 23 +++++++++++ tools/binman/test/252_mkimage_mult_data.dts | 21 ++++++++++ .../test/253_mkimage_mult_no_content.dts | 22 ++++++++++ 5 files changed, 125 insertions(+), 4 deletions(-) create mode 100644 tools/binman/test/252_mkimage_mult_data.dts create mode 100644 tools/binman/test/253_mkimage_mult_no_content.dts diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst index b3613d7cbd..18bd328c5c 100644 --- a/tools/binman/entries.rst +++ b/tools/binman/entries.rst @@ -1175,6 +1175,9 @@ Properties / Entry arguments: - args: Arguments to pass - data-to-imagename: Indicates that the -d data should be passed in as the image name also (-n) + - multiple-data-files: boolean to tell binman to pass all files as + datafiles to mkimage instead of creating a temporary file the result + of datafiles concatenation The data passed to mkimage via the -d flag is collected from subnodes of the mkimage node, e.g.:: @@ -1205,6 +1208,25 @@ a section, or just multiple subnodes like this:: }; }; +To pass all datafiles untouched to mkimage:: + + mkimage { + args = "-n rk3399 -T rkspi"; + multiple-data-files; + + u-boot-tpl { + }; + + u-boot-spl { + }; + }; + +This calls mkimage to create a Rockchip RK3399-specific first stage +bootloader, made of TPL+SPL. Since this first stage bootloader requires to +align the TPL and SPL but also some weird hacks that is handled by mkimage +directly, binman is told to not perform the concatenation of datafiles prior +to passing the data to mkimage. + To use CONFIG options in the arguments, use a string list instead, as in this example which also produces four arguments:: diff --git a/tools/binman/etype/mkimage.py b/tools/binman/etype/mkimage.py index ddbd9cec65..5f4bc6fa3c 100644 --- a/tools/binman/etype/mkimage.py +++ b/tools/binman/etype/mkimage.py @@ -18,6 +18,9 @@ class Entry_mkimage(Entry): - args: Arguments to pass - data-to-imagename: Indicates that the -d data should be passed in as the image name also (-n) + - multiple-data-files: boolean to tell binman to pass all files as + datafiles to mkimage instead of creating a temporary file the result + of datafiles concatenation The data passed to mkimage via the -d flag is collected from subnodes of the mkimage node, e.g.:: @@ -51,6 +54,25 @@ class Entry_mkimage(Entry): Note that binman places the contents (here SPL and TPL) into a single file and passes that to mkimage using the -d option. + To pass all datafiles untouched to mkimage:: + + mkimage { + args = "-n rk3399 -T rkspi"; + multiple-data-files; + + u-boot-tpl { + }; + + u-boot-spl { + }; + }; + + This calls mkimage to create a Rockchip RK3399-specific first stage + bootloader, made of TPL+SPL. Since this first stage bootloader requires to + align the TPL and SPL but also some weird hacks that is handled by mkimage + directly, binman is told to not perform the concatenation of datafiles prior + to passing the data to mkimage. + To use CONFIG options in the arguments, use a string list instead, as in this example which also produces four arguments:: @@ -96,6 +118,7 @@ class Entry_mkimage(Entry): """ def __init__(self, section, etype, node): super().__init__(section, etype, node) + self._multiple_data_files = fdt_util.GetBool(self._node, 'multiple-data-files') self._mkimage_entries = OrderedDict() self._imagename = None self.align_default = None @@ -122,10 +145,20 @@ class Entry_mkimage(Entry): def ObtainContents(self): # Use a non-zero size for any fake files to keep mkimage happy # Note that testMkimageImagename() relies on this 'mkimage' parameter - data, input_fname, uniq = self.collect_contents_to_file( - self._mkimage_entries.values(), 'mkimage', 1024) - if data is None: - return False + fake_size = 1024 + if self._multiple_data_files: + fnames = [] + uniq = self.GetUniqueName() + for entry in self._mkimage_entries.values(): + if not entry.ObtainContents(fake_size=fake_size): + return False + fnames.append(tools.get_input_filename(entry.GetDefaultFilename())) + input_fname = ":".join(fnames) + else: + data, input_fname, uniq = self.collect_contents_to_file( + self._mkimage_entries.values(), 'mkimage', fake_size) + if data is None: + return False if self._imagename: image_data, imagename_fname, _ = self.collect_contents_to_file( [self._imagename], 'mkimage-n', 1024) diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index 5422940e07..e0850b760b 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -5898,6 +5898,29 @@ fdt fdtmap Extract the devicetree blob from the fdtmap self.assertIn("Node '/binman/u-boot-dtb': The zstd compression " "requires a length header", str(e.exception)) + def testMkimageMultipleDataFiles(self): + """Test passing multiple files to mkimage in a mkimage entry""" + data = self._DoReadFile('252_mkimage_mult_data.dts') + # Size of files are packed in their 4B big-endian format + expect = struct.pack('>I', len(U_BOOT_TPL_DATA)) + expect += struct.pack('>I', len(U_BOOT_SPL_DATA)) + # Size info is always followed by a 4B zero value. + expect += tools.get_bytes(0, 4) + expect += U_BOOT_TPL_DATA + # All but last files are 4B-aligned + align_pad = len(U_BOOT_TPL_DATA) % 4 + if align_pad: + expect += tools.get_bytes(0, align_pad) + expect += U_BOOT_SPL_DATA + self.assertEqual(expect, data[-len(expect):]) + + def testMkimageMultipleNoContent(self): + """Test passing multiple data files to mkimage with one data file having no content""" + with self.assertRaises(ValueError) as exc: + self._DoReadFile('253_mkimage_mult_no_content.dts') + self.assertIn('Could not complete processing of contents', + str(exc.exception)) + if __name__ == "__main__": unittest.main() diff --git a/tools/binman/test/252_mkimage_mult_data.dts b/tools/binman/test/252_mkimage_mult_data.dts new file mode 100644 index 0000000000..a092bc39bf --- /dev/null +++ b/tools/binman/test/252_mkimage_mult_data.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + mkimage { + args = "-T script"; + multiple-data-files; + + u-boot-tpl { + }; + + u-boot-spl { + }; + }; + }; +}; diff --git a/tools/binman/test/253_mkimage_mult_no_content.dts b/tools/binman/test/253_mkimage_mult_no_content.dts new file mode 100644 index 0000000000..dd65666c62 --- /dev/null +++ b/tools/binman/test/253_mkimage_mult_no_content.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + mkimage { + args = "-T script"; + multiple-data-files; + + _testing { + return-unknown-contents; + }; + + u-boot-spl { + }; + }; + }; +}; From 6cc29dc854916be4c8b10b956c65b4b1ff217eee Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Fri, 2 Sep 2022 15:10:49 +0200 Subject: [PATCH 12/19] binman: allow user-defined filenames for mkimage entry mkimage entry currently creates a file whose name is derived from the section name containing said entry. Let's allow the user to define a filename for the mkimage-generated binary by using the 'filename' DT property. Cc: Quentin Schulz Signed-off-by: Quentin Schulz Reviewed-by: Simon Glass --- tools/binman/etype/mkimage.py | 11 ++++++++--- tools/binman/ftest.py | 7 +++++++ tools/binman/test/254_mkimage_filename.dts | 18 ++++++++++++++++++ 3 files changed, 33 insertions(+), 3 deletions(-) create mode 100644 tools/binman/test/254_mkimage_filename.dts diff --git a/tools/binman/etype/mkimage.py b/tools/binman/etype/mkimage.py index 5f4bc6fa3c..c2288c48ee 100644 --- a/tools/binman/etype/mkimage.py +++ b/tools/binman/etype/mkimage.py @@ -21,11 +21,13 @@ class Entry_mkimage(Entry): - multiple-data-files: boolean to tell binman to pass all files as datafiles to mkimage instead of creating a temporary file the result of datafiles concatenation + - filename: filename of output binary generated by mkimage The data passed to mkimage via the -d flag is collected from subnodes of the mkimage node, e.g.:: mkimage { + filename = "imximage.bin"; args = "-n test -T imximage"; u-boot-spl { @@ -38,8 +40,9 @@ class Entry_mkimage(Entry): mkimage -d -n test -T imximage The output from mkimage then becomes part of the image produced by - binman. If you need to put multiple things in the data file, you can use - a section, or just multiple subnodes like this:: + binman but also is written into `imximage.bin` file. If you need to put + multiple things in the data file, you can use a section, or just multiple + subnodes like this:: mkimage { args = "-n test -T imximage"; @@ -121,6 +124,7 @@ class Entry_mkimage(Entry): self._multiple_data_files = fdt_util.GetBool(self._node, 'multiple-data-files') self._mkimage_entries = OrderedDict() self._imagename = None + self._filename = fdt_util.GetString(self._node, 'filename') self.align_default = None def ReadNode(self): @@ -164,7 +168,8 @@ class Entry_mkimage(Entry): [self._imagename], 'mkimage-n', 1024) if image_data is None: return False - output_fname = tools.get_output_filename('mkimage-out.%s' % uniq) + outfile = self._filename if self._filename else 'mkimage-out.%s' % uniq + output_fname = tools.get_output_filename(outfile) args = ['-d', input_fname] if self._data_to_imagename: diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index e0850b760b..3ced14b7e9 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -5921,6 +5921,13 @@ fdt fdtmap Extract the devicetree blob from the fdtmap self.assertIn('Could not complete processing of contents', str(exc.exception)) + def testMkimageFilename(self): + """Test using mkimage to build a binary with a filename""" + retcode = self._DoTestFile('254_mkimage_filename.dts') + self.assertEqual(0, retcode) + fname = tools.get_output_filename('mkimage-test.bin') + self.assertTrue(os.path.exists(fname)) + if __name__ == "__main__": unittest.main() diff --git a/tools/binman/test/254_mkimage_filename.dts b/tools/binman/test/254_mkimage_filename.dts new file mode 100644 index 0000000000..4483790ae8 --- /dev/null +++ b/tools/binman/test/254_mkimage_filename.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + mkimage { + filename = "mkimage-test.bin"; + args = "-T script"; + + u-boot-spl { + }; + }; + }; +}; From 32c8d1ce5cb70b68db74089e5d74c690f2575071 Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Fri, 2 Sep 2022 15:10:50 +0200 Subject: [PATCH 13/19] rockchip: remove binman temporary files when cleaning Binman mkimage entry generates temporary files so let's remove them when calling `make clean`. Fixes: 9b312e26fc77 ("rockchip: Enable building a SPI ROM image on jerry") Cc: Quentin Schulz Reported-by: Johan Jonker Signed-off-by: Quentin Schulz Reviewed-by: Simon Glass Reviewed-by: Kever Yang --- Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 541e942ed5..5750a9e4b8 100644 --- a/Makefile +++ b/Makefile @@ -2225,7 +2225,8 @@ CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h \ lpc32xx-* bl31.c bl31.elf bl31_*.bin image.map tispl.bin* \ idbloader.img flash.bin flash.log defconfig keep-syms-lto.c \ mkimage-out.spl.mkimage mkimage.spl.mkimage imx-boot.map \ - itb.fit.fit itb.fit.itb itb.map spl.map + itb.fit.fit itb.fit.itb itb.map spl.map mkimage-out.rom.mkimage \ + mkimage.rom.mkimage rom.map simple-bin.map # Directories & files removed with 'make mrproper' MRPROPER_DIRS += include/config include/generated spl tpl \ From 001f788cdbb5481d59c926f4651416c24b7b5773 Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Fri, 2 Sep 2022 15:10:51 +0200 Subject: [PATCH 14/19] rockchip: generate idbloader.img content for u-boot-rockchip.bin with binman for ARM idbloader.img content - currently created by way of Makefile - can be created by binman directly. So let's do that for Rockchip ARM platforms. Cc: Quentin Schulz Signed-off-by: Quentin Schulz Reviewed-by: Simon Glass Reviewed-by: Kever Yang --- Makefile | 2 +- arch/arm/dts/rockchip-u-boot.dtsi | 11 ++++++++++- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 5750a9e4b8..dbe1aa254a 100644 --- a/Makefile +++ b/Makefile @@ -1011,7 +1011,7 @@ endif else ifeq ($(CONFIG_SPL),y) # Generate these inputs for binman which will create the output files -INPUTS-y += idbloader.img u-boot.img +INPUTS-y += u-boot.img endif endif endif diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi index eae3ee715d..ad72ca9700 100644 --- a/arch/arm/dts/rockchip-u-boot.dtsi +++ b/arch/arm/dts/rockchip-u-boot.dtsi @@ -17,8 +17,17 @@ filename = "u-boot-rockchip.bin"; pad-byte = <0xff>; - blob { + mkimage { filename = "idbloader.img"; + args = "-n", CONFIG_SYS_SOC, "-T", "rksd"; +#ifdef CONFIG_TPL + multiple-data-files; + + u-boot-tpl { + }; +#endif + u-boot-spl { + }; }; u-boot-img { From 05713d570762d7cb9049e720860e8e745d92f1ef Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Fri, 2 Sep 2022 15:10:52 +0200 Subject: [PATCH 15/19] rockchip: generate u-boot-rockchip.bin with binman for ARM64 boards This allows to build u-boot-rockchip.bin binary with binman for Rockchip ARM64 boards instead of the legacy Makefile way. Cc: Quentin Schulz Signed-off-by: Quentin Schulz Reviewed-by: Simon Glass --- Makefile | 26 +--------------------- arch/arm/Kconfig | 2 +- arch/arm/dts/px30-u-boot.dtsi | 2 ++ arch/arm/dts/rk3308-u-boot.dtsi | 2 ++ arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 2 ++ arch/arm/dts/rk3328-u-boot.dtsi | 2 ++ arch/arm/dts/rk3368-u-boot.dtsi | 1 + arch/arm/dts/rk3568-u-boot.dtsi | 2 ++ arch/arm/dts/rockchip-u-boot.dtsi | 5 +++++ 9 files changed, 18 insertions(+), 26 deletions(-) diff --git a/Makefile b/Makefile index dbe1aa254a..1dee09eb36 100644 --- a/Makefile +++ b/Makefile @@ -1005,8 +1005,7 @@ ifeq ($(CONFIG_ARCH_ROCKCHIP),y) # On ARM64 this target is produced by binman so we don't need this dep ifeq ($(CONFIG_ARM64),y) ifeq ($(CONFIG_SPL),y) -# TODO: Get binman to generate this too -INPUTS-y += u-boot-rockchip.bin +INPUTS-y += u-boot.itb endif else ifeq ($(CONFIG_SPL),y) @@ -1498,29 +1497,6 @@ OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \ u-boot-with-spl.bin: $(SPL_IMAGE) $(SPL_PAYLOAD) FORCE $(call if_changed,pad_cat) -ifeq ($(CONFIG_ARCH_ROCKCHIP),y) - -# TPL + SPL -ifeq ($(CONFIG_SPL)$(CONFIG_TPL),yy) -MKIMAGEFLAGS_u-boot-tpl-rockchip.bin = -n $(CONFIG_SYS_SOC) -T rksd -tpl/u-boot-tpl-rockchip.bin: tpl/u-boot-tpl.bin FORCE - $(call if_changed,mkimage) -idbloader.img: tpl/u-boot-tpl-rockchip.bin spl/u-boot-spl.bin FORCE - $(call if_changed,cat) -else -MKIMAGEFLAGS_idbloader.img = -n $(CONFIG_SYS_SOC) -T rksd -idbloader.img: spl/u-boot-spl.bin FORCE - $(call if_changed,mkimage) -endif - -ifeq ($(CONFIG_ARM64),y) -OBJCOPYFLAGS_u-boot-rockchip.bin = -I binary -O binary \ - --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff -u-boot-rockchip.bin: idbloader.img u-boot.itb FORCE - $(call if_changed,pad_cat) -endif # CONFIG_ARM64 - -endif # CONFIG_ARCH_ROCKCHIP ifeq ($(CONFIG_ARCH_LPC32XX)$(CONFIG_SPL),yy) MKIMAGEFLAGS_lpc32xx-spl.img = -T lpc32xximage -a $(CONFIG_SPL_TEXT_BASE) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 0b72e4f650..82cd456f51 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1974,7 +1974,7 @@ config ARCH_STM32MP config ARCH_ROCKCHIP bool "Support Rockchip SoCs" select BLK - select BINMAN if SPL_OPTEE || (SPL && !ARM64) + select BINMAN if SPL_OPTEE || SPL select DM select DM_GPIO select DM_I2C diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi index f102b2aef4..462eaf68f8 100644 --- a/arch/arm/dts/px30-u-boot.dtsi +++ b/arch/arm/dts/px30-u-boot.dtsi @@ -3,6 +3,8 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include "rockchip-u-boot.dtsi" + / { aliases { mmc0 = &emmc; diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi index 4bfad31fba..ab5bfc2ce9 100644 --- a/arch/arm/dts/rk3308-u-boot.dtsi +++ b/arch/arm/dts/rk3308-u-boot.dtsi @@ -3,6 +3,8 @@ *(C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include "rockchip-u-boot.dtsi" + / { aliases { mmc0 = &emmc; diff --git a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi b/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi index 95f2652494..16c33735eb 100644 --- a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi +++ b/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi @@ -3,6 +3,8 @@ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH */ +#include "rockchip-u-boot.dtsi" + / { chosen { u-boot,spl-boot-order = &sdmmc; diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi index 1633558264..d4a7540a92 100644 --- a/arch/arm/dts/rk3328-u-boot.dtsi +++ b/arch/arm/dts/rk3328-u-boot.dtsi @@ -3,6 +3,8 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include "rockchip-u-boot.dtsi" + / { aliases { mmc0 = &emmc; diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi index 2767c2678d..811d59ac34 100644 --- a/arch/arm/dts/rk3368-u-boot.dtsi +++ b/arch/arm/dts/rk3368-u-boot.dtsi @@ -4,6 +4,7 @@ */ #include +#include "rockchip-u-boot.dtsi" / { dmc: dmc@ff610000 { diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi index 5a80dda275..fa9b6ae23b 100644 --- a/arch/arm/dts/rk3568-u-boot.dtsi +++ b/arch/arm/dts/rk3568-u-boot.dtsi @@ -3,6 +3,8 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ +#include "rockchip-u-boot.dtsi" + / { aliases { mmc0 = &sdhci; diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi index ad72ca9700..f90a8bf085 100644 --- a/arch/arm/dts/rockchip-u-boot.dtsi +++ b/arch/arm/dts/rockchip-u-boot.dtsi @@ -30,7 +30,12 @@ }; }; +#ifdef CONFIG_ARM64 + blob { + filename = "u-boot.itb"; +#else u-boot-img { +#endif offset = ; }; }; From a6e569fac3cb44bcb58b3c41b3126f5d8d7b8ba1 Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Fri, 2 Sep 2022 15:10:53 +0200 Subject: [PATCH 16/19] rockchip: simplify binman image dependencies addition to INPUTS By factoring SPL check in the first condition, this makes the checks a bit less convoluted and more readable. Cc: Quentin Schulz Signed-off-by: Quentin Schulz Reviewed-by: Kever Yang Reviewed-by: Simon Glass --- Makefile | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/Makefile b/Makefile index 1dee09eb36..736c4ad182 100644 --- a/Makefile +++ b/Makefile @@ -1001,19 +1001,14 @@ ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy) INPUTS-y += u-boot-with-dtb.bin endif -ifeq ($(CONFIG_ARCH_ROCKCHIP),y) -# On ARM64 this target is produced by binman so we don't need this dep +ifeq ($(CONFIG_ARCH_ROCKCHIP)$(CONFIG_SPL),yy) +# Binman image dependencies ifeq ($(CONFIG_ARM64),y) -ifeq ($(CONFIG_SPL),y) INPUTS-y += u-boot.itb -endif else -ifeq ($(CONFIG_SPL),y) -# Generate these inputs for binman which will create the output files INPUTS-y += u-boot.img endif endif -endif INPUTS-$(CONFIG_X86) += u-boot-x86-start16.bin u-boot-x86-reset16.bin \ $(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \ From a4bb36df4934c5c710a83835d3760a6587aa5662 Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Fri, 2 Sep 2022 15:10:54 +0200 Subject: [PATCH 17/19] rockchip: allow to build SPI images even without HAS_ROM option This prepares for the creation of a u-boot-rockchip-spi.bin image similar to u-boot-rockchip.bin to the exception it's destined for SPI-NOR flashes instead of MMC storage medium. Cc: Quentin Schulz Signed-off-by: Quentin Schulz Reviewed-by: Simon Glass Reviewed-by: Kever Yang --- arch/arm/dts/rk3288-u-boot.dtsi | 2 +- arch/arm/dts/rk3399-u-boot.dtsi | 2 +- arch/arm/mach-rockchip/Kconfig | 6 ++---- 3 files changed, 4 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi index 9eb696b141..e411445ed6 100644 --- a/arch/arm/dts/rk3288-u-boot.dtsi +++ b/arch/arm/dts/rk3288-u-boot.dtsi @@ -56,7 +56,7 @@ }; }; -#ifdef CONFIG_ROCKCHIP_SPI_IMAGE +#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM) &binman { rom { filename = "u-boot.rom"; diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi index 716b9a433a..3c1a15fe51 100644 --- a/arch/arm/dts/rk3399-u-boot.dtsi +++ b/arch/arm/dts/rk3399-u-boot.dtsi @@ -60,7 +60,7 @@ }; -#ifdef CONFIG_ROCKCHIP_SPI_IMAGE +#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM) &binman { rom { filename = "u-boot.rom"; diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index c561a77e6a..b46cea2f91 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -425,12 +425,10 @@ config SPL_MMC config ROCKCHIP_SPI_IMAGE bool "Build a SPI image for rockchip" - depends on HAS_ROM help Some Rockchip SoCs support booting from SPI flash. Enable this - option to produce a 4MB SPI-flash image (called u-boot.rom) - containing U-Boot. The image is built by binman. U-Boot sits near - the start of the image. + option to produce a SPI-flash image containing U-Boot. The image + is built by binman. U-Boot sits near the start of the image. config LNX_KRNL_IMG_TEXT_OFFSET_BASE default SYS_TEXT_BASE From e1faa535b978958a264c9623a8ca941f0adcb860 Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Fri, 2 Sep 2022 15:10:55 +0200 Subject: [PATCH 18/19] rockchip: add u-boot-rockchip-spi.bin image for booting from SPI-NOR flash This new image is similar to u-boot-rockchip.bin except that it's destined to be flashed on SPI-NOR flashes. Cc: Quentin Schulz Signed-off-by: Quentin Schulz Reviewed-by: Kever Yang Reviewed-by: Simon Glass --- Makefile | 3 ++- arch/arm/dts/rockchip-u-boot.dtsi | 30 ++++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 736c4ad182..e70e92c947 100644 --- a/Makefile +++ b/Makefile @@ -2197,7 +2197,8 @@ CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h \ idbloader.img flash.bin flash.log defconfig keep-syms-lto.c \ mkimage-out.spl.mkimage mkimage.spl.mkimage imx-boot.map \ itb.fit.fit itb.fit.itb itb.map spl.map mkimage-out.rom.mkimage \ - mkimage.rom.mkimage rom.map simple-bin.map + mkimage.rom.mkimage rom.map simple-bin.map simple-bin-spi.map \ + idbloader-spi.img # Directories & files removed with 'make mrproper' MRPROPER_DIRS += include/config include/generated spl tpl \ diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi index f90a8bf085..584f21eb5b 100644 --- a/arch/arm/dts/rockchip-u-boot.dtsi +++ b/arch/arm/dts/rockchip-u-boot.dtsi @@ -39,5 +39,35 @@ offset = ; }; }; + +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE + simple-bin-spi { + filename = "u-boot-rockchip-spi.bin"; + pad-byte = <0xff>; + + mkimage { + filename = "idbloader-spi.img"; + args = "-n", CONFIG_SYS_SOC, "-T", "rkspi"; +#ifdef CONFIG_TPL + multiple-data-files; + + u-boot-tpl { + }; +#endif + u-boot-spl { + }; + }; + +#ifdef CONFIG_ARM64 + blob { + filename = "u-boot.itb"; +#else + u-boot-img { +#endif + /* Sync with u-boot,spl-payload-offset if present */ + offset = ; + }; + }; +#endif }; #endif From f103c112660217f8875398435e47d545ba934a5c Mon Sep 17 00:00:00 2001 From: Michal Suchanek Date: Sun, 21 Aug 2022 09:17:24 +0200 Subject: [PATCH 19/19] clk: rockchip: rk3399: Fix Unknown clock 77 on mmc@fe310000 Adding some debug prints I can see: MMC: mmc@fe320000: Got clock clock-controller@ff760000 76 mmc@fe310000: Got clock clock-controller@ff760000 77 Unknown clock 77 rockchip_dwmmc_get_mmc_clk: err=-2 mmc@fe310000: 3, mmc@fe320000: 1, mmc@fe330000: 0 According to kernel code the SDIO clock is identical to SDMMC clock except for the con 16->15 change. Add support for the clock to avoid the error. Signed-off-by: Michal Suchanek Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_rk3399.c | 66 ++++++++++++++++++++----------- 1 file changed, 43 insertions(+), 23 deletions(-) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 7d31a9f22a..97bf1c6e15 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -728,6 +728,12 @@ static ulong rk3399_mmc_get_clk(struct rockchip_cru *cru, uint clk_id) u32 div, con; switch (clk_id) { + case HCLK_SDIO: + case SCLK_SDIO: + con = readl(&cru->clksel_con[15]); + /* dwmmc controller have internal div 2 */ + div = 2; + break; case HCLK_SDMMC: case SCLK_SDMMC: con = readl(&cru->clksel_con[16]); @@ -750,37 +756,46 @@ static ulong rk3399_mmc_get_clk(struct rockchip_cru *cru, uint clk_id) return DIV_TO_RATE(GPLL_HZ, div); } +static void rk3399_dwmmc_set_clk(struct rockchip_cru *cru, + unsigned int con, ulong set_rate) +{ + /* Select clk_sdmmc source from GPLL by default */ + /* mmc clock defaulg div 2 internal, provide double in cru */ + int src_clk_div = DIV_ROUND_UP(GPLL_HZ / 2, set_rate); + + if (src_clk_div > 128) { + /* use 24MHz source for 400KHz clock */ + src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate); + assert(src_clk_div - 1 < 128); + rk_clrsetreg(&cru->clksel_con[con], + CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, + CLK_EMMC_PLL_SEL_24M << CLK_EMMC_PLL_SHIFT | + (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT); + } else { + rk_clrsetreg(&cru->clksel_con[con], + CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, + CLK_EMMC_PLL_SEL_GPLL << CLK_EMMC_PLL_SHIFT | + (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT); + } +} + static ulong rk3399_mmc_set_clk(struct rockchip_cru *cru, ulong clk_id, ulong set_rate) { - int src_clk_div; - int aclk_emmc = 198 * MHz; - switch (clk_id) { + case HCLK_SDIO: + case SCLK_SDIO: + rk3399_dwmmc_set_clk(cru, 15, set_rate); + break; case HCLK_SDMMC: case SCLK_SDMMC: - /* Select clk_sdmmc source from GPLL by default */ - /* mmc clock defaulg div 2 internal, provide double in cru */ - src_clk_div = DIV_ROUND_UP(GPLL_HZ / 2, set_rate); - - if (src_clk_div > 128) { - /* use 24MHz source for 400KHz clock */ - src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate); - assert(src_clk_div - 1 < 128); - rk_clrsetreg(&cru->clksel_con[16], - CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, - CLK_EMMC_PLL_SEL_24M << CLK_EMMC_PLL_SHIFT | - (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT); - } else { - rk_clrsetreg(&cru->clksel_con[16], - CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK, - CLK_EMMC_PLL_SEL_GPLL << CLK_EMMC_PLL_SHIFT | - (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT); - } + rk3399_dwmmc_set_clk(cru, 16, set_rate); break; - case SCLK_EMMC: + case SCLK_EMMC: { + int aclk_emmc = 198 * MHz; /* Select aclk_emmc source from GPLL */ - src_clk_div = DIV_ROUND_UP(GPLL_HZ, aclk_emmc); + int src_clk_div = DIV_ROUND_UP(GPLL_HZ, aclk_emmc); + assert(src_clk_div - 1 < 32); rk_clrsetreg(&cru->clksel_con[21], @@ -797,6 +812,7 @@ static ulong rk3399_mmc_set_clk(struct rockchip_cru *cru, CLK_EMMC_PLL_SEL_GPLL << CLK_EMMC_PLL_SHIFT | (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT); break; + } default: return -EINVAL; } @@ -918,6 +934,8 @@ static ulong rk3399_clk_get_rate(struct clk *clk) switch (clk->id) { case 0 ... 63: return 0; + case HCLK_SDIO: + case SCLK_SDIO: case HCLK_SDMMC: case SCLK_SDMMC: case SCLK_EMMC: @@ -992,6 +1010,8 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) case PCLK_PERILP1: return 0; + case HCLK_SDIO: + case SCLK_SDIO: case HCLK_SDMMC: case SCLK_SDMMC: case SCLK_EMMC: