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ARC: Cache: Use is_isa_arcv2() instead of CONFIG_ISA_ARCV2 ifdef

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Use is_isa_arcv2() function where it is possible instead of
CONFIG_ISA_ARCV2 define check to make code cleaner at the same time
keeping pretty much the same functionality - code in branches
under "if (is_isa_arcv2())" won't be compiled if CONFIG_ISA_ARCV2
is not defined, still we need a couple of CONFIG_ISA_ARCV2
ifdefs to make compiler happy. That's because code in
!is_isa_x() branch gets compiled and only then gets optimized
away.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This commit is contained in:
Eugeniy Paltsev 2018-03-21 15:58:54 +03:00 committed by Alexey Brodkin
parent c877a8911d
commit 05c6a26a04
1 changed files with 29 additions and 30 deletions
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59
arch/arc/lib/cache.c
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@ -117,7 +117,6 @@ bool icache_exists __section(".data") = false;
#define CACHE_LINE_MASK (~(l1_line_sz - 1)) #define CACHE_LINE_MASK (~(l1_line_sz - 1))
#ifdef CONFIG_ISA_ARCV2
int slc_line_sz __section(".data"); int slc_line_sz __section(".data");
bool slc_exists __section(".data") = false; bool slc_exists __section(".data") = false;
bool ioc_exists __section(".data") = false; bool ioc_exists __section(".data") = false;
@ -175,6 +174,8 @@ static void slc_upper_region_init(void)
static void __slc_rgn_op(unsigned long paddr, unsigned long sz, const int op) static void __slc_rgn_op(unsigned long paddr, unsigned long sz, const int op)
{ {
#ifdef CONFIG_ISA_ARCV2
unsigned int ctrl; unsigned int ctrl;
unsigned long end; unsigned long end;
@ -218,6 +219,8 @@ static void __slc_rgn_op(unsigned long paddr, unsigned long sz, const int op)
read_aux_reg(ARC_AUX_SLC_CTRL); read_aux_reg(ARC_AUX_SLC_CTRL);
while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY); while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
#endif /* CONFIG_ISA_ARCV2 */
} }
static void arc_ioc_setup(void) static void arc_ioc_setup(void)
@ -247,11 +250,11 @@ static void arc_ioc_setup(void)
write_aux_reg(ARC_AUX_IO_COH_PARTIAL, 1); write_aux_reg(ARC_AUX_IO_COH_PARTIAL, 1);
write_aux_reg(ARC_AUX_IO_COH_ENABLE, 1); write_aux_reg(ARC_AUX_IO_COH_ENABLE, 1);
} }
#endif /* CONFIG_ISA_ARCV2 */
#ifdef CONFIG_ISA_ARCV2
static void read_decode_cache_bcr_arcv2(void) static void read_decode_cache_bcr_arcv2(void)
{ {
#ifdef CONFIG_ISA_ARCV2
union bcr_slc_cfg slc_cfg; union bcr_slc_cfg slc_cfg;
union bcr_clust_cfg cbcr; union bcr_clust_cfg cbcr;
union bcr_generic sbcr; union bcr_generic sbcr;
@ -266,8 +269,9 @@ static void read_decode_cache_bcr_arcv2(void)
cbcr.word = read_aux_reg(ARC_BCR_CLUSTER); cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
if (cbcr.fields.c && ioc_enable) if (cbcr.fields.c && ioc_enable)
ioc_exists = true; ioc_exists = true;
#endif /* CONFIG_ISA_ARCV2 */
} }
#endif
void read_decode_cache_bcr(void) void read_decode_cache_bcr(void)
{ {
@ -298,10 +302,10 @@ void cache_init(void)
{ {
read_decode_cache_bcr(); read_decode_cache_bcr();
#ifdef CONFIG_ISA_ARCV2 if (is_isa_arcv2())
read_decode_cache_bcr_arcv2(); read_decode_cache_bcr_arcv2();
if (ioc_exists) if (is_isa_arcv2() && ioc_exists)
arc_ioc_setup(); arc_ioc_setup();
read_decode_mmu_bcr(); read_decode_mmu_bcr();
@ -311,9 +315,8 @@ void cache_init(void)
* only if PAE exists in current HW. So we had to check pae_exist * only if PAE exists in current HW. So we had to check pae_exist
* before using them. * before using them.
*/ */
if (slc_exists && pae_exists) if (is_isa_arcv2() && slc_exists && pae_exists)
slc_upper_region_init(); slc_upper_region_init();
#endif /* CONFIG_ISA_ARCV2 */
} }
int icache_status(void) int icache_status(void)
@ -363,10 +366,8 @@ void invalidate_icache_all(void)
{ {
__ic_entire_invalidate(); __ic_entire_invalidate();
#ifdef CONFIG_ISA_ARCV2 if (is_isa_arcv2() && slc_exists)
if (slc_exists)
__slc_entire_op(OP_INV); __slc_entire_op(OP_INV);
#endif
} }
int dcache_status(void) int dcache_status(void)
@ -478,15 +479,16 @@ void invalidate_dcache_range(unsigned long start, unsigned long end)
if (start >= end) if (start >= end)
return; return;
#ifdef CONFIG_ISA_ARCV2 /*
if (!ioc_exists) * ARCv1 -> call __dc_line_op
#endif * ARCv2 && no IOC -> call __dc_line_op; call __slc_rgn_op
* ARCv2 && IOC enabled -> nothing
*/
if (!is_isa_arcv2() || !ioc_exists)
__dc_line_op(start, end - start, OP_INV); __dc_line_op(start, end - start, OP_INV);
#ifdef CONFIG_ISA_ARCV2 if (is_isa_arcv2() && slc_exists && !ioc_exists)
if (slc_exists && !ioc_exists)
__slc_rgn_op(start, end - start, OP_INV); __slc_rgn_op(start, end - start, OP_INV);
#endif
} }
void flush_dcache_range(unsigned long start, unsigned long end) void flush_dcache_range(unsigned long start, unsigned long end)
@ -494,15 +496,16 @@ void flush_dcache_range(unsigned long start, unsigned long end)
if (start >= end) if (start >= end)
return; return;
#ifdef CONFIG_ISA_ARCV2 /*
if (!ioc_exists) * ARCv1 -> call __dc_line_op
#endif * ARCv2 && no IOC -> call __dc_line_op; call __slc_rgn_op
* ARCv2 && IOC enabled -> nothing
*/
if (!is_isa_arcv2() || !ioc_exists)
__dc_line_op(start, end - start, OP_FLUSH); __dc_line_op(start, end - start, OP_FLUSH);
#ifdef CONFIG_ISA_ARCV2 if (is_isa_arcv2() && slc_exists && !ioc_exists)
if (slc_exists && !ioc_exists)
__slc_rgn_op(start, end - start, OP_FLUSH); __slc_rgn_op(start, end - start, OP_FLUSH);
#endif
} }
void flush_cache(unsigned long start, unsigned long size) void flush_cache(unsigned long start, unsigned long size)
@ -520,18 +523,14 @@ void flush_n_invalidate_dcache_all(void)
{ {
__dc_entire_op(OP_FLUSH_N_INV); __dc_entire_op(OP_FLUSH_N_INV);
#ifdef CONFIG_ISA_ARCV2 if (is_isa_arcv2() && slc_exists)
if (slc_exists)
__slc_entire_op(OP_FLUSH_N_INV); __slc_entire_op(OP_FLUSH_N_INV);
#endif
} }
void flush_dcache_all(void) void flush_dcache_all(void)
{ {
__dc_entire_op(OP_FLUSH); __dc_entire_op(OP_FLUSH);
#ifdef CONFIG_ISA_ARCV2 if (is_isa_arcv2() && slc_exists)
if (slc_exists)
__slc_entire_op(OP_FLUSH); __slc_entire_op(OP_FLUSH);
#endif
} }