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https://github.com/AsahiLinux/u-boot
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x86: Add support for starting from SPL/TPL
When a previous phase of U-Boot has run we need to adjust the init of subsequent states to avoid messing up the CPU state. Add a new version of the start logic for SPL, when it boots from TPL (start_from tpl.c) and a new version for U-Boot when it boots from SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
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9231206b73
commit
051c31b7a4
4 changed files with 146 additions and 1 deletions
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@ -4,9 +4,21 @@ ifeq ($(CONFIG_EFI_APP),)
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ifdef CONFIG_$(SPL_)X86_64
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head-y := arch/x86/cpu/start64.o
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else
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ifeq ($(CONFIG_$(SPL_TPL_)X86_16BIT_INIT),y)
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head-y := arch/x86/cpu/start.o
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else
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ifndef CONFIG_SPL
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head-y := arch/x86/cpu/start.o
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else
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ifdef CONFIG_SPL_BUILD
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head-y = arch/x86/cpu/start_from_tpl.o
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else
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head-y = arch/x86/cpu/start_from_spl.o
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endif
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endif
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endif
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endif
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endif # EFI
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head-$(CONFIG_$(SPL_)X86_16BIT_INIT) += arch/x86/cpu/start16.o
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head-$(CONFIG_$(SPL_)X86_16BIT_INIT) += arch/x86/cpu/resetvec.o
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@ -9,9 +9,22 @@
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ifeq ($(CONFIG_$(SPL_)X86_64),y)
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extra-y = start64.o
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else
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ifeq ($(CONFIG_$(SPL_TPL_)X86_16BIT_INIT),y)
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extra-y = start.o
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else
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ifndef CONFIG_SPL
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extra-y = start.o
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else
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ifdef CONFIG_SPL_BUILD
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extra-y = start_from_tpl.o
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else
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extra-y = start_from_spl.o
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endif
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extra-$(CONFIG_$(SPL_)X86_16BIT_INIT) += resetvec.o start16.o
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endif
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endif
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endif
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extra-$(CONFIG_$(SPL_TPL_)X86_16BIT_INIT) += resetvec.o start16.o
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obj-y += cpu.o cpu_x86.o
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71
arch/x86/cpu/start_from_spl.S
Normal file
71
arch/x86/cpu/start_from_spl.S
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@ -0,0 +1,71 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* 32-bit x86 Startup Code when running from SPL
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*
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* Copyright 2018 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <config.h>
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.section .text.start
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.code32
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.globl _start
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.type _start, @function
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_start:
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/* Set up memory using the existing stack */
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movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %eax
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#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
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subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %eax
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#endif
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/*
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* We don't subject CONFIG_DCACHE_RAM_MRC_VAR_SIZE since memory is
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* already set up. This has the happy side-effect of putting gd in a
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* new place separate from SPL, so the memset() in
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* board_init_f_init_reserve() does not cause any problems (otherwise
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* it would zero out the gd and crash)
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*/
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call board_init_f_alloc_reserve
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mov %eax, %esp
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call board_init_f_init_reserve
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xorl %eax, %eax
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call board_init_f
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call board_init_f_r
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/* Should not return here */
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jmp .
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.globl board_init_f_r_trampoline
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.type board_init_f_r_trampoline, @function
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board_init_f_r_trampoline:
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/*
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* SPL has been executed and SDRAM has been initialised, U-Boot code
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* has been copied into RAM, BSS has been cleared and relocation
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* adjustments have been made. It is now time to jump into the in-RAM
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* copy of U-Boot
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*
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* %eax = Address of top of new stack
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*/
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/* Stack grows down from top of SDRAM */
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movl %eax, %esp
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/* Re-enter U-Boot by calling board_init_f_r() */
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call board_init_f_r
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die:
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hlt
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jmp die
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hlt
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.align 4
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_dt_ucode_base_size:
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/* These next two fields are filled in by binman */
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.globl ucode_base
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ucode_base: /* Declared in microcode.h */
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.long 0 /* microcode base */
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.globl ucode_size
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ucode_size: /* Declared in microcode.h */
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.long 0 /* microcode size */
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49
arch/x86/cpu/start_from_tpl.S
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49
arch/x86/cpu/start_from_tpl.S
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@ -0,0 +1,49 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* 32-bit x86 Startup Code when running from TPL
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*
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* Copyright 2018 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <config.h>
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.section .text.start
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.code32
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.globl _start
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.type _start, @function
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_start:
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/* Set up memory using the existing stack */
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mov %esp, %eax
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call board_init_f_alloc_reserve
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mov %eax, %esp
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call board_init_f_init_reserve
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xorl %eax, %eax
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call board_init_f
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call board_init_f_r
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/* Should not return here */
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jmp .
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.globl board_init_f_r_trampoline
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.type board_init_f_r_trampoline, @function
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board_init_f_r_trampoline:
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/*
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* TPL has been executed: SDRAM has been initialised, BSS has been
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* cleared.
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*
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* %eax = Address of top of new stack
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*/
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/* Stack grows down from top of SDRAM */
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movl %eax, %esp
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/* Re-enter SPL by calling board_init_f_r() */
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call board_init_f_r
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die:
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hlt
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jmp die
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hlt
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