mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 07:34:31 +00:00
ppc4xx: Use correct io accessors for esd 405 boards
This patch replaces in/out8/16/32 macros by in/out_8/_be16/_be32 macros. Also volatile pointer references are replaced by the new accessors. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Matthias Fuchs
Wolfgang Denk
parent
a59205d151
commit
049216f045
13 changed files with 113 additions and 107 deletions
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@ -93,7 +93,7 @@ int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0]));
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int board_revision(void)
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{
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unsigned long cntrl0Reg;
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volatile unsigned long value;
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unsigned long value;
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/*
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* Get version of APC405 board from GPIO's
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@ -24,6 +24,7 @@
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#include <common.h>
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#include "ar405.h"
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#include <asm/processor.h>
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#include <asm/io.h>
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#include <command.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -137,18 +138,14 @@ int board_early_init_f (void)
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mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
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mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
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*(ushort *) 0xf03000ec = 0x0fff; /* enable all interrupts in fpga */
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out_be16((void *)0xf03000ec, 0x0fff); /* enable interrupts in fpga */
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return 0;
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}
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/* ------------------------------------------------------------------------- */
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/*
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* Check Board Identity:
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*/
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int checkboard (void)
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{
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int index;
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@ -192,14 +189,15 @@ int checkboard (void)
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#if 1 /* test-only: some internal test routines... */
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#define DIGEN ((void *)0xf03000b4) /* u8 */
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#define DIGOUT ((void *)0xf03000b0) /* u16 */
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#define DIGIN ((void *)0xf03000a0) /* u16 */
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/*
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* Some test routines
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*/
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int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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volatile uchar *digen = (volatile uchar *)0xf03000b4;
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volatile ushort *digout = (volatile ushort *)0xf03000b0;
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volatile ushort *digin = (volatile ushort *)0xf03000a0;
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int i;
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int k;
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int start;
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@ -216,7 +214,7 @@ int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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/*
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* Enable digital outputs
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*/
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*digen = 0x08;
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out_8(DIGEN, 0x08);
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printf("\nStarting digital In-/Out Test from I/O %d to %d (Cntrl-C to abort)...\n",
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start, end);
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@ -226,12 +224,13 @@ int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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*/
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for (;;) {
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for (i=start; i<=end; i++) {
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*digout = 0x0001 << i;
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out_be16(DIGOUT, 0x0001 << i);
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for (k=0; k<200; k++)
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udelay(1000);
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if (*digin != (0x0001 << i)) {
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printf("ERROR: OUT=0x%04X, IN=0x%04X\n", 0x0001 << i, *digin);
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if (in_be16(DIGIN) != (0x0001 << i)) {
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printf("ERROR: OUT=0x%04X, IN=0x%04X\n",
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0x0001 << i, in_be16(DIGIN));
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return 0;
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}
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@ -255,13 +254,13 @@ U_BOOT_CMD(
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#define ERROR_DELTA 256
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struct io {
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volatile short val;
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short val;
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short dummy;
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};
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int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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volatile short val;
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short val;
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int i;
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int volt;
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struct io *out;
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@ -274,9 +273,9 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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volt = 0;
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printf("Setting Channel %d to %dV...\n", i, volt);
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out[i].val = (volt * 0x7fff) / 10;
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out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
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udelay(10000);
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val = in[i*2].val;
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val = in_be16((void *)&(in[i*2].val));
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printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
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if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
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(val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
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@ -284,7 +283,7 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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((volt * 0x7fff) / 40) + ERROR_DELTA);
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return -1;
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}
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val = in[i*2+1].val;
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val = in_be16((void *)&(in[i*2+1].val));
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printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
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if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
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(val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
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@ -295,9 +294,9 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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volt = 5;
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printf("Setting Channel %d to %dV...\n", i, volt);
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out[i].val = (volt * 0x7fff) / 10;
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out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
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udelay(10000);
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val = in[i*2].val;
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val = in_be16((void *)&(in[i*2].val));
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printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
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if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
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(val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
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@ -305,7 +304,7 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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((volt * 0x7fff) / 40) + ERROR_DELTA);
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return -1;
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}
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val = in[i*2+1].val;
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val = in_be16((void *)&(in[i*2+1].val));
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printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
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if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
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(val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
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@ -316,9 +315,9 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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volt = 10;
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printf("Setting Channel %d to %dV...\n", i, volt);
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out[i].val = (volt * 0x7fff) / 10;
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out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
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udelay(10000);
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val = in[i*2].val;
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val = in_be16((void *)&(in[i*2].val));
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printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
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if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
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(val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
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@ -326,7 +325,7 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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((volt * 0x7fff) / 40) + ERROR_DELTA);
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return -1;
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}
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val = in[i*2+1].val;
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val = in_be16((void *)&(in[i*2+1].val));
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printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
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if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
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(val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
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@ -350,28 +349,27 @@ int counter = 0;
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void cyclicInt(void *ptr)
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{
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*(ushort *)0xf03000e8 = 0x0800; /* ack int */
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out_be16((void *)0xf03000e8, 0x0800); /* ack int */
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counter++;
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}
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int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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volatile uchar *digout = (volatile uchar *)0xf03000b4;
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volatile ulong *incin;
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ulong *incin;
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int i;
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incin = (volatile ulong *)0xf0300040;
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incin = (ulong *)0xf0300040;
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/*
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* Clear inc counter
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*/
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incin[0] = 0;
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incin[1] = 0;
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incin[2] = 0;
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incin[3] = 0;
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out_be32((void *)&incin[0], 0);
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out_be32((void *)&incin[1], 0);
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out_be32((void *)&incin[2], 0);
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out_be32((void *)&incin[3], 0);
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incin = (volatile ulong *)0xf0300050;
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incin = (ulong *)0xf0300050;
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/*
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* Inc a little
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@ -379,28 +377,29 @@ int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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for (i=0; i<10000; i++) {
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switch (i & 0x03) {
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case 0:
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*digout = 0x02;
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out_8(DIGEN, 0x02);
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break;
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case 1:
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*digout = 0x03;
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out_8(DIGEN, 0x03);
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break;
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case 2:
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*digout = 0x01;
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out_8(DIGEN, 0x01);
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break;
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case 3:
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*digout = 0x00;
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out_8(DIGEN, 0x00);
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break;
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}
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udelay(10);
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}
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printf("Inc 0 = %ld\n", incin[0]);
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printf("Inc 1 = %ld\n", incin[1]);
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printf("Inc 2 = %ld\n", incin[2]);
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printf("Inc 3 = %ld\n", incin[3]);
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printf("Inc 0 = %d\n", in_be32((void *)&incin[0]));
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printf("Inc 1 = %d\n", in_be32((void *)&incin[1]));
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printf("Inc 2 = %d\n", in_be32((void *)&incin[2]));
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printf("Inc 3 = %d\n", in_be32((void *)&incin[3]));
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*(ushort *)0xf03000e0 = 0x0c80-1; /* set counter */
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*(ushort *)0xf03000ec |= 0x0800; /* enable int */
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out_be16((void *)0xf03000e0, 0x0c80-1); /* set counter */
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out_be16((void *)0xf03000ec,
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in_be16((void *)0xf03000ec) | 0x0800); /* enable int */
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irq_install_handler (30, (interrupt_handler_t *) cyclicInt, NULL);
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printf("counter=%d\n", counter);
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@ -84,10 +84,6 @@ int board_early_init_f (void)
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int misc_init_r (void)
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{
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volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
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volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
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volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
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volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4);
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unsigned char *dst;
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ulong len = sizeof(fpgadata);
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int status;
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@ -165,10 +161,10 @@ int misc_init_r (void)
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/*
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* Enable interrupts in exar duart mcr[3]
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*/
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*duart0_mcr = 0x08;
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*duart1_mcr = 0x08;
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*duart2_mcr = 0x08;
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*duart3_mcr = 0x08;
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out_8((void *)(DUART0_BA + 4), 0x08);
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out_8((void *)(DUART1_BA + 4), 0x08);
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out_8((void *)(DUART2_BA + 4), 0x08);
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out_8((void *)(DUART3_BA + 4), 0x08);
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return (0);
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}
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@ -24,6 +24,7 @@
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#include <common.h>
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#include "canbt.h"
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#include <asm/processor.h>
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#include <asm/io.h>
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#include <command.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -117,9 +118,9 @@ int board_early_init_f (void)
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/*
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* Setup port pins for normal operation
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*/
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out32 (GPIO0_ODR, 0x00000000); /* no open drain pins */
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out32 (GPIO0_TCR, 0x07038100); /* setup for output */
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out32 (GPIO0_OR, 0x07030100); /* set output pins to high (default) */
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out_be32 ((void *)GPIO0_ODR, 0x00000000); /* no open drain pins */
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out_be32 ((void *)GPIO0_TCR, 0x07038100); /* setup for output */
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out_be32 ((void *)GPIO0_OR, 0x07030100); /* set output pins to high (default) */
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/*
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* IRQ 0-15 405GP internally generated; active high; level sensitive
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@ -95,14 +95,12 @@ int misc_init_r (void)
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/*
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* Check Board Identity:
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*/
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#define LED_REG (CONFIG_SYS_PLD_BASE + 0x1000)
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int checkboard (void)
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{
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char str[64];
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int flashcnt;
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int delay;
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volatile unsigned char *led_reg = (unsigned char *)((ulong)CONFIG_SYS_PLD_BASE + 0x1000);
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volatile unsigned char *ver_reg = (unsigned char *)((ulong)CONFIG_SYS_PLD_BASE + 0x1001);
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puts ("Board: ");
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@ -112,20 +110,21 @@ int checkboard (void)
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puts(str);
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}
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printf(" (PLD-Version=%02d)\n", *ver_reg);
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printf(" (PLD-Version=%02d)\n",
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in_8((void *)(CONFIG_SYS_PLD_BASE + 0x1001)));
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/*
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* Flash LEDs
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*/
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for (flashcnt = 0; flashcnt < 3; flashcnt++) {
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*led_reg = 0x00; /* LEDs off */
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out_8((void *)LED_REG, 0x00); /* LEDs off */
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for (delay = 0; delay < 100; delay++)
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udelay(1000);
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*led_reg = 0x0f; /* LEDs on */
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out_8((void *)LED_REG, 0x0f); /* LEDs on */
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for (delay = 0; delay < 50; delay++)
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udelay(1000);
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}
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*led_reg = 0x70;
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out_8((void *)LED_REG, 0x70);
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return 0;
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}
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@ -23,6 +23,7 @@
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#include <common.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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#include <command.h>
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#include <malloc.h>
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@ -36,12 +37,14 @@ int board_early_init_f (void)
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* Setup GPIO pins
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*/
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cntrl0Reg = mfdcr(cntrl0);
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mtdcr(cntrl0, cntrl0Reg | ((CONFIG_SYS_EEPROM_WP | CONFIG_SYS_PB_LED | CONFIG_SYS_SELF_RST | CONFIG_SYS_INTA_FAKE) << 5));
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mtdcr(cntrl0, cntrl0Reg |
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((CONFIG_SYS_EEPROM_WP | CONFIG_SYS_PB_LED |
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CONFIG_SYS_SELF_RST | CONFIG_SYS_INTA_FAKE) << 5));
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/* set output pins to high */
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out32(GPIO0_OR, CONFIG_SYS_EEPROM_WP);
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out_be32((void *)GPIO0_OR, CONFIG_SYS_EEPROM_WP);
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/* setup for output (LED=off) */
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out32(GPIO0_TCR, CONFIG_SYS_EEPROM_WP | CONFIG_SYS_PB_LED);
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out_be32((void *)GPIO0_TCR, CONFIG_SYS_EEPROM_WP | CONFIG_SYS_PB_LED);
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/*
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* IRQ 0-15 405GP internally generated; active high; level sensitive
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@ -124,17 +127,20 @@ int eeprom_write_enable (unsigned dev_addr, int state) {
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switch (state) {
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case 1:
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/* Enable write access, clear bit GPIO_SINT2. */
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out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_EEPROM_WP);
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out_be32((void *)GPIO0_OR,
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in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_EEPROM_WP);
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state = 0;
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break;
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case 0:
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/* Disable write access, set bit GPIO_SINT2. */
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out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_EEPROM_WP);
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out_be32((void *)GPIO0_OR,
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in_be32((void *)GPIO0_OR) | CONFIG_SYS_EEPROM_WP);
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state = 0;
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break;
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default:
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/* Read current status back. */
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state = (0 == (in32(GPIO0_OR) & CONFIG_SYS_EEPROM_WP));
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state = (0 == (in_be32((void *)GPIO0_OR) &
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CONFIG_SYS_EEPROM_WP));
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break;
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}
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}
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@ -111,10 +111,10 @@ int board_early_init_f(void)
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* First pull fpga-prg pin low,
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* to disable fpga logic (on version 2 board)
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*/
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out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
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out32(GPIO0_TCR, CONFIG_SYS_FPGA_PRG); /* setup for output */
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out32(GPIO0_OR, CONFIG_SYS_FPGA_PRG); /* set output pins to high */
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out32(GPIO0_OR, 0); /* pull prg low */
|
||||
out_be32((void *)GPIO0_ODR, 0x00000000); /* no open drain pins */
|
||||
out_be32((void *)GPIO0_TCR, CONFIG_SYS_FPGA_PRG); /* setup for output */
|
||||
out_be32((void *)GPIO0_OR, CONFIG_SYS_FPGA_PRG); /* set output pins to high */
|
||||
out_be32((void *)GPIO0_OR, 0); /* pull prg low */
|
||||
|
||||
/*
|
||||
* Boot onboard FPGA
|
||||
|
|
|
|||
|
|
@ -58,7 +58,6 @@ const unsigned char fpgadata[] = {
|
|||
int board_early_init_f (void)
|
||||
{
|
||||
int index, len, i;
|
||||
volatile unsigned char dummy;
|
||||
int status;
|
||||
|
||||
#ifdef FPGA_DEBUG
|
||||
|
|
@ -116,7 +115,7 @@ int board_early_init_f (void)
|
|||
/*
|
||||
* Init FPGA via RESET (read access on CS3)
|
||||
*/
|
||||
dummy = *(unsigned char *) 0xf0200000;
|
||||
in_8((void *)0xf0200000);
|
||||
|
||||
/*
|
||||
* IRQ 0-15 405GP internally generated; active high; level sensitive
|
||||
|
|
|
|||
|
|
@ -25,6 +25,7 @@
|
|||
#include <common.h>
|
||||
#include <command.h>
|
||||
#include <pci.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#define OK 0
|
||||
#define ERROR (-1)
|
||||
|
|
@ -136,8 +137,8 @@ static void updatePci9054 (void)
|
|||
/*
|
||||
* Set EEPROM write-protect register to 0
|
||||
*/
|
||||
out32 (pci9054_iobase + 0x0c,
|
||||
in32 (pci9054_iobase + 0x0c) & 0xffff00ff);
|
||||
out_be32 ((void *)(pci9054_iobase + 0x0c),
|
||||
in_be32 ((void *)(pci9054_iobase + 0x0c)) & 0xffff00ff);
|
||||
|
||||
/* Long Serial EEPROM Load Registers... */
|
||||
val = PciEepromWriteLongVPD (0x00, 0x905410b5);
|
||||
|
|
@ -190,8 +191,8 @@ static void clearPci9054 (void)
|
|||
/*
|
||||
* Set EEPROM write-protect register to 0
|
||||
*/
|
||||
out32 (pci9054_iobase + 0x0c,
|
||||
in32 (pci9054_iobase + 0x0c) & 0xffff00ff);
|
||||
out_be32 ((void *)(pci9054_iobase + 0x0c),
|
||||
in_be32 ((void *)(pci9054_iobase + 0x0c)) & 0xffff00ff);
|
||||
|
||||
/* Long Serial EEPROM Load Registers... */
|
||||
val = PciEepromWriteLongVPD (0x00, 0xffffffff);
|
||||
|
|
|
|||
|
|
@ -74,7 +74,8 @@ static int fpgaBoot (void)
|
|||
|
||||
#ifdef FPGA_DEBUG
|
||||
printf ("%s\n",
|
||||
((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE");
|
||||
((in_be32 ((void *)0x50000084) & 0x00010000) == 0) ?
|
||||
"NOT DONE" : "DONE");
|
||||
#endif
|
||||
|
||||
/* init fpga by asserting and deasserting PROGRAM* (USER2)... */
|
||||
|
|
@ -86,7 +87,8 @@ static int fpgaBoot (void)
|
|||
|
||||
#ifdef FPGA_DEBUG
|
||||
printf ("%s\n",
|
||||
((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE");
|
||||
((in_be32 ((void *)0x50000084) & 0x00010000) == 0) ?
|
||||
"NOT DONE" : "DONE");
|
||||
#endif
|
||||
|
||||
/* cs1: disable burst, disable ready */
|
||||
|
|
@ -109,7 +111,8 @@ static int fpgaBoot (void)
|
|||
|
||||
#ifdef FPGA_DEBUG
|
||||
printf ("%s\n",
|
||||
((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE");
|
||||
((in_be32 ((void *)0x50000084) & 0x00010000) == 0) ?
|
||||
"NOT DONE" : "DONE");
|
||||
#endif
|
||||
|
||||
/* set cs1 to 32 bit data-width, disable burst, enable ready */
|
||||
|
|
@ -125,7 +128,8 @@ static int fpgaBoot (void)
|
|||
|
||||
#ifdef FPGA_DEBUG
|
||||
printf ("%s\n",
|
||||
((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE");
|
||||
((in_be32 ((void *)0x50000084) & 0x00010000) == 0) ?
|
||||
"NOT DONE" : "DONE");
|
||||
#endif
|
||||
|
||||
/* wait for 30 ms... */
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
|
||||
#include <common.h>
|
||||
#include <command.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
|
||||
#define EEPROM_CAP 0x50000358
|
||||
#define EEPROM_DATA 0x5000035c
|
||||
|
|
@ -33,23 +33,23 @@
|
|||
unsigned int eepromReadLong(int offs)
|
||||
{
|
||||
unsigned int value;
|
||||
volatile unsigned short ret;
|
||||
unsigned short ret;
|
||||
int count;
|
||||
|
||||
*(unsigned short *)EEPROM_CAP = offs;
|
||||
out_be16((void *)EEPROM_CAP, offs);
|
||||
|
||||
count = 0;
|
||||
|
||||
for (;;)
|
||||
{
|
||||
count++;
|
||||
ret = *(unsigned short *)EEPROM_CAP;
|
||||
ret = in_be16((void *)EEPROM_CAP);
|
||||
|
||||
if ((ret & 0x8000) != 0)
|
||||
break;
|
||||
}
|
||||
|
||||
value = *(unsigned long *)EEPROM_DATA;
|
||||
value = in_be32((void *)EEPROM_DATA);
|
||||
|
||||
return value;
|
||||
}
|
||||
|
|
@ -69,18 +69,18 @@ unsigned char eepromReadByte(int offs)
|
|||
|
||||
void eepromWriteLong(int offs, unsigned int value)
|
||||
{
|
||||
volatile unsigned short ret;
|
||||
unsigned short ret;
|
||||
int count;
|
||||
|
||||
count = 0;
|
||||
|
||||
*(unsigned long *)EEPROM_DATA = value;
|
||||
*(unsigned short *)EEPROM_CAP = 0x8000 + offs;
|
||||
out_be32((void *)EEPROM_DATA, value);
|
||||
out_be16((void *)EEPROM_CAP, 0x8000 + offs);
|
||||
|
||||
for (;;)
|
||||
{
|
||||
count++;
|
||||
ret = *(unsigned short *)EEPROM_CAP;
|
||||
ret = in_be16((void *)EEPROM_CAP);
|
||||
|
||||
if ((ret & 0x8000) == 0)
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@
|
|||
|
||||
#include <common.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/io.h>
|
||||
#include <command.h>
|
||||
#include <malloc.h>
|
||||
|
||||
|
|
@ -67,9 +68,11 @@ int board_early_init_f (void)
|
|||
/*
|
||||
* Reset CPLD via GPIO12 (CS3) pin
|
||||
*/
|
||||
out32(GPIO0_OR, in32(GPIO0_OR) & ~(0x80000000 >> 12));
|
||||
out_be32((void *)GPIO0_OR,
|
||||
in_be32((void *)GPIO0_OR) & ~(0x80000000 >> 12));
|
||||
udelay(1000); /* wait 1ms */
|
||||
out32(GPIO0_OR, in32(GPIO0_OR) | (0x80000000 >> 12));
|
||||
out_be32((void *)GPIO0_OR,
|
||||
in_be32((void *)GPIO0_OR) | (0x80000000 >> 12));
|
||||
udelay(1000); /* wait 1ms */
|
||||
|
||||
return 0;
|
||||
|
|
@ -93,7 +96,7 @@ int checkboard (void)
|
|||
int i = getenv_r ("serial#", str, sizeof(str));
|
||||
int flashcnt;
|
||||
int delay;
|
||||
volatile unsigned char *led_reg = (unsigned char *)((ulong)CAN_BA + 0x1000);
|
||||
u8 *led_reg = (u8 *)(CAN_BA + 0x1000);
|
||||
|
||||
puts ("Board: ");
|
||||
|
||||
|
|
@ -103,20 +106,20 @@ int checkboard (void)
|
|||
puts(str);
|
||||
}
|
||||
|
||||
printf(" (PLD-Version=%02d)\n", *led_reg);
|
||||
printf(" (PLD-Version=%02d)\n", in_8(led_reg));
|
||||
|
||||
/*
|
||||
* Flash LEDs
|
||||
*/
|
||||
for (flashcnt = 0; flashcnt < 3; flashcnt++) {
|
||||
*led_reg = 0x40; /* LED_B..D off */
|
||||
out_8(led_reg, 0x40); /* LED_B..D off */
|
||||
for (delay = 0; delay < 100; delay++)
|
||||
udelay(1000);
|
||||
*led_reg = 0x47; /* LED_B..D on */
|
||||
out_8(led_reg, 0x47); /* LED_B..D on */
|
||||
for (delay = 0; delay < 50; delay++)
|
||||
udelay(1000);
|
||||
}
|
||||
*led_reg = 0x40;
|
||||
out_8(led_reg, 0x40);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -82,10 +82,6 @@ int board_early_init_f (void)
|
|||
|
||||
int misc_init_r (void)
|
||||
{
|
||||
volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
|
||||
volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
|
||||
volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
|
||||
volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4);
|
||||
unsigned char *dst;
|
||||
ulong len = sizeof(fpgadata);
|
||||
int status;
|
||||
|
|
@ -155,18 +151,20 @@ int misc_init_r (void)
|
|||
/*
|
||||
* Reset external DUARTs
|
||||
*/
|
||||
out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_DUART_RST); /* set reset to high */
|
||||
out_be32((void *)GPIO0_OR,
|
||||
in_be32((void *)GPIO0_OR) | CONFIG_SYS_DUART_RST);
|
||||
udelay(10); /* wait 10us */
|
||||
out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_DUART_RST); /* set reset to low */
|
||||
out_be32((void *)GPIO0_OR,
|
||||
in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_DUART_RST);
|
||||
udelay(1000); /* wait 1ms */
|
||||
|
||||
/*
|
||||
* Enable interrupts in exar duart mcr[3]
|
||||
*/
|
||||
*duart0_mcr = 0x08;
|
||||
*duart1_mcr = 0x08;
|
||||
*duart2_mcr = 0x08;
|
||||
*duart3_mcr = 0x08;
|
||||
out_8((void *)(DUART0_BA + 4), 0x08);
|
||||
out_8((void *)(DUART1_BA + 4), 0x08);
|
||||
out_8((void *)(DUART2_BA + 4), 0x08);
|
||||
out_8((void *)(DUART3_BA + 4), 0x08);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue