mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
Patch by Klaus Heydeck, 12 May 2004:
Using external watchdog for KUP4 boards in mpc8xx/cpu.c; load_sernum_ethaddr() for KUP4 boards in lib_ppc/board.c; various changes to KUP4 board specific files
This commit is contained in:
wdenk
parent
6c1362cf63
commit
02b11f8e09
13 changed files with 288 additions and 45 deletions
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@ -2,6 +2,11 @@
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Changes since U-Boot 1.1.1:
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======================================================================
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* Patch by Klaus Heydeck, 12 May 2004:
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Using external watchdog for KUP4 boards in mpc8xx/cpu.c;
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load_sernum_ethaddr() for KUP4 boards in lib_ppc/board.c;
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various changes to KUP4 board specific files
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* Fix minor network problem on MPC5200: need some delay between
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resetting the PHY and sending the first packet. Implemented in a
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"natural" way by invoking the PHY reset and initialization code
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@ -41,7 +46,7 @@ Changes for U-Boot 1.1.1:
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errata from Vitesse Semiconductor.
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* Patch by Philippe Robin, 22 Apr 2004:
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Fix ethernet configuration for "versatile" board
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Fix ethernet configuration for "versatile" board
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* Patch by Kshitij Gupta, 21 Apr 2004:
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Remove busy loop and use MPU timer fr usleep() on OMAP1510/1610 boards
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@ -70,3 +70,14 @@ void poweron_key (void)
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else
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setenv ("key1", "on");
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}
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#ifdef CONFIG_POST
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/*
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* Returns 1 if keys pressed to start the power-on long-running tests
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* Called from board_init_f().
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*/
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int post_hotkeys_pressed (void)
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{
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return (0);
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}
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#endif
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94
board/kup/common/load_sernum_ethaddr.c
Normal file
94
board/kup/common/load_sernum_ethaddr.c
Normal file
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@ -0,0 +1,94 @@
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/*
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* (C) Copyright 2000-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc8xx.h>
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/*-----------------------------------------------------------------------
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* Process Hardware Information Block:
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*
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* If we boot on a system fresh from factory, check if the Hardware
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* Information Block exists and save the information it contains.
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*
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* The KUP Hardware Information Block is defined as
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* follows:
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* - located in first flash bank
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* - starts at offset CFG_HWINFO_OFFSET
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* - size CFG_HWINFO_SIZE
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*
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* Internal structure:
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* - sequence of ASCII character lines
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* - fields separated by <CR><LF>
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* - last field terminated by NUL character (0x00)
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*
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* Fields in Hardware Information Block:
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* 1) Module Type
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* 2) MAC Address
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* 3) ....
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*/
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#define ETHADDR_TOKEN "ethaddr="
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#define LCD_TOKEN "lcd="
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void load_sernum_ethaddr (void)
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{
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unsigned char *hwi;
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unsigned char *var;
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unsigned char hwi_stack[CFG_HWINFO_SIZE];
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unsigned char *p;
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hwi = (unsigned char *) (CFG_FLASH_BASE + CFG_HWINFO_OFFSET);
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if (*((unsigned long *) hwi) != (unsigned long) CFG_HWINFO_MAGIC) {
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printf ("HardwareInfo not found!\n");
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return;
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}
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memcpy (hwi_stack, hwi, CFG_HWINFO_SIZE);
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/*
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** ethaddr
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*/
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var = strstr (hwi_stack, ETHADDR_TOKEN);
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if (var) {
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var += sizeof (ETHADDR_TOKEN) - 1;
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p = strchr (var, '\r');
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if (p < hwi + CFG_HWINFO_SIZE) {
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*p = '\0';
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setenv ("ethaddr", var);
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*p = '\r';
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}
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}
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/*
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** lcd
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*/
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var = strstr (hwi_stack, LCD_TOKEN);
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if (var) {
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var += sizeof (LCD_TOKEN) - 1;
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p = strchr (var, '\r');
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if (p < hwi + CFG_HWINFO_SIZE) {
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*p = '\0';
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setenv ("lcd", var);
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*p = '\r';
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}
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}
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}
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@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS = $(BOARD).o ../common/flash.o ../common/kup.o
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OBJS = $(BOARD).o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o
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$(LIB): .depend $(OBJS)
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$(AR) crv $@ $(OBJS)
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@ -129,11 +129,11 @@ int checkboard (void)
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*/
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immap->im_memctl.memc_or4 = 0xFFFF8926;
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immap->im_memctl.memc_br4 = 0x90000401;
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__asm__ ("eieio");
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latch=(uchar *)0x90000200;
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rev = (*latch & 0xF8) >> 3;
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mod=(*latch & 0x03);
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printf ("Board: KUP4K Rev %d.%d SN: %s\n",rev,mod,getenv("ethaddr"));
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printf ("Board: KUP4K Rev %d.%d\n",rev,mod);
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return (0);
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}
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@ -346,6 +346,7 @@ void lcd_logo (bd_t * bd)
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*/
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memctl->memc_or5 = 0xFFC007F0; /* 4 MB 17 WS or externel TA */
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memctl->memc_br5 = 0x80080801; /* Start at 0x80080000 */
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__asm__ ("eieio");
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fb_info.VmemAddr = (unsigned char *) (S1D_PHYSICAL_VMEM_ADDR);
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fb_info.RegAddr = (unsigned char *) (S1D_PHYSICAL_REG_ADDR);
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@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS = $(BOARD).o ../common/flash.o ../common/kup.o
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OBJS = $(BOARD).o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o
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$(LIB): .depend $(OBJS)
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$(AR) crv $@ $(OBJS)
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@ -24,6 +24,7 @@
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#include <common.h>
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#include <mpc8xx.h>
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#include <post.h>
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#include "../common/kup.h"
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#ifdef CONFIG_KUP4K_LOGO
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/* #include "s1d13706.h" */
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@ -123,12 +124,11 @@ int checkboard (void)
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*/
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memctl->memc_or4 = 0xFFFF8926;
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memctl->memc_br4 = 0x90000401;
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__asm__ ("eieio");
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latch = (volatile uchar *) 0x90000200;
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rev = (*latch & 0xF8) >> 3;
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mod = (*latch & 0x03);
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printf ("Board: KUP4X Rev %d.%d SN: %s\n", rev, mod,
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getenv ("ethaddr"));
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printf ("Board: KUP4X Rev %d.%d\n",rev,mod);
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return (0);
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}
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@ -567,6 +567,17 @@ void reset_8xx_watchdog (volatile immap_t * immr)
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immr->im_ioport.iop_padir |= WATCHDOG_BIT; /* Output */
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immr->im_ioport.iop_paodr &= ~(WATCHDOG_BIT); /* active output */
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immr->im_ioport.iop_padat ^= WATCHDOG_BIT; /* Toggle WDI */
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# elif defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
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/*
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* The KUP4 boards uses a TPS3705 Watchdog
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* with the trigger pin connected to port PA.5
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*/
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# define WATCHDOG_BIT 0x0400
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immr->im_ioport.iop_papar &= ~(WATCHDOG_BIT); /* GPIO */
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immr->im_ioport.iop_padir |= WATCHDOG_BIT; /* Output */
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immr->im_ioport.iop_paodr &= ~(WATCHDOG_BIT); /* active output */
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immr->im_ioport.iop_padat ^= WATCHDOG_BIT; /* Toggle WDI */
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# else
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/*
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@ -248,7 +248,7 @@ static int sl811_send_packet(struct usb_device *dev, unsigned long pipe, __u8 *b
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ctrl |= SL811_USB_CTRL_TOGGLE_1;
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if (need_preamble)
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ctrl |= SL811_USB_CTRL_PREAMBLE;
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sl811_write(SL811_INTRSTS, 0xff);
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while (err < 3) {
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@ -386,9 +386,9 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
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sl811_write(SL811_PIDEP_A,
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PIDEP(!dir_in ? USB_PID_IN : USB_PID_OUT, ep));
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usb_settoggle(dev, ep, !usb_pipeout(pipe), 1);
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if (sl811_send_packet(dev,
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!dir_in ? usb_rcvctrlpipe(dev, ep) :
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usb_sndctrlpipe(dev, ep),
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if (sl811_send_packet(dev,
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!dir_in ? usb_rcvctrlpipe(dev, ep) :
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usb_sndctrlpipe(dev, ep),
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0, 0) < 0) {
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PDEBUG(0, "status phase failed!\n");
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dev->status = -1;
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@ -759,7 +759,7 @@ jffs2_1pass_list_inodes(struct b_lists * pL, u32 pino)
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get_fl_mem(b2->offset, sizeof(ojNode), &ojNode);
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if (jNode->ino == jDir->ino && jNode->version >= i_version) {
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if (i)
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put_fl_mem(i);
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put_fl_mem(i);
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i = get_fl_mem(b2->offset, sizeof(*i), NULL);
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}
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b2 = b2->next;
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@ -72,8 +72,8 @@
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"contrast=55\0" \
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"silent=1\0" \
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"load=tftp 200000 bootloader-4k.bitmap;tftp 100000 bootloader-4k.bin\0" \
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"update=protect off 1:0-5;era 1:0-5;cp.b 100000 40000000 $(filesize);" \
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"cp.b 200000 40040000 14000\0"
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"update=protect off 1:0-7;era 1:0-7;cp.b 100000 40000000 $(filesize);" \
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"cp.b 200000 40050000 14000\0"
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#define CONFIG_BOOTCOMMAND \
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"run slot_a_boot;run slot_b_boot;run nfs_boot;run panic_boot"
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@ -85,7 +85,7 @@
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
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#undef CONFIG_WATCHDOG /* watchdog disabled */
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#define CONFIG_WATCHDOG 1 /* watchdog enabled */
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#define CONFIG_STATUS_LED 1 /* Status LED enabled */
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@ -96,23 +96,81 @@
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#define CONFIG_MAC_PARTITION
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#define CONFIG_DOS_PARTITION
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#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
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#define CONFIG_HARD_I2C
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#define CFG_I2C_SPEED 40000
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#define CFG_I2C_SLAVE 0x7F
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/*
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* enable I2C and select the hardware/software driver
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*/
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#undef CONFIG_HARD_I2C /* I2C with hardware support */
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#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
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#define CONFIG_ETHADDR 00:0B:64:00:00:00 /* our OUI from IEEE */
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#define CONFIG_KUP4K_LOGO 0x40040000 /* Address of logo bitmap */
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#define CFG_I2C_SPEED 93000 /* 93 kHz is supposed to work */
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#define CFG_I2C_SLAVE 0xFE
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#ifdef CONFIG_SOFT_I2C
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/*
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* Software (bit-bang) I2C driver configuration
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*/
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#define PB_SCL 0x00000020 /* PB 26 */
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#define PB_SDA 0x00000010 /* PB 27 */
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#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
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#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
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#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
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#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
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#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
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else immr->im_cpm.cp_pbdat &= ~PB_SDA
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#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
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else immr->im_cpm.cp_pbdat &= ~PB_SCL
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#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
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#endif /* CONFIG_SOFT_I2C */
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/*-----------------------------------------------------------------------
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* I2C Configuration
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*/
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#define CFG_I2C_PICIO_ADDR 0x21 /* PCF8574 IO Expander */
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#define CFG_I2C_RTC_ADDR 0x51 /* PCF8563 RTC */
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/* List of I2C addresses to be verified by POST */
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#define I2C_ADDR_LIST {CFG_I2C_PICIO_ADDR, \
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CFG_I2C_RTC_ADDR, \
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}
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#define CONFIG_RTC_PCF8563 /* use Philips PCF8563 RTC */
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#define CFG_DISCOVER_PHY
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#if 0
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#define CONFIG_ETHADDR 00:0B:64:00:00:00 /* our OUI from IEEE */
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#endif
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#define CONFIG_KUP4K_LOGO 0x40050000 /* Address of logo bitmap */
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/* Define to allow the user to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#if 1
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/* POST support */
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#define CONFIG_POST (CFG_POST_CPU | \
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CFG_POST_RTC | \
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CFG_POST_I2C)
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#ifdef CONFIG_POST
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#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
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#else
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#define CFG_CMD_POST_DIAG 0
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#endif
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#endif
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#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
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CFG_CMD_DHCP | \
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CFG_CMD_IDE | \
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CFG_CMD_I2C | \
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CFG_CMD_DATE )
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CFG_CMD_DATE | \
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CFG_CMD_POST_DIAG | \
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CFG_CMD_IDE )
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/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
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#include <cmd_confdefs.h>
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@ -189,7 +247,7 @@
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#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
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#define CFG_ENV_IS_IN_FLASH 1
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#define CFG_ENV_OFFSET 0x30000 /* Offset of Environment Sector */
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#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
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#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
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#define CFG_ENV_SECT_SIZE 0x10000
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@ -201,10 +259,10 @@
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/*-----------------------------------------------------------------------
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* Hardware Information Block
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*/
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#if 0
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#define CFG_HWINFO_OFFSET 0x0003FFC0 /* offset of HW Info block */
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#define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */
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#define CFG_HWINFO_MAGIC 0x54514D38 /* 'TQM8' */
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#if 1
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#define CFG_HWINFO_OFFSET 0x000F0000 /* offset of HW Info block */
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#define CFG_HWINFO_SIZE 0x00000100 /* size of HW Info block */
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#define CFG_HWINFO_MAGIC 0x4B26500D /* 'K&P<CR>' */
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#endif
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/*-----------------------------------------------------------------------
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* Cache Configuration
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@ -220,7 +278,7 @@
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*-----------------------------------------------------------------------
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* Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
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*/
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#if defined(CONFIG_WATCHDOG)
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#if 0 && defined(CONFIG_WATCHDOG) /* KUP uses external TPS3705 WD */
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#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
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SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP)
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#else
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@ -69,8 +69,9 @@
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"slot_a_boot=setenv bootargs root=/dev/hda2 ip=off;" \
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"run addhw;diskboot 200000 0:1;bootm 200000\0" \
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"slot_b_boot=setenv bootargs root=/dev/hda2 ip=off;" \
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"run addhw;diskboot 200000 2:1;bootm 200000\0" \
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"usb_boot=setenv bootargs root=/dev/sda2 ip=off;\
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run addhw; sleep 2; usb reset; usb scan; usbboot 200000 0:1;\
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usb stop; bootm 200000\0" \
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"nfs_boot=dhcp;run nfsargs addip addhw;bootm 200000\0" \
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"panic_boot=echo No Bootdevice !!! reset\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath)\0" \
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|
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@ -85,7 +86,7 @@
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"cp.b 200000 40040000 14000\0"
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||||
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||||
#define CONFIG_BOOTCOMMAND \
|
||||
"run slot_a_boot;run nfs_boot;run panic_boot"
|
||||
"run usb_boot;run_slot_a_boot;run nfs_boot;run panic_boot"
|
||||
|
||||
|
||||
#define CONFIG_MISC_INIT_R 1
|
||||
|
|
@ -94,7 +95,7 @@
|
|||
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
|
||||
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
|
||||
|
||||
#undef CONFIG_WATCHDOG /* watchdog disabled */
|
||||
#define CONFIG_WATCHDOG 1 /* watchdog enabled */
|
||||
|
||||
#define CONFIG_STATUS_LED 1 /* Status LED enabled */
|
||||
|
||||
|
|
@ -105,19 +106,81 @@
|
|||
#define CONFIG_MAC_PARTITION
|
||||
#define CONFIG_DOS_PARTITION
|
||||
|
||||
#define CONFIG_HARD_I2C
|
||||
#define CFG_I2C_SPEED 40000
|
||||
#define CFG_I2C_SLAVE 0x7F
|
||||
/*
|
||||
* enable I2C and select the hardware/software driver
|
||||
*/
|
||||
#undef CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
|
||||
|
||||
#define CONFIG_ETHADDR 00:0B:64:80:00:00 /* our OUI from IEEE */
|
||||
#define CFG_I2C_SPEED 93000 /* 93 kHz is supposed to work */
|
||||
#define CFG_I2C_SLAVE 0xFE
|
||||
|
||||
#ifdef CONFIG_SOFT_I2C
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
#define PB_SCL 0x00000020 /* PB 26 */
|
||||
#define PB_SDA 0x00000010 /* PB 27 */
|
||||
|
||||
#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
|
||||
#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
|
||||
#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
|
||||
#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
|
||||
#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
|
||||
else immr->im_cpm.cp_pbdat &= ~PB_SDA
|
||||
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
|
||||
else immr->im_cpm.cp_pbdat &= ~PB_SCL
|
||||
#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
|
||||
#endif /* CONFIG_SOFT_I2C */
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* I2C Configuration
|
||||
*/
|
||||
|
||||
#define CFG_I2C_PICIO_ADDR 0x21 /* PCF8574 IO Expander */
|
||||
#define CFG_I2C_RTC_ADDR 0x51 /* PCF8563 RTC */
|
||||
|
||||
|
||||
/* List of I2C addresses to be verified by POST */
|
||||
|
||||
#define I2C_ADDR_LIST {CFG_I2C_PICIO_ADDR, \
|
||||
CFG_I2C_RTC_ADDR, \
|
||||
}
|
||||
|
||||
|
||||
#define CONFIG_RTC_PCF8563 /* use Philips PCF8563 RTC */
|
||||
|
||||
#define CFG_DISCOVER_PHY
|
||||
|
||||
#if 0
|
||||
#define CONFIG_ETHADDR 00:0B:64:80:00:00 /* our OUI from IEEE */
|
||||
#endif
|
||||
#undef CONFIG_KUP4K_LOGO
|
||||
|
||||
/* Define to allow the user to overwrite serial and ethaddr */
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
|
||||
|
||||
#if 1
|
||||
/* POST support */
|
||||
|
||||
#define CONFIG_POST (CFG_POST_CPU | \
|
||||
CFG_POST_RTC | \
|
||||
CFG_POST_I2C)
|
||||
|
||||
#ifdef CONFIG_POST
|
||||
#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
|
||||
#else
|
||||
#define CFG_CMD_POST_DIAG 0
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
|
||||
CFG_CMD_DHCP | \
|
||||
CFG_CMD_I2C | \
|
||||
CFG_CMD_DATE | \
|
||||
CFG_CMD_POST_DIAG | \
|
||||
CFG_CMD_IDE | \
|
||||
CFG_CMD_USB | \
|
||||
CFG_CMD_FAT)
|
||||
|
|
@ -196,7 +259,7 @@
|
|||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
||||
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_OFFSET 0x30000 /* Offset of Environment Sector */
|
||||
#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SECT_SIZE 0x10000
|
||||
|
||||
|
|
@ -208,10 +271,10 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* Hardware Information Block
|
||||
*/
|
||||
#if 0
|
||||
#define CFG_HWINFO_OFFSET 0x0003FFC0 /* offset of HW Info block */
|
||||
#define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */
|
||||
#define CFG_HWINFO_MAGIC 0x54514D38 /* 'TQM8' */
|
||||
#if 1
|
||||
#define CFG_HWINFO_OFFSET 0x000F0000 /* offset of HW Info block */
|
||||
#define CFG_HWINFO_SIZE 0x00000100 /* size of HW Info block */
|
||||
#define CFG_HWINFO_MAGIC 0x4B26500D /* 'K&P<CR>' */
|
||||
#endif
|
||||
/*-----------------------------------------------------------------------
|
||||
* Cache Configuration
|
||||
|
|
@ -227,7 +290,7 @@
|
|||
*-----------------------------------------------------------------------
|
||||
* Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
|
||||
*/
|
||||
#if defined(CONFIG_WATCHDOG)
|
||||
#if 0 && defined(CONFIG_WATCHDOG) /* KUP uses external TPS3705 WD */
|
||||
#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
|
||||
SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP)
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -817,7 +817,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
|
|||
#endif
|
||||
|
||||
#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
|
||||
defined(CONFIG_CCM)
|
||||
defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
|
||||
load_sernum_ethaddr ();
|
||||
#endif
|
||||
/* IP Address */
|
||||
|
|
|
|||
Loading…
Reference in a new issue