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Merge git://www.denx.de/git/u-boot into uboot

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This commit is contained in:
Gerald Van Baren 2008-03-21 11:58:22 -04:00
commit 01026a6e61
62 changed files with 1170 additions and 63 deletions
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4
board/bmw/m48t59y.c
View file

@ -278,7 +278,7 @@ void m48_watchdog_arm(int usec)
/*
* U-Boot RTC support.
*/
void
int
rtc_get( struct rtc_time *tmp )
{
m48_tod_get(&tmp->tm_year,
@ -295,6 +295,8 @@ rtc_get( struct rtc_time *tmp )
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec );
#endif
return 0;
}
void

4
board/cray/L1/L1.c
View file

@ -170,9 +170,9 @@ long int initdram (int board_type)
/* ------------------------------------------------------------------------- */
/* stubs so we can print dates w/o any nvram RTC.*/
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
return;
return 0;
}
void rtc_set (struct rtc_time *tmp)
{

4
board/etin/debris/phantom.c
View file

@ -182,7 +182,7 @@ static int get_century_flag(void)
return flag;
}
void rtc_get( struct rtc_time *tmp)
int rtc_get( struct rtc_time *tmp)
{
if (phantom_flag < 0)
phantom_flag = get_phantom_flag();
@ -250,6 +250,8 @@ void rtc_get( struct rtc_time *tmp)
tmp->tm_yday = 0;
tmp->tm_isdst= 0;
}
return 0;
}
void rtc_set( struct rtc_time *tmp )

48
board/lwmon5/lwmon5.c
View file

@ -96,6 +96,25 @@ int board_early_init_f(void)
gpio_write_bit(CFG_GPIO_FLASH_WP, 1);
#if CONFIG_POST & CFG_POST_BSPEC1
gpio_write_bit(CFG_GPIO_HIGHSIDE, 1);
reg = 0; /* reuse as counter */
out_be32((void *)CFG_DSPIC_TEST_ADDR,
in_be32((void *)CFG_DSPIC_TEST_ADDR)
& ~CFG_DSPIC_TEST_MASK);
while (!gpio_read_in_bit(CFG_GPIO_DSPIC_READY) && reg++ < 1000) {
udelay(1000);
}
gpio_write_bit(CFG_GPIO_HIGHSIDE, 0);
if (gpio_read_in_bit(CFG_GPIO_DSPIC_READY)) {
/* set "boot error" flag */
out_be32((void *)CFG_DSPIC_TEST_ADDR,
in_be32((void *)CFG_DSPIC_TEST_ADDR) |
CFG_DSPIC_TEST_MASK);
}
#endif
/*
* Reset PHY's:
* The PHY's need a 2nd reset pulse, since the MDIO address is latched
@ -548,11 +567,13 @@ unsigned int board_video_init (void)
return CFG_LIME_BASE_0;
}
void board_backlight_switch (int flag)
#define DEFAULT_BRIGHTNESS 0x64
static void board_backlight_brightness(int brightness)
{
if (flag) {
if (brightness > 0) {
/* pwm duty, lamp on */
out_be32((void *)(CFG_FPGA_BASE_0 + 0x00000024), 0x64);
out_be32((void *)(CFG_FPGA_BASE_0 + 0x00000024), brightness);
out_be32((void *)(CFG_FPGA_BASE_0 + 0x00000020), 0x701);
} else {
/* lamp off */
@ -561,6 +582,22 @@ void board_backlight_switch (int flag)
}
}
void board_backlight_switch (int flag)
{
char * param;
int rc;
if (flag) {
param = getenv("brightness");
rc = param ? simple_strtol(param, NULL, 10) : -1;
if (rc < 0)
rc = DEFAULT_BRIGHTNESS;
} else {
rc = 0;
}
board_backlight_brightness(rc);
}
#if defined(CONFIG_CONSOLE_EXTRA_INFO)
/*
* Return text to be printed besides the logo.
@ -575,3 +612,8 @@ void video_get_info_str (int line_number, char *info)
}
#endif
#endif /* CONFIG_VIDEO */
void board_reset(void)
{
gpio_write_bit(CFG_GPIO_BOARD_RESET, 1);
}

4
board/mousse/m48t59y.c
View file

@ -278,7 +278,7 @@ void m48_watchdog_arm(int usec)
/*
* U-Boot RTC support.
*/
void
int
rtc_get( struct rtc_time *tmp )
{
m48_tod_get(&tmp->tm_year,
@ -295,6 +295,8 @@ rtc_get( struct rtc_time *tmp )
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec );
#endif
return 0;
}
void

4
common/cmd_bootm.c
View file

@ -545,11 +545,15 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
}
#ifdef CONFIG_LOGBUFFER
#ifndef CONFIG_ALT_LB_ADDR
kbd=gd->bd;
/* Prevent initrd from overwriting logbuffer */
if (initrd_high < (kbd->bi_memsize-LOGBUFF_LEN-LOGBUFF_OVERHEAD))
initrd_high = kbd->bi_memsize-LOGBUFF_LEN-LOGBUFF_OVERHEAD;
debug ("## Logbuffer at 0x%08lX ", kbd->bi_memsize-LOGBUFF_LEN);
#else
debug ("## Logbuffer at 0x%08lX ", CONFIG_ALT_LB_ADDR);
#endif
#endif
/*

38
common/cmd_log.c
View file

@ -59,14 +59,25 @@ static char buf[1024];
static unsigned console_loglevel = 3;
static unsigned default_message_loglevel = 4;
static unsigned log_version = 1;
#ifdef CONFIG_ALT_LB_ADDR
static volatile logbuff_t *log;
#else
static logbuff_t *log;
#endif
static char *lbuf;
void logbuff_init_ptrs (void)
{
unsigned long tag, post_word;
char *s;
#ifdef CONFIG_ALT_LB_ADDR
log = (logbuff_t *)CONFIG_ALT_LH_ADDR;
lbuf = (char *)CONFIG_ALT_LB_ADDR;
#else
log = (logbuff_t *)(gd->bd->bi_memsize-LOGBUFF_LEN) - 1;
lbuf = log->buf;
#endif
/* Set up log version */
if ((s = getenv ("logversion")) != NULL)
@ -101,11 +112,26 @@ void logbuff_init_ptrs (void)
void logbuff_reset (void)
{
#ifndef CONFIG_ALT_LB_ADDR
memset (log, 0, sizeof (logbuff_t));
if (log_version == 2)
#endif
if (log_version == 2) {
log->v2.tag = LOGBUFF_MAGIC;
else
#ifdef CONFIG_ALT_LB_ADDR
log->v2.start = 0;
log->v2.con = 0;
log->v2.end = 0;
log->v2.chars = 0;
#endif
} else {
log->v1.tag = LOGBUFF_MAGIC;
#ifdef CONFIG_ALT_LB_ADDR
log->v1.dummy = 0;
log->v1.start = 0;
log->v1.size = 0;
log->v1.chars = 0;
#endif
}
}
int drv_logbuff_init (void)
@ -188,7 +214,7 @@ int do_log (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
size = log->v1.size;
}
for (i=0; i < (size&LOGBUFF_MASK); i++) {
s = (char *)log->buf+((start+i)&LOGBUFF_MASK);
s = lbuf+((start+i)&LOGBUFF_MASK);
putc (*s);
}
return 0;
@ -196,7 +222,7 @@ int do_log (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
logbuff_reset ();
return 0;
} else if (strcmp(argv[1],"info") == 0) {
printf ("Logbuffer at %08lx\n", (unsigned long)log->buf);
printf ("Logbuffer at %08lx\n", (unsigned long)lbuf);
if (log_version == 2) {
printf ("log_start = %08lx\n", log->v2.start);
printf ("log_end = %08lx\n", log->v2.end);
@ -257,14 +283,14 @@ static int logbuff_printk(const char *line)
line_feed = 0;
for (; p < buf_end; p++) {
if (log_version == 2) {
log->buf[log->v2.end & LOGBUFF_MASK] = *p;
lbuf[log->v2.end & LOGBUFF_MASK] = *p;
log->v2.end++;
if (log->v2.end - log->v2.start > LOGBUFF_LEN)
log->v2.start++;
log->v2.chars++;
}
else {
log->buf[(log->v1.start + log->v1.size) &
lbuf[(log->v1.start + log->v1.size) &
LOGBUFF_MASK] = *p;
if (log->v1.size < LOGBUFF_LEN)
log->v1.size++;

8
common/main.c
View file

@ -40,7 +40,7 @@
#include <post.h>
#ifdef CONFIG_SILENT_CONSOLE
#if defined(CONFIG_SILENT_CONSOLE) || defined(CONFIG_POST)
DECLARE_GLOBAL_DATA_PTR;
#endif
@ -369,6 +369,12 @@ void main_loop (void)
init_cmd_timeout ();
# endif /* CONFIG_BOOT_RETRY_TIME */
#ifdef CONFIG_POST
if (gd->flags & GD_FLG_POSTFAIL) {
s = getenv("failbootcmd");
}
else
#endif /* CONFIG_POST */
#ifdef CONFIG_BOOTCOUNT_LIMIT
if (bootlimit && (bootcount > bootlimit)) {
printf ("Warning: Bootlimit (%u) exceeded. Using altbootcmd.\n",

4
cpu/s3c44b0/cpu.c
View file

@ -155,7 +155,7 @@ int dcache_status (void)
#define HEX2BCD(x) ((((x) / 10) << 4) + (x) % 10)
#endif
void rtc_get (struct rtc_time* tm)
int rtc_get (struct rtc_time* tm)
{
RTCCON |= 1;
tm->tm_year = BCD2HEX(BCDYEAR);
@ -184,6 +184,8 @@ void rtc_get (struct rtc_time* tm)
tm->tm_year += 1900;
else
tm->tm_year += 2000;
return 0;
}
void rtc_set (struct rtc_time* tm)

6
drivers/rtc/bfin_rtc.c
View file

@ -85,7 +85,7 @@ void rtc_set(struct rtc_time *tmp)
}
/* Read the time from the RTC_STAT. time_in_seconds is seconds since Jan 1970 */
void rtc_get(struct rtc_time *tmp)
int rtc_get(struct rtc_time *tmp)
{
uint32_t cur_rtc_stat;
int time_in_sec;
@ -95,7 +95,7 @@ void rtc_get(struct rtc_time *tmp)
if (tmp == NULL) {
puts("Error getting the date/time\n");
return;
return -1;
}
wait_for_complete();
@ -112,6 +112,8 @@ void rtc_get(struct rtc_time *tmp)
/* Calculate the total number of seconds since epoch */
time_in_sec = (tm_sec) + MIN_TO_SECS(tm_min) + HRS_TO_SECS(tm_hr) + DAYS_TO_SECS(tm_day);
to_tm(time_in_sec, tmp);
return 0;
}
#endif

4
drivers/rtc/ds12887.c
View file

@ -88,7 +88,7 @@ static unsigned char bin2bcd (unsigned int n)
/* ------------------------------------------------------------------------- */
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
uchar sec, min, hour, mday, wday, mon, year;
@ -150,6 +150,8 @@ else
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
#endif
return 0;
}
void rtc_set (struct rtc_time *tmp)

6
drivers/rtc/ds1302.c
View file

@ -253,9 +253,10 @@ rtc_reset(void)
/* TODO */
}
void
int
rtc_get(struct rtc_time *tmp)
{
int rel = 0;
struct ds1302_st bbclk;
if(!ds1302_initted) rtc_init();
@ -265,6 +266,7 @@ rtc_get(struct rtc_time *tmp)
if (bbclk.CH) {
printf("ds1302: rtc_get: Clock was halted, clock probably "
"corrupt\n");
rel = -1;
}
tmp->tm_sec=10*bbclk.sec10+bbclk.sec;
@ -281,6 +283,8 @@ rtc_get(struct rtc_time *tmp)
DPRINTF("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec );
return rel;
}
void

8
drivers/rtc/ds1306.c
View file

@ -91,7 +91,7 @@ static void init_spi (void);
/* ------------------------------------------------------------------------- */
/* read clock time from DS1306 and return it in *tmp */
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
unsigned char spi_byte; /* Data Byte */
@ -141,6 +141,8 @@ void rtc_get (struct rtc_time *tmp)
debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
return 0;
}
/* ------------------------------------------------------------------------- */
@ -304,7 +306,7 @@ static unsigned char rtc_read (unsigned char reg);
static void rtc_write (unsigned char reg, unsigned char val);
/* read clock time from DS1306 and return it in *tmp */
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
unsigned char sec, min, hour, mday, wday, mon, year;
@ -349,6 +351,8 @@ void rtc_get (struct rtc_time *tmp)
debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
return 0;
}
/* ------------------------------------------------------------------------- */

6
drivers/rtc/ds1307.c
View file

@ -83,8 +83,9 @@ static unsigned bcd2bin (uchar c);
/*
* Get the current time from the RTC
*/
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
int rel = 0;
uchar sec, min, hour, mday, wday, mon, year;
sec = rtc_read (RTC_SEC_REG_ADDR);
@ -104,6 +105,7 @@ void rtc_get (struct rtc_time *tmp)
/* clear the CH flag */
rtc_write (RTC_SEC_REG_ADDR,
rtc_read (RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH);
rel = -1;
}
tmp->tm_sec = bcd2bin (sec & 0x7F);
@ -119,6 +121,8 @@ void rtc_get (struct rtc_time *tmp)
DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
return rel;
}

6
drivers/rtc/ds1337.c
View file

@ -84,8 +84,9 @@ static unsigned bcd2bin (uchar c);
/*
* Get the current time from the RTC
*/
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
int rel = 0;
uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
control = rtc_read (RTC_CTL_REG_ADDR);
@ -107,6 +108,7 @@ void rtc_get (struct rtc_time *tmp)
/* clear the OSF flag */
rtc_write (RTC_STAT_REG_ADDR,
rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
rel = -1;
}
tmp->tm_sec = bcd2bin (sec & 0x7F);
@ -122,6 +124,8 @@ void rtc_get (struct rtc_time *tmp)
DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
return rel;
}

11
drivers/rtc/ds1374.c
View file

@ -107,8 +107,8 @@ static void rtc_write_raw (uchar reg, uchar val);
/*
* Get the current time from the RTC
*/
void rtc_get (struct rtc_time *tm){
int rtc_get (struct rtc_time *tm){
int rel = 0;
unsigned long time1, time2;
unsigned int limit;
unsigned char tmp;
@ -138,18 +138,23 @@ void rtc_get (struct rtc_time *tm){
if (time1 != time2) {
printf("can't get consistent time from rtc chip\n");
rel = -1;
}
DEBUGR ("Get RTC s since 1.1.1970: %d\n", time1);
to_tm(time1, tm); /* To Gregorian Date */
if (rtc_read(RTC_SR_ADDR) & RTC_SR_BIT_OSF)
if (rtc_read(RTC_SR_ADDR) & RTC_SR_BIT_OSF) {
printf ("### Warning: RTC oscillator has stopped\n");
rel = -1;
}
DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
tm->tm_hour, tm->tm_min, tm->tm_sec);
return rel;
}
/*

3
drivers/rtc/ds1556.c
View file

@ -69,7 +69,7 @@ static unsigned bcd2bin(uchar c);
/* ------------------------------------------------------------------------- */
void rtc_get( struct rtc_time *tmp )
int rtc_get( struct rtc_time *tmp )
{
uchar sec, min, hour;
uchar mday, wday, mon, year;
@ -118,6 +118,7 @@ void rtc_get( struct rtc_time *tmp )
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec );
#endif
return 0;
}
void rtc_set( struct rtc_time *tmp )

4
drivers/rtc/ds164x.c
View file

@ -70,7 +70,7 @@ static unsigned bcd2bin(uchar c);
/* ------------------------------------------------------------------------- */
void rtc_get( struct rtc_time *tmp )
int rtc_get( struct rtc_time *tmp )
{
uchar sec, min, hour;
uchar mday, wday, mon, year;
@ -115,6 +115,8 @@ void rtc_get( struct rtc_time *tmp )
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec );
#endif
return 0;
}
void rtc_set( struct rtc_time *tmp )

4
drivers/rtc/ds174x.c
View file

@ -65,7 +65,7 @@ static unsigned bcd2bin(uchar c);
/* ------------------------------------------------------------------------- */
void rtc_get( struct rtc_time *tmp )
int rtc_get( struct rtc_time *tmp )
{
uchar sec, min, hour;
uchar mday, wday, mon, year;
@ -142,6 +142,8 @@ void rtc_set( struct rtc_time *tmp )
/* unlock clock registers after read */
rtc_write( RTC_CONTROLA, ( reg_a & ~RTC_CA_WRITE ));
return 0;
}
void rtc_reset (void)

6
drivers/rtc/ds3231.c
View file

@ -86,8 +86,9 @@ static unsigned bcd2bin (uchar c);
/*
* Get the current time from the RTC
*/
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
int rel = 0;
uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
control = rtc_read (RTC_CTL_REG_ADDR);
@ -109,6 +110,7 @@ void rtc_get (struct rtc_time *tmp)
/* clear the OSF flag */
rtc_write (RTC_STAT_REG_ADDR,
rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
rel = -1;
}
tmp->tm_sec = bcd2bin (sec & 0x7F);
@ -124,6 +126,8 @@ void rtc_get (struct rtc_time *tmp)
DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
return rel;
}

6
drivers/rtc/isl1208.c
View file

@ -73,8 +73,9 @@ static unsigned bcd2bin (uchar c);
* Get the current time from the RTC
*/
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
int rel = 0;
uchar sec, min, hour, mday, wday, mon, year, status;
status = rtc_read (RTC_STAT_REG_ADDR);
@ -94,6 +95,7 @@ void rtc_get (struct rtc_time *tmp)
printf ("### Warning: RTC oscillator has stopped\n");
rtc_write(RTC_STAT_REG_ADDR,
rtc_read(RTC_STAT_REG_ADDR) &~ (RTC_STAT_BIT_BAT|RTC_STAT_BIT_RTCF));
rel = -1;
}
tmp->tm_sec = bcd2bin (sec & 0x7F);
@ -109,6 +111,8 @@ void rtc_get (struct rtc_time *tmp)
DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
return rel;
}
/*

7
drivers/rtc/m41t11.c
View file

@ -96,14 +96,16 @@ static unsigned char bin2bcd (unsigned int n)
#define M41T11_STORAGE_SZ (64-REG_CNT)
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
int rel = 0;
uchar data[RTC_REG_CNT];
i2c_read(CFG_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, data, RTC_REG_CNT);
if( data[RTC_SEC_ADDR] & 0x80 ){
printf( "m41t11 RTC Clock stopped!!!\n" );
rel = -1;
}
tmp->tm_sec = bcd2bin (data[RTC_SEC_ADDR] & 0x7F);
tmp->tm_min = bcd2bin (data[RTC_MIN_ADDR] & 0x7F);
@ -120,6 +122,7 @@ void rtc_get (struct rtc_time *tmp)
i2c_read(CFG_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, &cent, M41T11_YEAR_SIZE);
if( !(data[RTC_HOUR_ADDR] & 0x80) ){
printf( "m41t11 RTC: cann't keep track of years without CEB set\n" );
rel = -1;
}
if( (cent & 0x1) != ((data[RTC_HOUR_ADDR]&0x40)>>7) ){
/*century flip store off new year*/
@ -136,6 +139,8 @@ void rtc_get (struct rtc_time *tmp)
debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
return rel;
}
void rtc_set (struct rtc_time *tmp)

6
drivers/rtc/m41t60.c
View file

@ -170,12 +170,12 @@ static uchar *rtc_validate(void)
return data;
}
void rtc_get(struct rtc_time *tmp)
int rtc_get(struct rtc_time *tmp)
{
uchar const *const data = rtc_validate();
if (!data)
return;
return -1;
tmp->tm_sec = bcd2bin(data[RTC_SEC] & 0x7F);
tmp->tm_min = bcd2bin(data[RTC_MIN] & 0x7F);
@ -190,6 +190,8 @@ void rtc_get(struct rtc_time *tmp)
debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
return 0;
}
void rtc_set(struct rtc_time *tmp)

4
drivers/rtc/m41t62.c
View file

@ -64,7 +64,7 @@
#define M41T62_FEATURE_HT (1 << 0)
#define M41T62_FEATURE_BL (1 << 1)
void rtc_get(struct rtc_time *tm)
int rtc_get(struct rtc_time *tm)
{
u8 buf[M41T62_DATETIME_REG_SIZE];
@ -92,6 +92,8 @@ void rtc_get(struct rtc_time *tm)
__FUNCTION__,
tm->tm_sec, tm->tm_min, tm->tm_hour,
tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
return 0;
}
void rtc_set(struct rtc_time *tm)

4
drivers/rtc/m48t35ax.c
View file

@ -42,7 +42,7 @@ static unsigned bcd2bin(uchar c);
/* ------------------------------------------------------------------------- */
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
uchar sec, min, hour, cent_day, date, month, year;
uchar ccr; /* Clock control register */
@ -83,6 +83,8 @@ void rtc_get (struct rtc_time *tmp)
debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
return 0;
}
void rtc_set (struct rtc_time *tmp)

4
drivers/rtc/max6900.c
View file

@ -63,7 +63,7 @@ static unsigned char bin2bcd (unsigned int n)
/* ------------------------------------------------------------------------- */
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
uchar sec, min, hour, mday, wday, mon, cent, year;
int retry = 1;
@ -103,6 +103,8 @@ void rtc_get (struct rtc_time *tmp)
debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
return 0;
}
void rtc_set (struct rtc_time *tmp)

4
drivers/rtc/mc146818.c
View file

@ -57,7 +57,7 @@ static unsigned bcd2bin(uchar c);
/* ------------------------------------------------------------------------- */
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
uchar sec, min, hour, mday, wday, mon, year;
/* here check if rtc can be accessed */
@ -101,6 +101,8 @@ void rtc_get (struct rtc_time *tmp)
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
#endif
return 0;
}
void rtc_set (struct rtc_time *tmp)

4
drivers/rtc/mcfrtc.c
View file

@ -39,7 +39,7 @@
#define isleap(y) ((((y) % 4) == 0 && ((y) % 100) != 0) || ((y) % 400) == 0)
#define STARTOFTIME 1970
void rtc_get(struct rtc_time *tmp)
int rtc_get(struct rtc_time *tmp)
{
volatile rtc_t *rtc = (rtc_t *) (CFG_MCFRTC_BASE);
@ -64,6 +64,8 @@ void rtc_get(struct rtc_time *tmp)
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
#endif
return 0;
}
void rtc_set(struct rtc_time *tmp)

4
drivers/rtc/mk48t59.c
View file

@ -135,7 +135,7 @@ void nvram_write(short dest, const void *src, size_t count)
/* ------------------------------------------------------------------------- */
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
uchar save_ctrl_a;
uchar sec, min, hour, mday, wday, mon, year;
@ -183,6 +183,8 @@ void rtc_get (struct rtc_time *tmp)
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
#endif
return 0;
}
void rtc_set (struct rtc_time *tmp)

4
drivers/rtc/mpc5xxx.c
View file

@ -55,7 +55,7 @@ typedef struct rtc5200 {
/*****************************************************************************
* get time
*****************************************************************************/
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
RTC5200 *rtc = (RTC5200 *) (CFG_MBAR+0x800);
ulong time, date, time2;
@ -81,6 +81,8 @@ void rtc_get (struct rtc_time *tmp)
debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
return 0;
}
/*****************************************************************************

4
drivers/rtc/mpc8xx.c
View file

@ -35,7 +35,7 @@
/* ------------------------------------------------------------------------- */
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
volatile immap_t *immr = (immap_t *)CFG_IMMR;
ulong tim;
@ -47,6 +47,8 @@ void rtc_get (struct rtc_time *tmp)
debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
return 0;
}
void rtc_set (struct rtc_time *tmp)

6
drivers/rtc/pcf8563.c
View file

@ -41,8 +41,9 @@ static unsigned bcd2bin(uchar c);
/* ------------------------------------------------------------------------- */
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
int rel = 0;
uchar sec, min, hour, mday, wday, mon_cent, year;
sec = rtc_read (0x02);
@ -65,6 +66,7 @@ void rtc_get (struct rtc_time *tmp)
if (sec & 0x80) {
puts ("### Warning: RTC Low Voltage - date/time not reliable\n");
rel = -1;
}
tmp->tm_sec = bcd2bin (sec & 0x7F);
@ -80,6 +82,8 @@ void rtc_get (struct rtc_time *tmp)
debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
return rel;
}
void rtc_set (struct rtc_time *tmp)

8
drivers/rtc/rs5c372.c
View file

@ -166,7 +166,7 @@ rs5c372_convert_to_time(struct rtc_time *dt, unsigned char *buf)
/*
* Get the current time from the RTC
*/
void
int
rtc_get (struct rtc_time *tmp)
{
unsigned char buf[RS5C372_RAM_SIZE];
@ -176,7 +176,7 @@ rtc_get (struct rtc_time *tmp)
rs5c372_enable();
if (!setup_done)
return;
return -1;
memset(buf, 0, sizeof(buf));
@ -184,12 +184,12 @@ rtc_get (struct rtc_time *tmp)
ret = rs5c372_readram(buf, RS5C372_RAM_SIZE);
if (ret != 0) {
printf("%s: failed\n", __FUNCTION__);
return;
return -1;
}
rs5c372_convert_to_time(tmp, buf);
return;
return 0;
}
/*

17
drivers/rtc/rx8025.c
View file

@ -96,8 +96,9 @@ static unsigned bcd2bin (uchar c);
/*
* Get the current time from the RTC
*/
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
int rel = 0;
uchar sec, min, hour, mday, wday, mon, year, ctl2;
uchar buf[16];
@ -118,14 +119,20 @@ void rtc_get (struct rtc_time *tmp)
/* dump status */
ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
if (ctl2 & RTC_CTL2_BIT_PON)
if (ctl2 & RTC_CTL2_BIT_PON) {
printf("RTC: power-on detected\n");
rel = -1;
}
if (ctl2 & RTC_CTL2_BIT_VDET)
if (ctl2 & RTC_CTL2_BIT_VDET) {
printf("RTC: voltage drop detected\n");
rel = -1;
}
if (!(ctl2 & RTC_CTL2_BIT_XST))
if (!(ctl2 & RTC_CTL2_BIT_XST)) {
printf("RTC: oscillator stop detected\n");
rel = -1;
}
tmp->tm_sec = bcd2bin (sec & 0x7F);
tmp->tm_min = bcd2bin (min & 0x7F);
@ -140,6 +147,8 @@ void rtc_get (struct rtc_time *tmp)
DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
return rel;
}
/*

4
drivers/rtc/s3c24x0_rtc.c
View file

@ -70,7 +70,7 @@ static unsigned char bin2bcd (unsigned int n)
/* ------------------------------------------------------------------------- */
void rtc_get (struct rtc_time *tmp)
int rtc_get (struct rtc_time *tmp)
{
S3C24X0_RTC * const rtc = S3C24X0_GetBase_RTC();
uchar sec, min, hour, mday, wday, mon, year;
@ -131,6 +131,8 @@ void rtc_get (struct rtc_time *tmp)
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
#endif
return 0;
}
void rtc_set (struct rtc_time *tmp)

4
drivers/rtc/x1205.c
View file

@ -104,7 +104,7 @@ static void rtc_write(int reg, u8 val)
* rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
* Epoch is initialized as 2000. Time is set to UTC.
*/
void rtc_get(struct rtc_time *tm)
int rtc_get(struct rtc_time *tm)
{
u8 buf[8];
@ -130,6 +130,8 @@ void rtc_get(struct rtc_time *tm)
__FUNCTION__,
tm->tm_sec, tm->tm_min, tm->tm_hour,
tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
return 0;
}
void rtc_set(struct rtc_time *tm)

1
include/asm-arm/global_data.h
View file

@ -60,6 +60,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r8")

1
include/asm-avr32/global_data.h
View file

@ -51,6 +51,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm("r5")

1
include/asm-blackfin/global_data.h
View file

@ -61,6 +61,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register gd_t * volatile gd asm ("P5")

1
include/asm-i386/global_data.h
View file

@ -54,6 +54,7 @@ typedef struct {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
extern gd_t *global_data;

1
include/asm-m68k/global_data.h
View file

@ -68,6 +68,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#if 0
extern gd_t *global_data;

1
include/asm-microblaze/global_data.h
View file

@ -52,6 +52,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r31")

1
include/asm-mips/global_data.h
View file

@ -54,6 +54,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("k0")

1
include/asm-nios/global_data.h
View file

@ -45,6 +45,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("%g7")

1
include/asm-nios2/global_data.h
View file

@ -44,6 +44,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r15")

1
include/asm-ppc/global_data.h
View file

@ -164,6 +164,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#if 1
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")

1
include/asm-sh/global_data.h
View file

@ -44,6 +44,7 @@ typedef struct global_data
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r13")

96
include/configs/lwmon5.h
View file

@ -36,6 +36,7 @@
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_BOARD_POSTCLK_INIT 1 /* Call board_postclk_init */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
#define CONFIG_BOARD_RESET 1 /* Call board_reset */
/*-----------------------------------------------------------------------
* Base addresses -- Note these are effective addresses where the
@ -86,6 +87,15 @@
#define CFG_POST_ALT_WORD_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP6)
/* unused GPT0 COMP reg */
/* Additional registers for watchdog timer post test */
#define CFG_DSPIC_TEST_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP5)
#define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP4)
#define CFG_WATCHDOG_FLAGS_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP5)
#define CFG_WATCHDOG_MAGIC 0x12480000
#define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000
#define CFG_DSPIC_TEST_MASK 0x00000001
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
@ -156,10 +166,86 @@
CFG_POST_MEMORY | \
CFG_POST_RTC | \
CFG_POST_SPR | \
CFG_POST_UART)
CFG_POST_UART | \
CFG_POST_SYSMON | \
CFG_POST_WATCHDOG | \
CFG_POST_DSP | \
CFG_POST_BSPEC1 | \
CFG_POST_BSPEC2 | \
CFG_POST_BSPEC3 | \
CFG_POST_BSPEC4 | \
CFG_POST_BSPEC5)
#define CONFIG_POST_WATCHDOG {\
"Watchdog timer test", \
"watchdog", \
"This test checks the watchdog timer.", \
POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT, \
&lwmon5_watchdog_post_test, \
NULL, \
NULL, \
CFG_POST_WATCHDOG \
}
#define CONFIG_POST_BSPEC1 {\
"dsPIC init test", \
"dspic_init", \
"This test returns result of dsPIC READY test run earlier.", \
POST_RAM | POST_ALWAYS, \
&dspic_init_post_test, \
NULL, \
NULL, \
CFG_POST_BSPEC1 \
}
#define CONFIG_POST_BSPEC2 {\
"dsPIC test", \
"dspic", \
"This test gets result of dsPIC POST and dsPIC version.", \
POST_RAM | POST_ALWAYS, \
&dspic_post_test, \
NULL, \
NULL, \
CFG_POST_BSPEC2 \
}
#define CONFIG_POST_BSPEC3 {\
"FPGA test", \
"fpga", \
"This test checks FPGA registers and memory.", \
POST_RAM | POST_ALWAYS, \
&fpga_post_test, \
NULL, \
NULL, \
CFG_POST_BSPEC3 \
}
#define CONFIG_POST_BSPEC4 {\
"GDC test", \
"gdc", \
"This test checks GDC registers and memory.", \
POST_RAM | POST_ALWAYS, \
&gdc_post_test, \
NULL, \
NULL, \
CFG_POST_BSPEC4 \
}
#define CONFIG_POST_BSPEC5 {\
"SYSMON1 test", \
"sysmon1", \
"This test checks GPIO_62_EPX pin indicating power failure.", \
POST_RAM | POST_MANUAL | POST_NORMAL | POST_SLOWTEST, \
&sysmon1_post_test, \
NULL, \
NULL, \
CFG_POST_BSPEC5 \
}
#define CFG_POST_CACHE_ADDR 0x7fff0000 /* free virtual address */
#define CONFIG_LOGBUFFER
#define CONFIG_ALT_LH_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP1)
#define CONFIG_ALT_LB_ADDR (CFG_OCM_BASE)
#define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
/*-----------------------------------------------------------------------
@ -181,6 +267,7 @@
#define CONFIG_RTC_PCF8563 1 /* enable Philips PCF8563 RTC */
#define CFG_I2C_RTC_ADDR 0x51 /* Philips PCF8563 RTC address */
#define CFG_I2C_KEYBD_ADDR 0x56 /* PIC LWE keyboard */
#define CFG_I2C_DSPIC_IO_ADDR 0x57 /* PIC I/O addr */
#define CONFIG_POST_KEY_MAGIC "3C+3E" /* press F3 + F5 keys to force POST */
#if 0
@ -366,9 +453,6 @@
#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
#define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
/*
* ToDo: Watchdog is not test fully, so exclude it for now
*/
#define CONFIG_HW_WATCHDOG 1 /* Use external HW-Watchdog */
#define CONFIG_WD_PERIOD 40000 /* in usec */
@ -431,10 +515,14 @@
#define CFG_GPIO_PHY1_RST 12
#define CFG_GPIO_FLASH_WP 14
#define CFG_GPIO_PHY0_RST 22
#define CFG_GPIO_DSPIC_READY 51
#define CFG_GPIO_EEPROM_EXT_WP 55
#define CFG_GPIO_HIGHSIDE 56
#define CFG_GPIO_EEPROM_INT_WP 57
#define CFG_GPIO_BOARD_RESET 58
#define CFG_GPIO_LIME_S 59
#define CFG_GPIO_LIME_RST 60
#define CFG_GPIO_SYSMON_STATUS 62
#define CFG_GPIO_WATCHDOG 63
/*-----------------------------------------------------------------------

9
include/post.h
View file

@ -42,12 +42,16 @@
#define POST_REBOOT 0x0800 /* test may cause rebooting */
#define POST_PREREL 0x1000 /* test runs before relocation */
#define POST_CRITICAL 0x2000 /* Use failbootcmd if test failed */
#define POST_MEM (POST_RAM | POST_ROM)
#define POST_ALWAYS (POST_NORMAL | \
POST_SLOWTEST | \
POST_MANUAL | \
POST_POWERON )
#define POST_FAIL_SAVE 0x80
#ifndef __ASSEMBLY__
struct post_test {
@ -93,6 +97,11 @@ extern int post_hotkeys_pressed(void);
#define CFG_POST_CODEC 0x00002000
#define CFG_POST_FPU 0x00004000
#define CFG_POST_ECC 0x00008000
#define CFG_POST_BSPEC1 0x00010000
#define CFG_POST_BSPEC2 0x00020000
#define CFG_POST_BSPEC3 0x00040000
#define CFG_POST_BSPEC4 0x00080000
#define CFG_POST_BSPEC5 0x00100000
#endif /* CONFIG_POST */

5
include/ppc440.h
View file

@ -1431,6 +1431,11 @@
#define SDR0_MFR_PKT_REJ_POL 0x00200000 /* Packet Reject Polarity */
#define GPT0_COMP6 0x00000098
#define GPT0_COMP5 0x00000094
#define GPT0_COMP4 0x00000090
#define GPT0_COMP3 0x0000008C
#define GPT0_COMP2 0x00000088
#define GPT0_COMP1 0x00000084
#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
#define SDR0_USB2D0CR 0x0320

2
include/rtc.h
View file

@ -52,7 +52,7 @@ struct rtc_time {
int tm_isdst;
};
void rtc_get (struct rtc_time *);
int rtc_get (struct rtc_time *);
void rtc_set (struct rtc_time *);
void rtc_reset (void);

4
lib_ppc/board.c
View file

@ -436,10 +436,12 @@ void board_init_f (ulong bootflag)
addr = CFG_SDRAM_BASE + get_effective_memsize();
#ifdef CONFIG_LOGBUFFER
#ifndef CONFIG_ALT_LB_ADDR
/* reserve kernel log buffer */
addr -= (LOGBUFF_RESERVE);
debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
#endif
#endif
#ifdef CONFIG_PRAM
/*
@ -1126,8 +1128,10 @@ void board_init_r (gd_t *id, ulong dest_addr)
pram=0;
#endif
#ifdef CONFIG_LOGBUFFER
#ifndef CONFIG_ALT_LB_ADDR
/* Also take the logbuffer into account (pram is in kB) */
pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
#endif
#endif
sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
setenv ("mem", (char *)memsz);

28
post/board/lwmon5/Makefile Normal file
View file

@ -0,0 +1,28 @@
#
# (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
#
# Developed for DENX Software Engineering GmbH
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
LIB = libpostlwmon5.a
COBJS = sysmon.o watchdog.o dspic.o fpga.o dsp.o gdc.o
include $(TOPDIR)/post/rules.mk

57
post/board/lwmon5/dsp.c Normal file
View file

@ -0,0 +1,57 @@
/*
* (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
*
* Developed for DENX Software Engineering GmbH
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_DSP
#include <asm/io.h>
/* This test verifies DSP status bits in FPGA */
DECLARE_GLOBAL_DATA_PTR;
#define DSP_STATUS_REG 0xC4000008
int dsp_post_test(int flags)
{
uint read_value;
int ret;
ret = 0;
read_value = in_be32((void *)DSP_STATUS_REG) & 0x3;
if (read_value != 0x3) {
post_log("\nDSP status read %08X\n", read_value);
ret = 1;
}
return ret;
}
#endif /* CONFIG_POST & CFG_POST_DSP */
#endif /* CONFIG_POST */

108
post/board/lwmon5/dspic.c Normal file
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/*
* (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
*
* Developed for DENX Software Engineering GmbH
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#ifdef CONFIG_POST
/* There are two tests for dsPIC currently implemented:
* 1. dsPIC ready test. Done in board_early_init_f(). Only result verified here.
* 2. dsPIC POST result test. This test gets dsPIC POST codes and version.
*/
#include <post.h>
#include <i2c.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
#define DSPIC_POST_ERROR_REG 0x800
#define DSPIC_SYS_ERROR_REG 0x802
#define DSPIC_VERSION_REG 0x804
#if CONFIG_POST & CFG_POST_BSPEC1
/* Verify that dsPIC ready test done early at hw init passed ok */
int dspic_init_post_test(int flags)
{
if (in_be32((void *)CFG_DSPIC_TEST_ADDR) & CFG_DSPIC_TEST_MASK) {
post_log("dsPIC init test failed\n");
return 1;
}
return 0;
}
#endif /* CONFIG_POST & CFG_POST_BSPEC1 */
#if CONFIG_POST & CFG_POST_BSPEC2
/* Read a register from the dsPIC. */
int dspic_read(ushort reg)
{
uchar buf[2];
if (i2c_read(CFG_I2C_DSPIC_IO_ADDR, reg, 2, buf, 2))
return -1;
return (uint)((buf[0] << 8) | buf[1]);
}
/* Verify error codes regs, display version */
int dspic_post_test(int flags)
{
int data;
int ret = 0;
post_log("\n");
data = dspic_read(DSPIC_VERSION_REG);
if (data == -1) {
post_log("dsPIC : failed read version\n");
ret = 1;
} else {
post_log("dsPIC version: %u.%u\n",
(data >> 8) & 0xFF, data & 0xFF);
}
data = dspic_read(DSPIC_POST_ERROR_REG);
if (data != 0) ret = 1;
if (data == -1) {
post_log("dsPIC : failed read POST code\n");
} else {
post_log("dsPIC POST code 0x%04X\n", data);
}
data = dspic_read(DSPIC_SYS_ERROR_REG);
if (data == -1) {
post_log("dsPIC : failed read system error\n");
ret = 1;
} else {
post_log("dsPIC SYS-ERROR code: 0x%04X\n", data);
}
return ret;
}
#endif /* CONFIG_POST & CFG_POST_BSPEC2 */
#endif /* CONFIG_POST */

97
post/board/lwmon5/fpga.c Normal file
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@ -0,0 +1,97 @@
/*
* (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
*
* Developed for DENX Software Engineering GmbH
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#ifdef CONFIG_POST
/* This test performs testing of FPGA SCRATCH register,
* gets FPGA version and run get_ram_size() on FPGA memory
*/
#include <post.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
#define FPGA_SCRATCH_REG 0xC4000050
#define FPGA_VERSION_REG 0xC4000040
#define FPGA_RAM_START 0xC4200000
#define FPGA_RAM_END 0xC4203FFF
#define FPGA_STAT 0xC400000C
#if CONFIG_POST & CFG_POST_BSPEC3
static int one_scratch_test(uint value)
{
uint read_value;
int ret = 0;
out_be32((void *)FPGA_SCRATCH_REG, value);
/* read other location (protect against data lines capacity) */
ret = in_be16((void *)FPGA_VERSION_REG);
/* verify test pattern */
read_value = in_be32((void *)FPGA_SCRATCH_REG);
if (read_value != value) {
post_log("FPGA SCRATCH test failed write %08X, read %08X\n",
value, read_value);
ret = 1;
}
return ret;
}
/* Verify FPGA, get version & memory size */
int fpga_post_test(int flags)
{
uint old_value;
ushort version;
uint read_value;
int ret = 0;
post_log("\n");
old_value = in_be32((void *)FPGA_SCRATCH_REG);
if (one_scratch_test(0x55555555))
ret = 1;
if (one_scratch_test(0xAAAAAAAA))
ret = 1;
out_be32((void *)FPGA_SCRATCH_REG, old_value);
version = in_be16((void *)FPGA_VERSION_REG);
post_log("FPGA : version %u.%u\n",
(version >> 8) & 0xFF, version & 0xFF);
/* Enable write to FPGA RAM */
out_be32((void *)FPGA_STAT, in_be32((void *)FPGA_STAT) | 0x1000);
read_value = get_ram_size((void *)CFG_FPGA_BASE_1, 0x4000);
post_log("FPGA RAM size: %d bytes\n", read_value);
return ret;
}
#endif /* CONFIG_POST & CFG_POST_BSPEC3 */
#endif /* CONFIG_POST */

99
post/board/lwmon5/gdc.c Normal file
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@ -0,0 +1,99 @@
/*
* (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
*
* Developed for DENX Software Engineering GmbH
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#ifdef CONFIG_POST
/* This test attempts to verify board GDC. A scratch register tested, then
* simple memory test (get_ram_size()) run over GDC memory.
*/
#include <post.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
#define GDC_SCRATCH_REG 0xC1FF8044
#define GDC_VERSION_REG 0xC1FF8084
#define GDC_RAM_START 0xC0000000
#define GDC_RAM_END 0xC2000000
#if CONFIG_POST & CFG_POST_BSPEC4
static int gdc_test_reg_one(uint value)
{
int ret;
uint read_value;
/* write test pattern */
out_be32((void *)GDC_SCRATCH_REG, value);
/* read other location (protect against data lines capacity) */
ret = in_be32((void *)GDC_RAM_START);
/* verify test pattern */
read_value = in_be32((void *)GDC_SCRATCH_REG);
if (read_value != value) {
post_log("GDC SCRATCH test failed write %08X, read %08X\n",
value, read_value);
}
return (read_value != value);
}
/* Verify GDC, get memory size */
int gdc_post_test(int flags)
{
uint old_value;
int ret = 0;
post_log("\n");
old_value = in_be32((void *)GDC_SCRATCH_REG);
/*
* GPIOC2 register behaviour: the LIME graphics processor has a
* maximum of 5 GPIO ports that can be used in this hardware
* configuration. Thus only the bits for these 5 GPIOs can be
* activated in the GPIOC2 register. All other bits will always be
* read as zero.
*/
if (gdc_test_reg_one(0x00150015))
ret = 1;
if (gdc_test_reg_one(0x000A000A))
ret = 1;
out_be32((void *)GDC_SCRATCH_REG, old_value);
old_value = in_be32((void *)GDC_VERSION_REG);
post_log("GDC chip version %u.%u, year %04X\n",
(old_value >> 8) & 0xFF, old_value & 0xFF,
(old_value >> 16) & 0xFFFF);
old_value = get_ram_size((void *)GDC_RAM_START,
GDC_RAM_END - GDC_RAM_START);
post_log("GDC RAM size: %d bytes\n", old_value);
return ret;
}
#endif /* CONFIG_POST & CFG_POST_BSPEC4 */
#endif /* CONFIG_POST */

248
post/board/lwmon5/sysmon.c Normal file
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@ -0,0 +1,248 @@
/*
* (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
*
* Developed for DENX Software Engineering GmbH
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <post.h>
#include <common.h>
#ifdef CONFIG_POST
/*
* SYSMON test
*
* This test performs the system hardware monitoring.
* The test passes when all the following voltages and temperatures
* are within allowed ranges:
*
* Temperature -40 .. +85 C
* +5V +4.75 .. +5.25 V
* +5V standby +4.75 .. +5.25 V
*
* LCD backlight is not enabled if temperature values are not within
* allowed ranges (-30 .. + 80). The brightness of backlite can be
* controlled by setting "brightness" enviroment variable. Default value is 50%
*
* See the list of all parameters in the sysmon_table below
*/
#include <post.h>
#include <watchdog.h>
#include <i2c.h>
#if defined(CONFIG_VIDEO)
#include <mb862xx.h>
#endif
#if CONFIG_POST & CFG_POST_SYSMON
DECLARE_GLOBAL_DATA_PTR;
/* from dspic.c */
extern int dspic_read(ushort reg);
#define RELOC(x) if (x != NULL) x = (void *) ((ulong) (x) + gd->reloc_off)
typedef struct sysmon_s sysmon_t;
typedef struct sysmon_table_s sysmon_table_t;
static void sysmon_dspic_init (sysmon_t * this);
static int sysmon_dspic_read (sysmon_t * this, uint addr);
static void sysmon_backlight_disable (sysmon_table_t * this);
struct sysmon_s
{
uchar chip;
void (*init)(sysmon_t *);
int (*read)(sysmon_t *, uint);
};
static sysmon_t sysmon_dspic =
{CFG_I2C_DSPIC_IO_ADDR, sysmon_dspic_init, sysmon_dspic_read};
static sysmon_t * sysmon_list[] =
{
&sysmon_dspic,
NULL
};
struct sysmon_table_s
{
char * name;
char * unit_name;
sysmon_t * sysmon;
void (*exec_before)(sysmon_table_t *);
void (*exec_after)(sysmon_table_t *);
int unit_precision;
int unit_div;
int unit_min;
int unit_max;
uint val_mask;
uint val_min;
uint val_max;
int val_valid;
uint val_min_alt;
uint val_max_alt;
int val_valid_alt;
uint addr;
};
static sysmon_table_t sysmon_table[] =
{
{"Temperature", " C", &sysmon_dspic, NULL, sysmon_backlight_disable,
1, 1, -32768, 32767, 0xFFFF, 0x8000-40, 0x8000+85, 0,
0x8000-30, 0x8000+80, 0, 0x12BC},
{"+ 5 V", "V", &sysmon_dspic, NULL, NULL,
100, 1000, -0x8000, 0x7FFF, 0xFFFF, 0x8000+4750, 0x8000+5250, 0,
0x8000+4750, 0x8000+5250, 0, 0x12CA},
{"+ 5 V standby", "V", &sysmon_dspic, NULL, NULL,
100, 1000, -0x8000, 0x7FFF, 0xFFFF, 0x8000+4750, 0x8000+5250, 0,
0x8000+4750, 0x8000+5250, 0, 0x12C6},
};
static int sysmon_table_size = sizeof(sysmon_table) / sizeof(sysmon_table[0]);
int sysmon_init_f (void)
{
sysmon_t ** l;
for (l = sysmon_list; *l; l++)
(*l)->init(*l);
return 0;
}
void sysmon_reloc (void)
{
sysmon_t ** l;
sysmon_table_t * t;
for (l = sysmon_list; *l; l++) {
RELOC(*l);
RELOC((*l)->init);
RELOC((*l)->read);
}
for (t = sysmon_table; t < sysmon_table + sysmon_table_size; t ++) {
RELOC(t->exec_before);
RELOC(t->exec_after);
RELOC(t->sysmon);
}
}
static char *sysmon_unit_value (sysmon_table_t *s, uint val)
{
static char buf[32];
char *p, sign;
int decimal, frac;
int unit_val;
unit_val =
s->unit_min + (s->unit_max - s->unit_min) * val / s->val_mask;
if (val == -1)
return "I/O ERROR";
if (unit_val < 0) {
sign = '-';
unit_val = -unit_val;
} else
sign = '+';
p = buf + sprintf(buf, "%c%2d", sign, unit_val / s->unit_div);
frac = unit_val % s->unit_div;
frac /= (s->unit_div / s->unit_precision);
decimal = s->unit_precision;
if (decimal != 1)
*p++ = '.';
for (decimal /= 10; decimal != 0; decimal /= 10)
*p++ = '0' + (frac / decimal) % 10;
strcpy(p, s->unit_name);
return buf;
}
static void sysmon_dspic_init (sysmon_t * this)
{
}
static int sysmon_dspic_read (sysmon_t * this, uint addr)
{
int res = dspic_read(addr);
/* To fit into the table range we should add 0x8000 */
return (res == -1) ? -1 : (res + 0x8000);
}
static void sysmon_backlight_disable (sysmon_table_t * this)
{
#if defined(CONFIG_VIDEO)
board_backlight_switch(this->val_valid_alt);
#endif
}
int sysmon_post_test (int flags)
{
int res = 0;
sysmon_table_t * t;
int val;
for (t = sysmon_table; t < sysmon_table + sysmon_table_size; t ++) {
if (t->exec_before)
t->exec_before(t);
val = t->sysmon->read(t->sysmon, t->addr);
if (val != -1) {
t->val_valid = val >= t->val_min && val <= t->val_max;
t->val_valid_alt = val >= t->val_min_alt && val <= t->val_max_alt;
} else {
t->val_valid = 0;
t->val_valid_alt = 0;
}
if (t->exec_after)
t->exec_after(t);
if ((!t->val_valid) || (flags & POST_MANUAL)) {
printf("%-17s = %-10s ", t->name, sysmon_unit_value(t, val));
printf("allowed range");
printf(" %-8s ..", sysmon_unit_value(t, t->val_min));
printf(" %-8s", sysmon_unit_value(t, t->val_max));
printf(" %s\n", t->val_valid ? "OK" : "FAIL");
}
if (!t->val_valid)
res = 1;
}
return res;
}
#endif /* CONFIG_POST & CFG_POST_SYSMON */
#endif /* CONFIG_POST */

136
post/board/lwmon5/watchdog.c Normal file
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@ -0,0 +1,136 @@
/*
* (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
*
* Developed for DENX Software Engineering GmbH
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* This test verifies if the reason of last reset was an abnormal voltage
* condition, than it performs watchdog test, measuing time required to
* trigger watchdog reset.
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_WATCHDOG
#include <watchdog.h>
#include <asm/gpio.h>
#include <asm/io.h>
static uint watchdog_magic_read(void)
{
return in_be32((void *)CFG_WATCHDOG_FLAGS_ADDR) &
CFG_WATCHDOG_MAGIC_MASK;
}
static void watchdog_magic_write(uint value)
{
out_be32((void *)CFG_WATCHDOG_FLAGS_ADDR, value |
(in_be32((void *)CFG_WATCHDOG_FLAGS_ADDR) &
~CFG_WATCHDOG_MAGIC_MASK));
}
int sysmon1_post_test(int flags)
{
if (gpio_read_in_bit(CFG_GPIO_SYSMON_STATUS)) {
/*
* 3.1. GPIO62 is low
* Assuming system voltage failure.
*/
post_log("Abnormal voltage detected (GPIO62)\n");
return 1;
}
return 0;
}
int lwmon5_watchdog_post_test(int flags)
{
ulong time;
/* On each reset scratch register 1 should be tested,
* but first test GPIO62:
*/
if (!(flags & POST_MANUAL) && sysmon1_post_test(flags)) {
/*
* 3.1. GPIO62 is low
* Assuming system voltage failure.
*/
/* 3.1.1. Set scratch register 1 to 0x0000xxxx */
watchdog_magic_write(0);
/* 3.1.2. Mark test as failed due to voltage?! */
return 1;
}
if (watchdog_magic_read() != CFG_WATCHDOG_MAGIC) {
/*
* 3.2. Scratch register 1 differs from magic value 0x1248xxxx
* Assuming PowerOn
*/
int ints;
ulong base;
/* 3.2.1. Set magic value to scratch register */
watchdog_magic_write(CFG_WATCHDOG_MAGIC);
ints = disable_interrupts ();
/* 3.2.2. strobe watchdog once */
WATCHDOG_RESET();
out_be32((void *)CFG_WATCHDOG_TIME_ADDR, 0);
/* 3.2.3. save time of strobe in scratch register 2 */
base = post_time_ms (0);
/* 3.2.4. Wait for 150 ms (enough for reset to happen) */
while ((time = post_time_ms (base)) < 150)
out_be32((void *)CFG_WATCHDOG_TIME_ADDR, time);
if (ints)
enable_interrupts ();
/*
* 3.2.5. Reset didn't happen. - Set 0x0000xxxx
* into scratch register 1
*/
watchdog_magic_write(0);
/* 3.2.6. Mark test as failed. */
post_log("hw watchdog time : %u ms, failed ", time);
return 2;
}
/*
* 3.3. Scratch register matches magic value 0x1248xxxx
* Assume this is watchdog-initiated reset
*/
/* 3.3.1. So, the test succeed, save measured time to syslog. */
time = in_be32((void *)CFG_WATCHDOG_TIME_ADDR);
post_log("hw watchdog time : %u ms, passed ", time);
/* 3.3.2. Set scratch register 1 to 0x0000xxxx */
watchdog_magic_write(0);
return 0;
}
#endif /* CONFIG_POST & CFG_POST_WATCHDOG */
#endif /* CONFIG_POST */

15
post/drivers/rtc.c
View file

@ -28,6 +28,8 @@
*
* The Real Time Clock (RTC) operation is verified by this test.
* The following features are verified:
* o) RTC Power Fault
* This is verified by analyzing the rtc_get() return status.
* o) Time uniformity
* This is verified by reading RTC in polling within
* a short period of time.
@ -96,6 +98,10 @@ int rtc_post_test (int flags)
unsigned int ynl = 1999;
unsigned int yl = 2000;
unsigned int skipped = 0;
int reliable;
/* Time reliability */
reliable = rtc_get (&svtm);
/* Time uniformity */
if (rtc_post_skip (&diff) != 0) {
@ -176,6 +182,15 @@ int rtc_post_test (int flags)
}
rtc_post_restore (&svtm, skipped);
/* If come here, then RTC operates correcty, check the correctness
* of the time it reports.
*/
if (reliable < 0) {
post_log ("RTC Time is not reliable! Power fault? \n");
return -1;
}
return 0;
}

18
post/post.c
View file

@ -157,8 +157,10 @@ static void post_bootmode_test_off (void)
static void post_get_flags (int *test_flags)
{
int flag[] = { POST_POWERON, POST_NORMAL, POST_SLOWTEST };
char *var[] = { "post_poweron", "post_normal", "post_slowtest" };
int flag[] = { POST_POWERON, POST_NORMAL, POST_SLOWTEST,
POST_CRITICAL };
char *var[] = { "post_poweron", "post_normal", "post_slowtest",
"post_critical" };
int varnum = sizeof (var) / sizeof (var[0]);
char list[128]; /* long enough for POST list */
char *name;
@ -224,7 +226,9 @@ static int post_run_single (struct post_test *test,
if (!(flags & POST_REBOOT)) {
if ((test_flags & POST_REBOOT) && !(flags & POST_MANUAL)) {
post_bootmode_test_on (i);
post_bootmode_test_on (
(gd->flags & GD_FLG_POSTFAIL) ?
POST_FAIL_SAVE | i : i);
}
if (test_flags & POST_PREREL)
@ -236,10 +240,14 @@ static int post_run_single (struct post_test *test,
if (test_flags & POST_PREREL) {
if ((*test->test) (flags) == 0)
post_log_mark_succ ( test->testid );
else if (test_flags & POST_CRITICAL)
gd->flags |= GD_FLG_POSTFAIL;
} else {
if ((*test->test) (flags) != 0) {
post_log ("FAILED\n");
show_boot_progress (-32);
if (test_flags & POST_CRITICAL)
gd->flags |= GD_FLG_POSTFAIL;
}
else
post_log ("PASSED\n");
@ -266,6 +274,10 @@ int post_run (char *name, int flags)
unsigned int last;
if (post_bootmode_get (&last) & POST_POWERTEST) {
if (last & POST_FAIL_SAVE) {
last &= ~POST_FAIL_SAVE;
gd->flags |= GD_FLG_POSTFAIL;
}
if (last < post_list_size &&
(flags & test_flags[last] & POST_ALWAYS) &&
(flags & test_flags[last] & POST_MEM)) {

28
post/tests.c
View file

@ -48,6 +48,13 @@ extern int dsp_post_test (int flags);
extern int codec_post_test (int flags);
extern int ecc_post_test (int flags);
extern int dspic_init_post_test (int flags);
extern int dspic_post_test (int flags);
extern int gdc_post_test (int flags);
extern int fpga_post_test (int flags);
extern int lwmon5_watchdog_post_test(int flags);
extern int sysmon1_post_test(int flags);
extern int sysmon_init_f (void);
extern void sysmon_reloc (void);
@ -68,6 +75,9 @@ struct post_test post_list[] =
},
#endif
#if CONFIG_POST & CFG_POST_WATCHDOG
#if defined(CONFIG_POST_WATCHDOG)
CONFIG_POST_WATCHDOG,
#else
{
"Watchdog timer test",
"watchdog",
@ -79,6 +89,7 @@ struct post_test post_list[] =
CFG_POST_WATCHDOG
},
#endif
#endif
#if CONFIG_POST & CFG_POST_I2C
{
"I2C test",
@ -225,7 +236,7 @@ struct post_test post_list[] =
CFG_POST_DSP
},
#endif
#if CONFIG_POST & CFG_POST_DSP
#if CONFIG_POST & CFG_POST_CODEC
{
"CODEC test",
"codec",
@ -249,6 +260,21 @@ struct post_test post_list[] =
CFG_POST_ECC
},
#endif
#if CONFIG_POST & CFG_POST_BSPEC1
CONFIG_POST_BSPEC1,
#endif
#if CONFIG_POST & CFG_POST_BSPEC2
CONFIG_POST_BSPEC2,
#endif
#if CONFIG_POST & CFG_POST_BSPEC3
CONFIG_POST_BSPEC3,
#endif
#if CONFIG_POST & CFG_POST_BSPEC4
CONFIG_POST_BSPEC4,
#endif
#if CONFIG_POST & CFG_POST_BSPEC4
CONFIG_POST_BSPEC5,
#endif
};
unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test);