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usb: ci_udc: complete ep0 direction handling
handle_setup() currently assumes that the response to a Setup transaction will be an OUT transaction, and any subsequent packet (if any) will be an IN transaction. This appears to be valid in many cases; both USB enumeration and Mass Storage work OK with this restriction. However, DFU uses ep0 to transfer data in both directions. This renders the assumption invalid; when sending data from device to host, the Data Stage is an IN transaction, and the Status Stage is an OUT transaction. Enhance handle_setup() to deduce the correct direction for the USB transactions based on Setup transaction data. ep0's request object only needs to be automatically re-queued when the Data Stage completes, in order to implement the Status Stage. Once the Status Stage transaction is complete, there is no need to re-queue the USB request, so don't do that. Don't sent USB request completion callbacks for Status Stage transactions. These were queued by ci_udc itself, and only serve to confuse the USB function code. For example, f_dfu attempts to interpret the 0-length data buffers for Status Stage transactions as DFU packets. These buffers contain stale data from the previous transaction. This causes f_dfu to complain about a sequence number mismatch. Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
parent
a2d8f92985
commit
006c702688
2 changed files with 42 additions and 7 deletions
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@ -428,6 +428,17 @@ static int ci_ep_queue(struct usb_ep *ep,
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return 0;
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}
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static void flip_ep0_direction(void)
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{
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if (ep0_desc.bEndpointAddress == USB_DIR_IN) {
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DBG("%s: Flipping ep0 ot OUT\n", __func__);
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ep0_desc.bEndpointAddress = 0;
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} else {
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DBG("%s: Flipping ep0 ot IN\n", __func__);
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ep0_desc.bEndpointAddress = USB_DIR_IN;
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}
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}
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static void handle_ep_complete(struct ci_ep *ep)
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{
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struct ept_queue_item *item;
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@ -436,8 +447,6 @@ static void handle_ep_complete(struct ci_ep *ep)
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num = ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
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in = (ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
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if (num == 0)
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ep0_desc.bEndpointAddress = 0;
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item = ci_get_qtd(num, in);
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ci_invalidate_qtd(num);
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@ -458,11 +467,18 @@ static void handle_ep_complete(struct ci_ep *ep)
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DBG("ept%d %s req %p, complete %x\n",
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num, in ? "in" : "out", ci_req, len);
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ci_req->req.complete(&ep->ep, &ci_req->req);
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if (num == 0) {
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if (num != 0 || controller.ep0_data_phase)
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ci_req->req.complete(&ep->ep, &ci_req->req);
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if (num == 0 && controller.ep0_data_phase) {
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/*
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* Data Stage is complete, so flip ep0 dir for Status Stage,
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* which always transfers a packet in the opposite direction.
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*/
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DBG("%s: flip ep0 dir for Status Stage\n", __func__);
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flip_ep0_direction();
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controller.ep0_data_phase = false;
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ci_req->req.length = 0;
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usb_ep_queue(&ep->ep, &ci_req->req, 0);
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ep0_desc.bEndpointAddress = USB_DIR_IN;
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}
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}
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@ -491,8 +507,26 @@ static void handle_setup(void)
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#else
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writel(EPT_RX(0), &udc->epstat);
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#endif
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DBG("handle setup %s, %x, %x index %x value %x\n", reqname(r.bRequest),
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r.bRequestType, r.bRequest, r.wIndex, r.wValue);
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DBG("handle setup %s, %x, %x index %x value %x length %x\n",
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reqname(r.bRequest), r.bRequestType, r.bRequest, r.wIndex,
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r.wValue, r.wLength);
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/* Set EP0 dir for Data Stage based on Setup Stage data */
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if (r.bRequestType & USB_DIR_IN) {
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DBG("%s: Set ep0 to IN for Data Stage\n", __func__);
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ep0_desc.bEndpointAddress = USB_DIR_IN;
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} else {
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DBG("%s: Set ep0 to OUT for Data Stage\n", __func__);
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ep0_desc.bEndpointAddress = 0;
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}
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if (r.wLength) {
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controller.ep0_data_phase = true;
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} else {
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/* 0 length -> no Data Stage. Flip dir for Status Stage */
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DBG("%s: 0 length: flip ep0 dir for Status Stage\n", __func__);
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flip_ep0_direction();
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controller.ep0_data_phase = false;
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}
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list_del_init(&ci_req->queue);
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ci_ep->req_primed = false;
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@ -98,6 +98,7 @@ struct ci_ep {
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struct ci_drv {
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struct usb_gadget gadget;
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struct ci_req *ep0_req;
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bool ep0_data_phase;
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struct usb_gadget_driver *driver;
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struct ehci_ctrl *ctrl;
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struct ept_queue_head *epts;
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