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board: bsh: imx8mn_bsh_smm_s2/s2pro: enable DM_SERIAL
Enable DM_SERIAL for both U_Boot and the SPL. The uart4 and its pinmux are already marked with u-boot,dm-spl but we need to move the call to preloader_console_init() after spl_init() to avoid a board hang as dm can't be used until after spl_init(). Remove the manual config of the UART pinmux now that it is no longer needed. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Cc: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@denx.de> Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
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6a21c69521
commit
0016e62813
3 changed files with 4 additions and 9 deletions
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@ -40,14 +40,8 @@ void spl_board_init(void)
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puts("Failed to find clock node. Check device tree\n");
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puts("Failed to find clock node. Check device tree\n");
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}
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}
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#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
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#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
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#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
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static const iomux_v3_cfg_t uart_pads[] = {
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IMX8MN_PAD_UART4_RXD__UART4_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
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IMX8MN_PAD_UART4_TXD__UART4_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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static const iomux_v3_cfg_t wdog_pads[] = {
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static const iomux_v3_cfg_t wdog_pads[] = {
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IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
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IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
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};
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};
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@ -59,7 +53,6 @@ int board_early_init_f(void)
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imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
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imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
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set_wdog_reset(wdog);
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set_wdog_reset(wdog);
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imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
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init_uart_clk(3);
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init_uart_clk(3);
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if (IS_ENABLED(CONFIG_NAND_MXS)) {
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if (IS_ENABLED(CONFIG_NAND_MXS)) {
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@ -82,14 +75,14 @@ void board_init_f(ulong dummy)
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timer_init();
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timer_init();
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preloader_console_init();
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ret = spl_init();
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ret = spl_init();
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if (ret) {
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if (ret) {
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debug("spl_init() failed: %d\n", ret);
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debug("spl_init() failed: %d\n", ret);
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hang();
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hang();
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}
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}
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preloader_console_init();
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/* DDR initialization */
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/* DDR initialization */
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spl_dram_init();
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spl_dram_init();
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@ -80,6 +80,7 @@ CONFIG_SPL_DM_PMIC_BD71837=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_DM_SERIAL=y
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CONFIG_MXC_UART=y
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CONFIG_MXC_UART=y
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CONFIG_SYSRESET=y
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CONFIG_SYSRESET=y
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CONFIG_SYSRESET_PSCI=y
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CONFIG_SYSRESET_PSCI=y
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@ -77,6 +77,7 @@ CONFIG_SPL_DM_PMIC_BD71837=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_DM_SERIAL=y
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CONFIG_MXC_UART=y
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CONFIG_MXC_UART=y
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CONFIG_SYSRESET=y
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CONFIG_SYSRESET=y
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CONFIG_SYSRESET_PSCI=y
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CONFIG_SYSRESET_PSCI=y
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