2018-05-06 21:58:06 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0+
|
2018-01-05 10:46:15 +00:00
|
|
|
/*
|
|
|
|
* dts file for Xilinx ZynqMP Mini Configuration
|
|
|
|
*
|
|
|
|
* (C) Copyright 2018, Xilinx, Inc.
|
|
|
|
*
|
2023-09-22 10:35:35 +00:00
|
|
|
* Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>
|
2023-07-10 12:35:49 +00:00
|
|
|
* Michal Simek <michal.simek@amd.com>
|
2018-01-05 10:46:15 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
/dts-v1/;
|
|
|
|
|
|
|
|
/ {
|
|
|
|
model = "ZynqMP MINI NAND";
|
|
|
|
compatible = "xlnx,zynqmp";
|
|
|
|
#address-cells = <2>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
|
|
|
aliases {
|
|
|
|
serial0 = &dcc;
|
|
|
|
};
|
|
|
|
|
|
|
|
chosen {
|
|
|
|
stdout-path = "serial0:115200n8";
|
|
|
|
};
|
|
|
|
|
|
|
|
memory@0 {
|
|
|
|
device_type = "memory";
|
|
|
|
reg = <0x0 0x0 0x40000000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
dcc: dcc {
|
|
|
|
compatible = "arm,dcc";
|
|
|
|
status = "disabled";
|
2023-02-13 15:56:33 +00:00
|
|
|
bootph-all;
|
2018-01-05 10:46:15 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
amba: amba {
|
|
|
|
compatible = "simple-bus";
|
|
|
|
#address-cells = <2>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
ranges;
|
|
|
|
|
|
|
|
nand0: nand@ff100000 {
|
|
|
|
compatible = "arasan,nfc-v3p10";
|
|
|
|
status = "okay";
|
|
|
|
reg = <0x0 0xff100000 0x1000>;
|
|
|
|
clock-names = "clk_sys", "clk_flash";
|
|
|
|
#address-cells = <2>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
arasan,has-mdma;
|
|
|
|
num-cs = <2>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&dcc {
|
|
|
|
status = "okay";
|
|
|
|
};
|