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u-boot/arch/arm/dts/rk3288-veyron-chromebook.dtsi

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
// SPDX-License-Identifier: GPL-2.0
rockchip: Add basic support for jerry This builds and displays an SPL message, but does not function beyond that. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-30 22:55:42 +00:00
/*
* Google Veyron (and derivatives) board device tree source
*
* Copyright 2014 Google, Inc
*/
#include <dt-bindings/clock/rockchip,rk808.h>
#include <dt-bindings/input/input.h>
#include "rk3288-veyron.dtsi"
/ {
aliases {
i2c20 = &i2c_tunnel;
rockchip: video: Check for device in use Check whether a display device is in use before using it. Add a comment as to why two displays cannot currently be used at the same time. This allows us to remove the device-tree change that disables vopb on jerry. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-13 21:22:08 +00:00
video0 = &vopl;
video1 = &vopb;
rockchip: Add basic support for jerry This builds and displays an SPL message, but does not function beyond that. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-30 22:55:42 +00:00
};
gpio_keys: gpio-keys {
pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
lid {
label = "Lid";
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
linux,code = <0>; /* SW_LID */
linux,input-type = <5>; /* EV_SW */
debounce-interval = <1>;
gpio-key,wakeup;
};
};
gpio-charger {
compatible = "gpio-charger";
gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&ac_present_ap>;
charger-type = "mains";
};
/* A non-regulated voltage from power supply or battery */
vccsys: vccsys {
compatible = "regulator-fixed";
regulator-name = "vccsys";
regulator-boot-on;
regulator-always-on;
};
vcc33_sys: vcc33-sys {
vin-supply = <&vccsys>;
};
vcc_5v: vcc-5v {
vin-supply = <&vccsys>;
};
/* This turns on vbus for host1 (dwc2) */
vcc5_host1: vcc5-host1-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host1_pwr_en>;
regulator-name = "vcc5_host1";
regulator-always-on;
regulator-boot-on;
};
/* This turns on vbus for otg for host mode (dwc2) */
vcc5v_otg: vcc5v-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usbotg_pwren_h>;
regulator-name = "vcc5_host2";
regulator-always-on;
regulator-boot-on;
};
};
&rk808 {
regulators {
vcc33_ccd: LDO_REG8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc33_ccd";
regulator-suspend-mem-disabled;
};
};
};
&spi0 {
status = "okay";
rockchip: jerry: Enable the Chrome OS EC Turn on the EC and enable the keyboard. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22 02:44:13 +00:00
spi-activate-delay = <100>;
spi-max-frequency = <3000000>;
spi-deactivate-delay = <200>;
rockchip: Add basic support for jerry This builds and displays an SPL message, but does not function beyond that. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-30 22:55:42 +00:00
cros_ec: ec@0 {
compatible = "google,cros-ec-spi";
spi-max-frequency = <3000000>;
interrupt-parent = <&gpio7>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
rockchip: jerry: Enable the Chrome OS EC Turn on the EC and enable the keyboard. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22 02:44:13 +00:00
ec-interrupt = <&gpio7 7 GPIO_ACTIVE_LOW>;
rockchip: Add basic support for jerry This builds and displays an SPL message, but does not function beyond that. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-30 22:55:42 +00:00
pinctrl-names = "default";
pinctrl-0 = <&ec_int>;
reg = <0>;
google,cros-ec-spi-pre-delay = <30>;
i2c_tunnel: i2c-tunnel {
compatible = "google,cros-ec-i2c-tunnel";
google,remote-bus = <0>;
#address-cells = <1>;
#size-cells = <0>;
};
};
};
&i2c4 {
trackpad@15 {
compatible = "elan,i2c_touchpad";
interrupt-parent = <&gpio7>;
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&trackpad_int>;
reg = <0x15>;
vcc-supply = <&vcc33_io>;
wakeup-source;
};
};
&pinctrl {
pinctrl-0 = <
/* Common for sleep and wake, but no owners */
&ddr0_retention
&ddrio_pwroff
&global_pwroff
/* Wake only */
&suspend_l_wake
&bt_dev_wake_awake
>;
pinctrl-1 = <
/* Common for sleep and wake, but no owners */
&ddr0_retention
&ddrio_pwroff
&global_pwroff
/* Sleep only */
&suspend_l_sleep
&bt_dev_wake_sleep
>;
buttons {
ap_lid_int_l: ap-lid-int-l {
rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
charger {
ac_present_ap: ac-present-ap {
rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
cros-ec {
ec_int: ec-int {
rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdmmc {
sdmmc_wp_gpio: sdmmc-wp-gpio {
rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
suspend {
suspend_l_wake: suspend-l-wake {
rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_low>;
};
suspend_l_sleep: suspend-l-sleep {
rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_high>;
};
};
trackpad {
trackpad_int: trackpad-int {
rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb-host {
host1_pwr_en: host1-pwr-en {
rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
};
usbotg_pwren_h: usbotg-pwren-h {
rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
#include "cros-ec-keyboard.dtsi"
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