Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-14 00:47:26 +00:00
Code Issues Projects Releases Packages Wiki Activity
u-boot/configs/cherryhill_defconfig

41 lines
881 B
Text
Raw Normal View History

x86: Support Intel Cherry Hill board This adds support to Intel Cherry Hill board, a board based on Intel Braswell SoC. The following devices are validated: - serial port as the serial console - on-board Realtek 8169 ethernet controller - SATA AHCI controller - EMMC/SDHC controller - USB 3.0 xHCI controller - PCIe x1 slot with a graphics card - ICH SPI controller with an 8MB Macronix SPI flash - Integrated graphics device as the video console Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-16 05:42:02 +00:00
CONFIG_X86=y
configs: Migrate CONFIG_SYS_TEXT_BASE On the NIOS2 and Xtensa architectures, we do not have CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current values into the defconfig and removing them from the headers. I did not attempt to add more default values in and for now will leave that to maintainers. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-03 17:10:38 +00:00
CONFIG_SYS_TEXT_BASE=0xFFE00000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-29 19:54:04 +00:00
CONFIG_NR_DRAM_BANKS=8
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-04 15:57:37 +00:00
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
x86: Support Intel Cherry Hill board This adds support to Intel Cherry Hill board, a board based on Intel Braswell SoC. The following devices are validated: - serial port as the serial console - on-board Realtek 8169 ethernet controller - SATA AHCI controller - EMMC/SDHC controller - USB 3.0 xHCI controller - PCIe x1 slot with a graphics card - ICH SPI controller with an 8MB Macronix SPI flash - Integrated graphics device as the video console Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-16 05:42:02 +00:00
CONFIG_VENDOR_INTEL=y
CONFIG_TARGET_CHERRYHILL=y
CONFIG_DEBUG_UART=y
CONFIG_SMP=y
CONFIG_GENERATE_MP_TABLE=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
treewide: Migrate CONFIG_DISPLAY_BOARDINFO_LATE to Kconfig Migrate the CONFIG_DISPLAY_BOARDINFO_LATE option to Kconfig. Signed-off-by: Mario Six <mario.six@gdsys.cc> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-28 12:38:17 +00:00
CONFIG_DISPLAY_BOARDINFO_LATE=y
treewide: Migrate CONFIG_LAST_STAGE_INIT to Kconfig Migrate the CONFIG_LAST_STAGE_INIT option to Kconfig. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-03-28 12:38:16 +00:00
CONFIG_LAST_STAGE_INIT=y
x86: Support Intel Cherry Hill board This adds support to Intel Cherry Hill board, a board based on Intel Braswell SoC. The following devices are validated: - serial port as the serial console - on-board Realtek 8169 ethernet controller - SATA AHCI controller - EMMC/SDHC controller - USB 3.0 xHCI controller - PCIe x1 slot with a graphics card - ICH SPI controller with an 8MB Macronix SPI flash - Integrated graphics device as the video console Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-16 05:42:02 +00:00
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-03 19:26:12 +00:00
CONFIG_DEFAULT_DEVICE_TREE="cherryhill"
x86: Support Intel Cherry Hill board This adds support to Intel Cherry Hill board, a board based on Intel Braswell SoC. The following devices are validated: - serial port as the serial console - on-board Realtek 8169 ethernet controller - SATA AHCI controller - EMMC/SDHC controller - USB 3.0 xHCI controller - PCIe x1 slot with a graphics card - ICH SPI controller with an 8MB Macronix SPI flash - Integrated graphics device as the video console Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-16 05:42:02 +00:00
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_RTL8169=y
Convert CONFIG_SPI to Kconfig This converts the following to Kconfig: CONFIG_SPI This partly involves updating code that assumes that CONFIG_SPI implies things that are specific to the MPC8xx SPI driver. For now, just update the CONFIG tests. This also involves reworking the default for CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a reasonable default, as it does not cause any compile failures. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-15 17:51:26 +00:00
CONFIG_SPI=y
x86: Support Intel Cherry Hill board This adds support to Intel Cherry Hill board, a board based on Intel Braswell SoC. The following devices are validated: - serial port as the serial console - on-board Realtek 8169 ethernet controller - SATA AHCI controller - EMMC/SDHC controller - USB 3.0 xHCI controller - PCIe x1 slot with a graphics card - ICH SPI controller with an 8MB Macronix SPI flash - Integrated graphics device as the video console Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-16 05:42:02 +00:00
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
Reference in a new issue Copy permalink