2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2009-10-26 08:55:40 +00:00
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/*
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* Copyright 2009, Matthias Fuchs <matthias.fuchs@esd.eu>
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*
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* SJA1000 register layout for basic CAN mode
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*/
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#ifndef _SJA1000_H_
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#define _SJA1000_H_
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/*
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* SJA1000 register layout in basic can mode
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*/
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struct sja1000_basic_s {
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u8 cr;
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u8 cmr;
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u8 sr;
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u8 ir;
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u8 ac;
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u8 am;
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u8 btr0;
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u8 btr1;
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u8 oc;
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u8 txb[10];
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u8 rxb[10];
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u8 unused;
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u8 cdr;
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};
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/* control register */
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#define CR_RR 0x01
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/* output control register */
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#define OC_MODE0 0x01
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#define OC_MODE1 0x02
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#define OC_POL0 0x04
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#define OC_TN0 0x08
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#define OC_TP0 0x10
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#define OC_POL1 0x20
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#define OC_TN1 0x40
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#define OC_TP1 0x80
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#endif
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