mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-14 23:33:00 +00:00
64 lines
1.2 KiB
Text
64 lines
1.2 KiB
Text
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// SPDX-License-Identifier: GPL-2.0 OR MIT
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/*
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* Copyright (C) 2017 exceet electronics GmbH
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* Copyright (C) 2018 Kontron Electronics GmbH
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*/
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#if defined(CONFIG_FIT)
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/ {
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binman: binman {
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filename = "flash.bin";
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pad-byte = <0x00>;
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spl: blob-ext@1 {
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offset = <0x0>;
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filename = "SPL";
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};
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uboot: blob-ext@2 {
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offset = <0x11000>;
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filename = "u-boot.img";
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};
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};
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};
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#endif /* CONFIG_FIT */
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/*
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* To make the PHYs work, we need to set the reset pin once. Afterwards
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* in Linux we can't assign the shared reset GPIO to the PHYs, as this
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* would cause Linux to reset both PHYs every time one of them gets
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* reinitialized.
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*
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* Also we disable the second ethernet as it currently doesn't work with
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* the devicetree setup in U-Boot.
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*/
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet1 &pinctrl_enet1_mdio>;
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phy-mode = "rmii";
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phy-handle = <ðphy1>;
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phy-reset-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy1: ethernet-phy@1 {
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reg = <1>;
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micrel,led-mode = <0>;
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clocks = <&clks IMX6UL_CLK_ENET_REF>;
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clock-names = "rmii-ref";
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};
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};
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};
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&fec2 {
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status = "disabled";
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/delete-property/ phy-handle;
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/delete-node/ mdio;
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};
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