2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2004-02-12 00:47:09 +00:00
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/*
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* Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
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* Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
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*/
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2010-10-26 12:34:52 +00:00
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#include <asm-offsets.h>
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2004-02-12 00:47:09 +00:00
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#include <config.h>
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2010-03-12 04:12:53 +00:00
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#include <asm/cache.h>
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2004-02-12 00:47:09 +00:00
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#define _START _start
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#define _FAULT _fault
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#define SAVE_ALL \
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move.w #0x2700,%sr; /* disable intrs */ \
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subl #60,%sp; /* space for 15 regs */ \
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moveml %d0-%d7/%a0-%a6,%sp@; \
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#define RESTORE_ALL \
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moveml %sp@,%d0-%d7/%a0-%a6; \
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addl #60,%sp; /* space for 15 regs */ \
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rte
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/* If we come from a pre-loader we don't need an initial exception
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* table.
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*/
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#if !defined(CONFIG_MONITOR_IS_IN_RAM)
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.text
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2016-05-21 22:14:29 +00:00
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2004-02-12 00:47:09 +00:00
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/*
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2016-05-21 22:14:29 +00:00
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* Vector table. This is used for initial platform startup.
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* These vectors are to catch any un-intended traps.
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2004-02-12 00:47:09 +00:00
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*/
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_vectors:
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2006-06-10 17:27:47 +00:00
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.long 0x00000000 /* Flash offset is 0 until we setup CS0 */
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2022-11-16 18:10:41 +00:00
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#if defined(CONFIG_M5282) && (CONFIG_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
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2022-10-21 00:22:39 +00:00
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.long _start - CONFIG_TEXT_BASE
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2006-01-26 22:35:56 +00:00
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#else
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2006-06-10 17:27:47 +00:00
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.long _START
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2006-01-26 22:35:56 +00:00
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#endif
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2006-06-10 17:27:47 +00:00
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2004-02-12 00:47:09 +00:00
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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#endif
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2016-05-21 22:14:29 +00:00
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.text
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2006-04-20 06:42:42 +00:00
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2022-11-16 18:10:41 +00:00
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#if defined(CFG_SYS_INT_FLASH_BASE) && \
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2006-04-20 06:42:42 +00:00
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(defined(CONFIG_M5282) || defined(CONFIG_M5281))
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2022-11-16 18:10:41 +00:00
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#if (CONFIG_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
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2016-05-21 22:14:29 +00:00
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.long 0x55AA55AA,0xAA55AA55 /* CFM Backdoorkey */
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.long 0xFFFFFFFF /* all sectors protected */
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.long 0x00000000 /* supervisor/User restriction */
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.long 0x00000000 /* programm/data space restriction */
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.long 0x00000000 /* Flash security */
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2006-04-20 06:42:42 +00:00
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#endif
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2016-05-21 22:14:29 +00:00
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#endif
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.globl _start
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2004-02-12 00:47:09 +00:00
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_start:
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nop
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nop
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2016-05-21 22:14:29 +00:00
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move.w #0x2700,%sr
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2004-02-12 00:47:09 +00:00
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2009-06-12 11:29:00 +00:00
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#if defined(CONFIG_M5208)
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/* Initialize RAMBAR: locate SRAM and validate it */
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2022-11-16 18:10:41 +00:00
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move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0
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2009-06-12 11:29:00 +00:00
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movec %d0, %RAMBAR1
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#endif
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2007-08-16 18:20:50 +00:00
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#if defined(CONFIG_M5272) || defined(CONFIG_M5249) || defined(CONFIG_M5253)
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2016-05-21 22:14:29 +00:00
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/* set MBAR address + valid flag */
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2022-11-16 18:10:41 +00:00
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move.l #(CFG_SYS_MBAR + 1), %d0
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2004-02-12 00:47:09 +00:00
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move.c %d0, %MBAR
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2004-12-16 18:09:49 +00:00
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/*** The 5249 has MBAR2 as well ***/
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2022-11-16 18:10:41 +00:00
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#ifdef CFG_SYS_MBAR2
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2016-05-21 22:14:29 +00:00
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/* Get MBAR2 address */
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2022-11-16 18:10:41 +00:00
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move.l #(CFG_SYS_MBAR2 + 1), %d0
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2016-05-21 22:14:29 +00:00
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/* Set MBAR2 */
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movec %d0, #0xc0e
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2004-12-16 18:09:49 +00:00
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#endif
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2022-11-16 18:10:41 +00:00
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move.l #(CFG_SYS_INIT_RAM_ADDR + 1), %d0
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2004-02-12 00:47:09 +00:00
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movec %d0, %RAMBAR0
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2007-08-16 18:20:50 +00:00
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#endif /* CONFIG_M5272 || CONFIG_M5249 || CONFIG_M5253 */
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2004-02-12 00:47:09 +00:00
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2006-06-10 17:27:47 +00:00
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#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
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2016-05-21 22:14:29 +00:00
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/* set MBAR address + valid flag */
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2022-11-16 18:10:41 +00:00
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move.l #(CFG_SYS_MBAR + 1), %d0
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2004-02-12 00:47:09 +00:00
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move.l %d0, 0x40000000
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2006-04-20 06:42:42 +00:00
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/* Initialize RAMBAR1: locate SRAM and validate it */
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2022-11-16 18:10:41 +00:00
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move.l #(CFG_SYS_INIT_RAM_ADDR + 0x21), %d0
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2006-04-20 06:42:42 +00:00
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movec %d0, %RAMBAR1
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2006-12-19 23:27:32 +00:00
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#if defined(CONFIG_M5282)
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2022-11-16 18:10:41 +00:00
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#if (CONFIG_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
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2016-05-21 22:14:29 +00:00
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/*
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* Setup code in SRAM to initialize FLASHBAR,
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* if start from internal Flash
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*/
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2022-11-16 18:10:41 +00:00
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move.l #(_flashbar_setup-CFG_SYS_INT_FLASH_BASE), %a0
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move.l #(_flashbar_setup_end-CFG_SYS_INT_FLASH_BASE), %a1
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move.l #(CFG_SYS_INIT_RAM_ADDR), %a2
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2006-04-20 06:42:42 +00:00
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_copy_flash:
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2016-05-21 22:14:29 +00:00
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move.l (%a0)+, (%a2)+
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cmp.l %a0, %a1
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bgt.s _copy_flash
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2022-11-16 18:10:41 +00:00
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jmp CFG_SYS_INIT_RAM_ADDR
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2006-04-20 06:42:42 +00:00
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_flashbar_setup:
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2004-02-12 00:47:09 +00:00
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/* Initialize FLASHBAR: locate internal Flash and validate it */
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2022-11-16 18:10:41 +00:00
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move.l #(CFG_SYS_INT_FLASH_BASE + CFG_SYS_INT_FLASH_ENABLE), %d0
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2008-03-13 19:26:32 +00:00
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movec %d0, %FLASHBAR
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2016-05-21 22:14:29 +00:00
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jmp _after_flashbar_copy.L /* Force jump to absolute address */
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2006-04-20 06:42:42 +00:00
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_flashbar_setup_end:
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nop
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_after_flashbar_copy:
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#else
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/* Setup code to initialize FLASHBAR, if start from external Memory */
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2022-11-16 18:10:41 +00:00
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move.l #(CFG_SYS_INT_FLASH_BASE + CFG_SYS_INT_FLASH_ENABLE), %d0
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2008-08-11 15:54:25 +00:00
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movec %d0, %FLASHBAR
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2022-11-16 18:10:41 +00:00
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#endif /* (CONFIG_TEXT_BASE == CFG_SYS_INT_FLASH_BASE) */
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2004-02-12 00:47:09 +00:00
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2006-09-03 23:03:57 +00:00
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#endif
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2006-04-20 06:42:42 +00:00
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#endif
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2016-05-21 22:14:29 +00:00
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/*
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* if we come from a pre-loader we have no exception table and
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2006-04-20 06:42:42 +00:00
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* therefore no VBR to set
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*/
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#if !defined(CONFIG_MONITOR_IS_IN_RAM)
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2022-11-16 18:10:41 +00:00
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#if defined(CONFIG_M5282) && (CONFIG_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
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move.l #CFG_SYS_INT_FLASH_BASE, %d0
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2007-10-25 22:09:17 +00:00
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#else
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2022-11-16 18:10:41 +00:00
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move.l #CFG_SYS_FLASH_BASE, %d0
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2007-10-25 22:09:17 +00:00
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#endif
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2006-04-20 06:42:42 +00:00
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movec %d0, %VBR
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2006-05-09 09:51:51 +00:00
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#endif
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2008-02-04 21:38:20 +00:00
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#ifdef CONFIG_M5275
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2016-05-21 22:14:29 +00:00
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/* set MBAR address + valid flag */
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2022-11-16 18:10:41 +00:00
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move.l #(CFG_SYS_MBAR + 1), %d0
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2008-02-04 21:38:20 +00:00
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move.l %d0, 0x40000000
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/* movec %d0, %MBAR */
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/* Initialize RAMBAR: locate SRAM and validate it */
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2022-11-16 18:10:41 +00:00
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move.l #(CFG_SYS_INIT_RAM_ADDR + 0x21), %d0
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2008-02-04 21:38:20 +00:00
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movec %d0, %RAMBAR1
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#endif
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2010-03-12 04:12:53 +00:00
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/* initialize general use internal ram */
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2016-05-21 22:14:29 +00:00
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move.l #0, %d0
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move.l #(ICACHE_STATUS), %a1 /* icache */
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move.l #(DCACHE_STATUS), %a2 /* icache */
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move.l %d0, (%a1)
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move.l %d0, (%a2)
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2010-03-12 04:12:53 +00:00
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2016-04-27 19:50:44 +00:00
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/* put relocation table address to a5 */
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2016-05-21 22:14:29 +00:00
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move.l #__got_start, %a5
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2004-02-12 00:47:09 +00:00
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2016-04-27 19:50:44 +00:00
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/* setup stack initially on top of internal static ram */
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2022-11-16 18:10:41 +00:00
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move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE), %sp
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2016-04-27 19:50:44 +00:00
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/*
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* if configured, malloc_f arena will be reserved first,
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* then (and always) gd struct space will be reserved
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*/
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move.l %sp, -(%sp)
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move.l #board_init_f_alloc_reserve, %a1
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2016-05-21 22:14:29 +00:00
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jsr (%a1)
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2016-04-27 19:50:44 +00:00
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/* update stack and frame-pointers */
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2016-05-21 22:14:29 +00:00
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move.l %d0, %sp
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move.l %sp, %fp
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2016-04-27 19:50:44 +00:00
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/* initialize reserved area */
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2016-05-21 22:14:29 +00:00
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move.l %d0, -(%sp)
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2016-04-27 19:50:44 +00:00
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move.l #board_init_f_init_reserve, %a1
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2016-05-21 22:14:29 +00:00
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jsr (%a1)
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2004-02-12 00:47:09 +00:00
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2016-04-11 22:30:59 +00:00
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/* run low-level CPU init code (from flash) */
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2016-05-21 22:14:29 +00:00
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move.l #cpu_init_f, %a1
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jsr (%a1)
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2016-04-11 22:30:59 +00:00
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/* run low-level board init code (from flash) */
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2016-05-21 22:14:29 +00:00
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clr.l %sp@-
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move.l #board_init_f, %a1
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jsr (%a1)
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2004-02-12 00:47:09 +00:00
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2006-05-09 09:51:51 +00:00
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/* board_init_f() does not return */
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2004-02-12 00:47:09 +00:00
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2016-05-21 22:14:29 +00:00
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/******************************************************************************/
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2004-02-12 00:47:09 +00:00
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/*
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2019-12-28 17:44:45 +00:00
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* void relocate_code(addr_sp, gd, addr_moni)
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2004-02-12 00:47:09 +00:00
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*
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* This "function" does not return, instead it continues in RAM
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* after relocating the monitor code.
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*
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* r3 = dest
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* r4 = src
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* r5 = length in bytes
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* r6 = cachelinesize
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*/
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2016-05-21 22:14:29 +00:00
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.globl relocate_code
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2004-02-12 00:47:09 +00:00
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relocate_code:
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2016-05-21 22:14:29 +00:00
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link.w %a6,#0
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move.l 8(%a6), %sp /* set new stack pointer */
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2004-02-12 00:47:09 +00:00
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2016-05-21 22:14:29 +00:00
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move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
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move.l 16(%a6), %a0 /* Save copy of Destination Address */
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2004-02-12 00:47:09 +00:00
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2016-05-21 22:14:29 +00:00
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move.l #CONFIG_SYS_MONITOR_BASE, %a1
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move.l #__init_end, %a2
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move.l %a0, %a3
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2004-02-12 00:47:09 +00:00
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/* copy the code to RAM */
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1:
|
2016-05-21 22:14:29 +00:00
|
|
|
move.l (%a1)+, (%a3)+
|
|
|
|
cmp.l %a1,%a2
|
|
|
|
bgt.s 1b
|
2004-02-12 00:47:09 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* We are done. Do not return, instead branch to second part of board
|
|
|
|
* initialization, now running from RAM.
|
|
|
|
*/
|
2008-05-20 14:00:29 +00:00
|
|
|
move.l %a0, %a1
|
2008-10-16 13:01:15 +00:00
|
|
|
add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
|
2004-02-12 00:47:09 +00:00
|
|
|
jmp (%a1)
|
|
|
|
|
|
|
|
in_ram:
|
|
|
|
|
|
|
|
clear_bss:
|
2008-05-20 14:00:29 +00:00
|
|
|
/*
|
2004-02-12 00:47:09 +00:00
|
|
|
* Now clear BSS segment
|
|
|
|
*/
|
|
|
|
move.l %a0, %a1
|
2008-10-16 13:01:15 +00:00
|
|
|
add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
|
2004-02-12 00:47:09 +00:00
|
|
|
move.l %a0, %d1
|
2008-10-16 13:01:15 +00:00
|
|
|
add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
|
2004-02-12 00:47:09 +00:00
|
|
|
6:
|
|
|
|
clr.l (%a1)+
|
|
|
|
cmp.l %a1,%d1
|
|
|
|
bgt.s 6b
|
|
|
|
|
|
|
|
/*
|
|
|
|
* fix got table in RAM
|
|
|
|
*/
|
|
|
|
move.l %a0, %a1
|
2008-10-16 13:01:15 +00:00
|
|
|
add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
|
2016-05-21 22:14:29 +00:00
|
|
|
move.l %a1,%a5 /* fix got pointer register a5 */
|
2004-02-12 00:47:09 +00:00
|
|
|
|
|
|
|
move.l %a0, %a2
|
2008-10-16 13:01:15 +00:00
|
|
|
add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
|
2004-02-12 00:47:09 +00:00
|
|
|
|
|
|
|
7:
|
|
|
|
move.l (%a1),%d1
|
|
|
|
sub.l #_start,%d1
|
|
|
|
add.l %a0,%d1
|
|
|
|
move.l %d1,(%a1)+
|
|
|
|
cmp.l %a2, %a1
|
|
|
|
bne 7b
|
|
|
|
|
|
|
|
/* calculate relative jump to board_init_r in ram */
|
2016-05-21 22:14:29 +00:00
|
|
|
move.l %a0, %a1
|
|
|
|
add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
|
2004-02-12 00:47:09 +00:00
|
|
|
|
|
|
|
/* set parameters for board_init_r */
|
2016-05-21 22:14:29 +00:00
|
|
|
move.l %a0,-(%sp) /* dest_addr */
|
|
|
|
move.l %d0,-(%sp) /* gd */
|
2004-02-12 00:47:09 +00:00
|
|
|
jsr (%a1)
|
|
|
|
|
2016-05-21 22:14:29 +00:00
|
|
|
/******************************************************************************/
|
|
|
|
|
2004-02-12 00:47:09 +00:00
|
|
|
/* exception code */
|
2016-05-21 22:14:29 +00:00
|
|
|
.globl _fault
|
2004-02-12 00:47:09 +00:00
|
|
|
_fault:
|
2016-05-21 22:14:29 +00:00
|
|
|
bra _fault
|
2004-02-12 00:47:09 +00:00
|
|
|
|
2016-05-21 22:14:29 +00:00
|
|
|
.globl _exc_handler
|
2004-02-12 00:47:09 +00:00
|
|
|
_exc_handler:
|
|
|
|
SAVE_ALL
|
|
|
|
movel %sp,%sp@-
|
2016-05-21 22:14:29 +00:00
|
|
|
bsr exc_handler
|
2004-02-12 00:47:09 +00:00
|
|
|
addql #4,%sp
|
|
|
|
RESTORE_ALL
|
|
|
|
|
2016-05-21 22:14:29 +00:00
|
|
|
.globl _int_handler
|
2004-02-12 00:47:09 +00:00
|
|
|
_int_handler:
|
|
|
|
SAVE_ALL
|
|
|
|
movel %sp,%sp@-
|
2016-05-21 22:14:29 +00:00
|
|
|
bsr int_handler
|
2004-02-12 00:47:09 +00:00
|
|
|
addql #4,%sp
|
|
|
|
RESTORE_ALL
|
|
|
|
|
2016-05-21 22:14:29 +00:00
|
|
|
/******************************************************************************/
|
2004-02-12 00:47:09 +00:00
|
|
|
|
2016-05-21 22:14:29 +00:00
|
|
|
.align 4
|