2013-11-21 08:06:46 +00:00
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/*
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* include/configs/lager.h
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* This file is lager board configuration.
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*
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2014-11-10 05:34:07 +00:00
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* Copyright (C) 2013, 2014 Renesas Electronics Corporation
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2013-11-21 08:06:46 +00:00
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef __LAGER_H
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#define __LAGER_H
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#undef DEBUG
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#define CONFIG_R8A7790
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#define CONFIG_RMOBILE_BOARD_STRING "Lager"
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2014-11-10 05:34:07 +00:00
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#include "rcar-gen2-common.h"
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2014-03-31 06:22:31 +00:00
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2014-10-31 07:16:26 +00:00
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#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
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#define CONFIG_SYS_TEXT_BASE 0xB0000000
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#else
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2014-01-08 01:32:22 +00:00
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#define CONFIG_SYS_TEXT_BASE 0xE8080000
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2014-10-31 07:16:26 +00:00
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#endif
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2013-11-21 08:06:46 +00:00
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/* STACK */
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2014-10-31 07:16:26 +00:00
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#if defined(CONFIGF_RMOBILE_EXTRAM_BOOT)
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#define CONFIG_SYS_INIT_SP_ADDR 0xB003FFFC
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#else
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#define CONFIG_SYS_INIT_SP_ADDR 0xE827FFFC
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#endif
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#define STACK_AREA_SIZE 0xC000
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2013-11-21 08:06:46 +00:00
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#define LOW_LEVEL_MERAM_STACK \
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(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
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/* MEMORY */
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2014-11-10 05:34:07 +00:00
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#define RCAR_GEN2_SDRAM_BASE 0x40000000
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#define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024)
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#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
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2013-11-21 08:06:46 +00:00
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/* SCIF */
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#define CONFIG_SCIF_CONSOLE
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#define CONFIG_CONS_SCIF0
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2014-07-27 23:35:05 +00:00
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#define CONFIG_SCIF_USE_EXT_CLK
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2013-11-21 08:06:46 +00:00
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2014-11-10 05:34:07 +00:00
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/* SPI */
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2014-01-08 01:32:22 +00:00
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#define CONFIG_SPI
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#define CONFIG_SPI_FLASH_BAR
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#define CONFIG_SH_QSPI
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_SPANSION
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#define CONFIG_SYS_NO_FLASH
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2013-10-20 11:28:24 +00:00
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/* SH Ether */
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#define CONFIG_NET_MULTI
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#define CONFIG_SH_ETHER
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#define CONFIG_SH_ETHER_USE_PORT 0
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#define CONFIG_SH_ETHER_PHY_ADDR 0x1
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#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
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#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
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#define CONFIG_SH_ETHER_CACHE_WRITEBACK
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#define CONFIG_SH_ETHER_CACHE_INVALIDATE
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#define CONFIG_BITBANGMII
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#define CONFIG_BITBANGMII_MULTI
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2013-09-30 01:08:40 +00:00
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/* I2C */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_RCAR
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#define CONFIG_SYS_RCAR_I2C0_SPEED 400000
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#define CONFIG_SYS_RCAR_I2C1_SPEED 400000
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#define CONFIG_SYS_RCAR_I2C2_SPEED 400000
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#define CONFIG_SYS_RCAR_I2C3_SPEED 400000
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#define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4
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2013-10-10 00:13:41 +00:00
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#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
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2013-11-21 08:06:46 +00:00
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/* Board Clock */
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2014-03-31 05:03:07 +00:00
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
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#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2)
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2013-11-21 08:06:46 +00:00
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#define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2)
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#define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
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2013-09-30 01:08:40 +00:00
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#define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12)
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2014-07-27 23:11:21 +00:00
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#define CONFIG_SH_SCIF_CLK_FREQ 14745600 /* External Clock */
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2013-11-21 08:06:46 +00:00
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#define CONFIG_SYS_TMU_CLK_DIV 4
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2014-03-27 05:14:58 +00:00
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/* USB */
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_RMOBILE
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2014-07-28 06:29:31 +00:00
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
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2014-03-27 05:14:58 +00:00
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#define CONFIG_USB_STORAGE
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2013-11-21 08:06:46 +00:00
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#endif /* __LAGER_H */
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