Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-19 03:08:31 +00:00
Code Issues Projects Releases Packages Wiki Activity
u-boot/include/configs/socfpga_cyclone5.h

107 lines
3 KiB
C
Raw Normal View History

ARM: Add Altera SOCFPGA Cyclone5 Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
2012-10-04 06:46:02 +00:00
/*
arm: socfpga: Split SoCFPGA configuration Split the SoCFPGA configuration into SoC-specific part which is common for all boards (socfpga_cyclone5_common.h) and a board specific part. There is currently only one board, which is the generic SoCFPGA board (socfpga_cyclone5.h), but there are more to come. This is necessary due to various features of the boards, which unfortunatelly cannot be autodetected. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
* Copyright (C) 2014 Marek Vasut <marex@denx.de>
ARM: Add Altera SOCFPGA Cyclone5 Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
2012-10-04 06:46:02 +00:00
*
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
2013-07-08 07:37:19 +00:00
* SPDX-License-Identifier: GPL-2.0+
ARM: Add Altera SOCFPGA Cyclone5 Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
2012-10-04 06:46:02 +00:00
*/
arm: socfpga: Split SoCFPGA configuration Split the SoCFPGA configuration into SoC-specific part which is common for all boards (socfpga_cyclone5_common.h) and a board specific part. There is currently only one board, which is the generic SoCFPGA board (socfpga_cyclone5.h), but there are more to come. This is necessary due to various features of the boards, which unfortunatelly cannot be autodetected. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
#ifndef __CONFIG_SOCFPGA_CYCLONE5_H__
#define __CONFIG_SOCFPGA_CYCLONE5_H__
ARM: Add Altera SOCFPGA Cyclone5 Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
2012-10-04 06:46:02 +00:00
#include <asm/arch/socfpga_base_addrs.h>
socfpga: Adding System Manager driver Adding System Manager driver which will configure the pin mux for real hardware Cyclone V development kit (not Virtual Platform) Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2013-09-11 16:24:48 +00:00
#include "../../board/altera/socfpga/pinmux_config.h"
socfpga: Adding Scan Manager driver Scan Manager driver will be called to configure the IOCSR scan chain. This configuration will setup the IO buffer settings Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2014-06-10 06:17:42 +00:00
#include "../../board/altera/socfpga/iocsr_config.h"
socfpga: Adding Clock Manager driver Clock Manager driver will be called to reconfigure all the clocks setting based on user input. The input are passed to Preloader through handoff files Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by: Pavel Machek <pavel@denx.de>
2014-03-05 04:13:53 +00:00
#include "../../board/altera/socfpga/pll_config.h"
ARM: Add Altera SOCFPGA Cyclone5 Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
2012-10-04 06:46:02 +00:00
arm: socfpga: Clean up SoCFPGA configuration Reorganize and cleanup the configuration file for SoCFPGA. There is no functional change after this cleanup. This was necessary, since the file was a wild mess and it was impossible to make sense of it's content, let alone change something without breaking some other thing. This patch puts the contents on par with regular U-Boot standards. Also remove unused preprocessor symbols CONFIG_SINGLE_BOOTOADER and CONFIG_USE_IRQ, which is undefined by default. Finally, do logical reordering of the defines in the file so it's much more readable. The reordering was also necessary for the splitting as the initial one was messy. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
/* U-Boot Commands */
#define CONFIG_SYS_NO_FLASH
#include <config_cmd_default.h>
#define CONFIG_DOS_PARTITION
#define CONFIG_FAT_WRITE
#define CONFIG_HW_WATCHDOG
arm: socfpga: cache: Define cacheline size The Cortex-A9 has 32-byte long L1 cachelines. Define this value. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-09-14 23:27:57 +00:00
arm: socfpga: Clean up SoCFPGA configuration Reorganize and cleanup the configuration file for SoCFPGA. There is no functional change after this cleanup. This was necessary, since the file was a wild mess and it was impossible to make sense of it's content, let alone change something without breaking some other thing. This patch puts the contents on par with regular U-Boot standards. Also remove unused preprocessor symbols CONFIG_SINGLE_BOOTOADER and CONFIG_USE_IRQ, which is undefined by default. Finally, do logical reordering of the defines in the file so it's much more readable. The reordering was also necessary for the splitting as the initial one was messy. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_CACHE
arm: socfpga: Add USB and UDC support for Cyclone V DK Add support for USB host mode and USB device mode for the Cyclone V development kit and enable support for UMS (to export SD card as USB mass storage). The UMS is activated via 'ums 0 mmc 0' command, the system must be connected to a host PC via HPS USB port and SD card must be installed for this to work. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
2014-12-30 19:04:20 +00:00
#define CONFIG_CMD_DFU
arm: socfpga: Clean up SoCFPGA configuration Reorganize and cleanup the configuration file for SoCFPGA. There is no functional change after this cleanup. This was necessary, since the file was a wild mess and it was impossible to make sense of it's content, let alone change something without breaking some other thing. This patch puts the contents on par with regular U-Boot standards. Also remove unused preprocessor symbols CONFIG_SINGLE_BOOTOADER and CONFIG_USE_IRQ, which is undefined by default. Finally, do logical reordering of the defines in the file so it's much more readable. The reordering was also necessary for the splitting as the initial one was messy. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
#define CONFIG_CMD_FAT
#define CONFIG_CMD_FPGA
arm: socfpga: Use CMD_FS_GENERIC Enable and use the CONFIG_CMD_FS_GENERIC to avoid hard-coding the filesystem type into the environment. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-09-19 11:28:47 +00:00
#define CONFIG_CMD_FS_GENERIC
arm: socfpga: Clean up SoCFPGA configuration Reorganize and cleanup the configuration file for SoCFPGA. There is no functional change after this cleanup. This was necessary, since the file was a wild mess and it was impossible to make sense of it's content, let alone change something without breaking some other thing. This patch puts the contents on par with regular U-Boot standards. Also remove unused preprocessor symbols CONFIG_SINGLE_BOOTOADER and CONFIG_USE_IRQ, which is undefined by default. Finally, do logical reordering of the defines in the file so it's much more readable. The reordering was also necessary for the splitting as the initial one was messy. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
#define CONFIG_CMD_GREPENV
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_SETEXPR
arm: socfpga: Add USB and UDC support for Cyclone V DK Add support for USB host mode and USB device mode for the Cyclone V development kit and enable support for UMS (to export SD card as USB mass storage). The UMS is activated via 'ums 0 mmc 0' command, the system must be connected to a host PC via HPS USB port and SD card must be installed for this to work. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
2014-12-30 19:04:20 +00:00
#define CONFIG_CMD_USB
#define CONFIG_CMD_USB_MASS_STORAGE
ARM: Add Altera SOCFPGA Cyclone5 Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
2012-10-04 06:46:02 +00:00
arm: socfpga: Split SoCFPGA configuration Split the SoCFPGA configuration into SoC-specific part which is common for all boards (socfpga_cyclone5_common.h) and a board specific part. There is currently only one board, which is the generic SoCFPGA board (socfpga_cyclone5.h), but there are more to come. This is necessary due to various features of the boards, which unfortunatelly cannot be autodetected. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
/* Memory configurations */
arm: socfpga: Clean up SoCFPGA configuration Reorganize and cleanup the configuration file for SoCFPGA. There is no functional change after this cleanup. This was necessary, since the file was a wild mess and it was impossible to make sense of it's content, let alone change something without breaking some other thing. This patch puts the contents on par with regular U-Boot standards. Also remove unused preprocessor symbols CONFIG_SINGLE_BOOTOADER and CONFIG_USE_IRQ, which is undefined by default. Finally, do logical reordering of the defines in the file so it's much more readable. The reordering was also necessary for the splitting as the initial one was messy. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
ARM: Add Altera SOCFPGA Cyclone5 Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
2012-10-04 06:46:02 +00:00
arm: socfpga: Clean up SoCFPGA configuration Reorganize and cleanup the configuration file for SoCFPGA. There is no functional change after this cleanup. This was necessary, since the file was a wild mess and it was impossible to make sense of it's content, let alone change something without breaking some other thing. This patch puts the contents on par with regular U-Boot standards. Also remove unused preprocessor symbols CONFIG_SINGLE_BOOTOADER and CONFIG_USE_IRQ, which is undefined by default. Finally, do logical reordering of the defines in the file so it's much more readable. The reordering was also necessary for the splitting as the initial one was messy. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
/* Booting Linux */
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTFILE "zImage"
socfpga_cyclone5.h: fix kernel console argument in default environment With fresh environment the kernel gets wrong console argument and boots without console output. Fix it. Reported-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Marek Vasut <marex@denx.de>
2014-11-07 00:12:03 +00:00
#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
arm: socfpga: Enable SDMMC boot for SOCFPGA U-Boot Enable the SDMMC boot as default boot for SOCFPGA U-Boot dev kit. Enable the bootz command as zImage is used instead uImage. Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-09-19 10:33:19 +00:00
#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
arm: socfpga: Clean up SoCFPGA configuration Reorganize and cleanup the configuration file for SoCFPGA. There is no functional change after this cleanup. This was necessary, since the file was a wild mess and it was impossible to make sense of it's content, let alone change something without breaking some other thing. This patch puts the contents on par with regular U-Boot standards. Also remove unused preprocessor symbols CONFIG_SINGLE_BOOTOADER and CONFIG_USE_IRQ, which is undefined by default. Finally, do logical reordering of the defines in the file so it's much more readable. The reordering was also necessary for the splitting as the initial one was messy. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
#define CONFIG_BOOTCOMMAND "run ramboot"
arm: socfpga: Enable SDMMC boot for SOCFPGA U-Boot Enable the SDMMC boot as default boot for SOCFPGA U-Boot dev kit. Enable the bootz command as zImage is used instead uImage. Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-09-19 10:33:19 +00:00
#else
arm: socfpga: Clean up SoCFPGA configuration Reorganize and cleanup the configuration file for SoCFPGA. There is no functional change after this cleanup. This was necessary, since the file was a wild mess and it was impossible to make sense of it's content, let alone change something without breaking some other thing. This patch puts the contents on par with regular U-Boot standards. Also remove unused preprocessor symbols CONFIG_SINGLE_BOOTOADER and CONFIG_USE_IRQ, which is undefined by default. Finally, do logical reordering of the defines in the file so it's much more readable. The reordering was also necessary for the splitting as the initial one was messy. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
arm: socfpga: Enable SDMMC boot for SOCFPGA U-Boot Enable the SDMMC boot as default boot for SOCFPGA U-Boot dev kit. Enable the bootz command as zImage is used instead uImage. Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-09-19 10:33:19 +00:00
#endif
arm: socfpga: Clean up SoCFPGA configuration Reorganize and cleanup the configuration file for SoCFPGA. There is no functional change after this cleanup. This was necessary, since the file was a wild mess and it was impossible to make sense of it's content, let alone change something without breaking some other thing. This patch puts the contents on par with regular U-Boot standards. Also remove unused preprocessor symbols CONFIG_SINGLE_BOOTOADER and CONFIG_USE_IRQ, which is undefined by default. Finally, do logical reordering of the defines in the file so it's much more readable. The reordering was also necessary for the splitting as the initial one was messy. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
#define CONFIG_LOADADDR 0x8000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
ARM: Add Altera SOCFPGA Cyclone5 Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
2012-10-04 06:46:02 +00:00
arm: socfpga: Split SoCFPGA configuration Split the SoCFPGA configuration into SoC-specific part which is common for all boards (socfpga_cyclone5_common.h) and a board specific part. There is currently only one board, which is the generic SoCFPGA board (socfpga_cyclone5.h), but there are more to come. This is necessary due to various features of the boards, which unfortunatelly cannot be autodetected. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
/* Ethernet on SoC (EMAC) */
#if defined(CONFIG_CMD_NET)
arm: socfpga: Use EMAC1 on SoCDK The SoCDK uses EMAC1, not EMAC0. This patch fixes the issue. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
2014-10-09 23:50:23 +00:00
#define CONFIG_EMAC_BASE SOCFPGA_EMAC1_ADDRESS
arm: socfpga: Clean up SoCFPGA configuration Reorganize and cleanup the configuration file for SoCFPGA. There is no functional change after this cleanup. This was necessary, since the file was a wild mess and it was impossible to make sense of it's content, let alone change something without breaking some other thing. This patch puts the contents on par with regular U-Boot standards. Also remove unused preprocessor symbols CONFIG_SINGLE_BOOTOADER and CONFIG_USE_IRQ, which is undefined by default. Finally, do logical reordering of the defines in the file so it's much more readable. The reordering was also necessary for the splitting as the initial one was messy. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII
/* PHY */
#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9021
#define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew"
#define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0
#define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew"
#define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0
ARM: Add Altera SOCFPGA Cyclone5 Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
2012-10-04 06:46:02 +00:00
socfpga: Adding configuration for development kit Separating the configuration file for Virtual Target and real hardware Cyclone V development kit Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2013-08-07 15:06:56 +00:00
#endif
ARM: Add Altera SOCFPGA Cyclone5 Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
2012-10-04 06:46:02 +00:00
arm: socfpga: Add USB and UDC support for Cyclone V DK Add support for USB host mode and USB device mode for the Cyclone V development kit and enable support for UMS (to export SD card as USB mass storage). The UMS is activated via 'ums 0 mmc 0' command, the system must be connected to a host PC via HPS USB port and SD card must be installed for this to work. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
2014-12-30 19:04:20 +00:00
/* USB */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
#endif
#define CONFIG_G_DNL_MANUFACTURER "Altera"
arm: socfpga: Split SoCFPGA configuration Split the SoCFPGA configuration into SoC-specific part which is common for all boards (socfpga_cyclone5_common.h) and a board specific part. There is currently only one board, which is the generic SoCFPGA board (socfpga_cyclone5.h), but there are more to come. This is necessary due to various features of the boards, which unfortunatelly cannot be autodetected. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
/* Extra Environment */
#define CONFIG_HOSTNAME socfpga_cyclone5
ARM: Add Altera SOCFPGA Cyclone5 Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
2012-10-04 06:46:02 +00:00
arm: socfpga: Clean up SoCFPGA configuration Reorganize and cleanup the configuration file for SoCFPGA. There is no functional change after this cleanup. This was necessary, since the file was a wild mess and it was impossible to make sense of it's content, let alone change something without breaking some other thing. This patch puts the contents on par with regular U-Boot standards. Also remove unused preprocessor symbols CONFIG_SINGLE_BOOTOADER and CONFIG_USE_IRQ, which is undefined by default. Finally, do logical reordering of the defines in the file so it's much more readable. The reordering was also necessary for the splitting as the initial one was messy. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
#define CONFIG_EXTRA_ENV_SETTINGS \
"verify=n\0" \
"loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
"bootm ${loadaddr} - ${fdt_addr}\0" \
"bootimage=zImage\0" \
"fdt_addr=100\0" \
"fdtimage=socfpga.dtb\0" \
"fsloadcmd=ext2load\0" \
"bootm ${loadaddr} - ${fdt_addr}\0" \
"mmcroot=/dev/mmcblk0p2\0" \
"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
" root=${mmcroot} rw rootwait;" \
"bootz ${loadaddr} - ${fdt_addr}\0" \
"mmcload=mmc rescan;" \
arm: socfpga: Use CMD_FS_GENERIC Enable and use the CONFIG_CMD_FS_GENERIC to avoid hard-coding the filesystem type into the environment. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-09-19 11:28:47 +00:00
"load mmc 0:1 ${loadaddr} ${bootimage};" \
"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
arm: socfpga: Clean up SoCFPGA configuration Reorganize and cleanup the configuration file for SoCFPGA. There is no functional change after this cleanup. This was necessary, since the file was a wild mess and it was impossible to make sense of it's content, let alone change something without breaking some other thing. This patch puts the contents on par with regular U-Boot standards. Also remove unused preprocessor symbols CONFIG_SINGLE_BOOTOADER and CONFIG_USE_IRQ, which is undefined by default. Finally, do logical reordering of the defines in the file so it's much more readable. The reordering was also necessary for the splitting as the initial one was messy. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
"qspiroot=/dev/mtdblock0\0" \
"qspirootfstype=jffs2\0" \
"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
" root=${qspiroot} rw rootfstype=${qspirootfstype};"\
"bootm ${loadaddr} - ${fdt_addr}\0"
ARM: Add Altera SOCFPGA Cyclone5 Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
2012-10-04 06:46:02 +00:00
arm: socfpga: Split SoCFPGA configuration Split the SoCFPGA configuration into SoC-specific part which is common for all boards (socfpga_cyclone5_common.h) and a board specific part. There is currently only one board, which is the generic SoCFPGA board (socfpga_cyclone5.h), but there are more to come. This is necessary due to various features of the boards, which unfortunatelly cannot be autodetected. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
socfpga: Adding DesignWare watchdog support To enable the DesignWare watchdog support at SOCFPGA Cyclone V dev kit. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
2014-06-10 06:11:04 +00:00
arm: socfpga: Split SoCFPGA configuration Split the SoCFPGA configuration into SoC-specific part which is common for all boards (socfpga_cyclone5_common.h) and a board specific part. There is currently only one board, which is the generic SoCFPGA board (socfpga_cyclone5.h), but there are more to come. This is necessary due to various features of the boards, which unfortunatelly cannot be autodetected. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-09-08 12:08:45 +00:00
#endif /* __CONFIG_SOCFPGA_CYCLONE5_H__ */
Reference in a new issue Copy permalink