u-boot/arch/arm/mach-rockchip/rk3328/Makefile

#
# (C) Copyright 2016 Rockchip Electronics Co., Ltd
#
# SPDX-License-Identifier:     GPL-2.0+
#

obj-y += clk_rk3328.o
obj-y += rk3328.o
obj-y += syscon_rk3328.o
rockchip: rk3328: add soc basic support RK3328 is a SoC from Rockchip with quad-core Cortex-A53 CPU. It supports two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-16MB range. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Add empty arch/arm/mach-rockchip/rk3328/Kconfig to avoid build error: Signed-off-by: Simon Glass <sjg@chromium.org> 2017-02-23 07:37:51 +00:00			`#`
			`# (C) Copyright 2016 Rockchip Electronics Co., Ltd`
			`#`
			`# SPDX-License-Identifier: GPL-2.0+`
			`#`

rockchip: rk3328: add clock driver Add rk3328 clock driver and cru structure definition. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> 2017-02-23 07:37:52 +00:00			`obj-y += clk_rk3328.o`
rockchip: rk3328: add soc basic support RK3328 is a SoC from Rockchip with quad-core Cortex-A53 CPU. It supports two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-16MB range. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Add empty arch/arm/mach-rockchip/rk3328/Kconfig to avoid build error: Signed-off-by: Simon Glass <sjg@chromium.org> 2017-02-23 07:37:51 +00:00			`obj-y += rk3328.o`
			`obj-y += syscon_rk3328.o`