2009-02-06 02:40:57 +00:00
|
|
|
/*
|
|
|
|
* Copyright 2009 Freescale Semiconductor, Inc.
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU General Public License as
|
|
|
|
* published by the Free Software Foundation; either version 2 of
|
|
|
|
* the License, or (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This program is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
* GNU General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU General Public License
|
|
|
|
* along with this program; if not, write to the Free Software
|
|
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
|
|
* MA 02111-1307 USA
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef _ASM_CONFIG_H_
|
|
|
|
#define _ASM_CONFIG_H_
|
|
|
|
|
2009-11-03 16:35:59 +00:00
|
|
|
#define CONFIG_LMB
|
|
|
|
|
2009-02-06 02:40:58 +00:00
|
|
|
#ifndef CONFIG_MAX_MEM_MAPPED
|
2009-02-23 19:56:51 +00:00
|
|
|
#if defined(CONFIG_4xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
|
2009-02-06 02:40:58 +00:00
|
|
|
#define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30)
|
|
|
|
#else
|
2009-02-11 08:37:12 +00:00
|
|
|
#define CONFIG_MAX_MEM_MAPPED (256 << 20)
|
2009-02-06 02:40:58 +00:00
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
2009-07-15 05:01:08 +00:00
|
|
|
/* Check if boards need to enable FSL DMA engine for SDRAM init */
|
|
|
|
#if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC)
|
|
|
|
#if (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)) || \
|
|
|
|
((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \
|
|
|
|
!defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
|
2009-06-30 22:15:40 +00:00
|
|
|
#define CONFIG_FSL_DMA
|
2009-02-06 02:40:57 +00:00
|
|
|
#endif
|
2009-06-30 22:15:40 +00:00
|
|
|
#endif
|
|
|
|
|
2009-08-20 13:25:35 +00:00
|
|
|
#if defined(CONFIG_MPC8572) || defined(CONFIG_P1020) || \
|
|
|
|
defined(CONFIG_P2020) || defined(CONFIG_MPC8641)
|
2009-03-19 07:39:17 +00:00
|
|
|
#define CONFIG_MAX_CPUS 2
|
|
|
|
#elif defined(CONFIG_PPC_P4080)
|
|
|
|
#define CONFIG_MAX_CPUS 8
|
2009-07-31 06:38:14 +00:00
|
|
|
#else
|
2009-03-19 07:39:17 +00:00
|
|
|
#define CONFIG_MAX_CPUS 1
|
2009-07-31 06:38:14 +00:00
|
|
|
#endif
|
|
|
|
|
2009-10-23 20:55:47 +00:00
|
|
|
/*
|
|
|
|
* Provide a default boot page translation virtual address that lines up with
|
|
|
|
* Freescale's default e500 reset page.
|
|
|
|
*/
|
|
|
|
#if (defined(CONFIG_E500) && defined(CONFIG_MP))
|
|
|
|
#ifndef CONFIG_BPTR_VIRT_ADDR
|
|
|
|
#define CONFIG_BPTR_VIRT_ADDR 0xfffff000
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
2009-10-31 16:23:41 +00:00
|
|
|
/* Enable TSEC2.0 for the platforms that have it if we are using TSEC */
|
|
|
|
#if defined(CONFIG_TSEC_ENET) && \
|
|
|
|
(defined(CONFIG_P1020) || defined(CONFIG_P1011))
|
|
|
|
#define CONFIG_TSECV2
|
|
|
|
#endif
|
|
|
|
|
2009-11-12 16:26:16 +00:00
|
|
|
/* Number of TLB CAM entries we have on FSL Book-E chips */
|
|
|
|
#if defined(CONFIG_E500MC)
|
|
|
|
#define CONFIG_SYS_NUM_TLBCAMS 64
|
|
|
|
#elif defined(CONFIG_E500)
|
|
|
|
#define CONFIG_SYS_NUM_TLBCAMS 16
|
|
|
|
#endif
|
|
|
|
|
2009-09-21 16:20:25 +00:00
|
|
|
/* Relocation to SDRAM works on all PPC boards */
|
|
|
|
#define CONFIG_RELOC_FIXUP_WORKS
|
|
|
|
|
2009-06-30 22:15:40 +00:00
|
|
|
#endif /* _ASM_CONFIG_H_ */
|