2022-07-26 08:41:15 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2022 NXP
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*/
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#include <common.h>
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#include <clk.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <errno.h>
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#include <eth_phy.h>
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#include <log.h>
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#include <malloc.h>
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#include <memalign.h>
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#include <miiphy.h>
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#include <net.h>
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#include <netdev.h>
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#include <phy.h>
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#include <reset.h>
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#include <wait_bit.h>
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#include <asm/arch/clock.h>
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#include <asm/cache.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/mach-imx/sys_proto.h>
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#include <linux/delay.h>
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#include "dwc_eth_qos.h"
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__weak u32 imx_get_eqos_csr_clk(void)
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{
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return 100 * 1000000;
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}
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__weak int imx_eqos_txclk_set_rate(unsigned long rate)
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{
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return 0;
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}
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static ulong eqos_get_tick_clk_rate_imx(struct udevice *dev)
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{
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return imx_get_eqos_csr_clk();
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}
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static int eqos_probe_resources_imx(struct udevice *dev)
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{
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struct eqos_priv *eqos = dev_get_priv(dev);
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phy_interface_t interface;
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debug("%s(dev=%p):\n", __func__, dev);
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interface = eqos->config->interface(dev);
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if (interface == PHY_INTERFACE_MODE_NA) {
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pr_err("Invalid PHY interface\n");
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return -EINVAL;
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}
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debug("%s: OK\n", __func__);
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return 0;
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}
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static int eqos_set_tx_clk_speed_imx(struct udevice *dev)
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{
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struct eqos_priv *eqos = dev_get_priv(dev);
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ulong rate;
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int ret;
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debug("%s(dev=%p):\n", __func__, dev);
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switch (eqos->phy->speed) {
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case SPEED_1000:
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rate = 125 * 1000 * 1000;
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break;
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case SPEED_100:
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rate = 25 * 1000 * 1000;
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break;
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case SPEED_10:
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rate = 2.5 * 1000 * 1000;
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break;
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default:
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pr_err("invalid speed %d", eqos->phy->speed);
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return -EINVAL;
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}
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ret = imx_eqos_txclk_set_rate(rate);
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if (ret < 0) {
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pr_err("imx (tx_clk, %lu) failed: %d", rate, ret);
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return ret;
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}
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return 0;
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}
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2022-07-26 08:41:17 +00:00
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static int eqos_get_enetaddr_imx(struct udevice *dev)
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{
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struct eth_pdata *pdata = dev_get_plat(dev);
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imx_get_mac_from_fuse(dev_seq(dev), pdata->enetaddr);
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return 0;
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}
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2022-07-26 08:41:15 +00:00
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static struct eqos_ops eqos_imx_ops = {
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.eqos_inval_desc = eqos_inval_desc_generic,
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.eqos_flush_desc = eqos_flush_desc_generic,
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.eqos_inval_buffer = eqos_inval_buffer_generic,
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.eqos_flush_buffer = eqos_flush_buffer_generic,
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.eqos_probe_resources = eqos_probe_resources_imx,
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.eqos_remove_resources = eqos_null_ops,
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.eqos_stop_resets = eqos_null_ops,
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.eqos_start_resets = eqos_null_ops,
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.eqos_stop_clks = eqos_null_ops,
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.eqos_start_clks = eqos_null_ops,
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.eqos_calibrate_pads = eqos_null_ops,
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.eqos_disable_calibration = eqos_null_ops,
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.eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_imx,
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2022-07-26 08:41:17 +00:00
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.eqos_get_enetaddr = eqos_get_enetaddr_imx,
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.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_imx,
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2022-07-26 08:41:15 +00:00
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};
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struct eqos_config __maybe_unused eqos_imx_config = {
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.reg_access_always_ok = false,
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.mdio_wait = 10,
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.swr_wait = 50,
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.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
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.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
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.axi_bus_width = EQOS_AXI_WIDTH_64,
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.interface = dev_read_phy_mode,
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.ops = &eqos_imx_ops
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};
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