2011-07-06 00:28:33 +00:00
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/*
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* (c) 2011 Graf-Syteco, Matthias Weisser
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* <weisserm@arcor.de>
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*
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* Based on tx25.c:
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* (C) Copyright 2009 DENX Software Engineering
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* Author: John Rigby <jrigby@gmail.com>
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*
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* Based on imx27lite.c:
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* Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
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* Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
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* And:
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* RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2011-07-06 00:28:33 +00:00
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*/
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#include <common.h>
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2011-08-21 08:55:05 +00:00
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#include <asm/gpio.h>
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2011-07-06 00:28:33 +00:00
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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2013-05-03 10:32:17 +00:00
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#include <asm/arch/iomux-mx25.h>
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2011-07-06 00:28:33 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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int board_init()
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{
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2013-05-03 10:32:17 +00:00
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static const iomux_v3_cfg_t sdhc1_pads[] = {
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NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, NO_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, NO_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, NO_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, NO_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, NO_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, NO_PAD_CTRL),
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};
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static const iomux_v3_cfg_t dig_out_pads[] = {
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MX25_PAD_CSI_D8__GPIO_1_7, /* Ouput 1 Ctrl */
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MX25_PAD_CSI_D7__GPIO_1_6, /* Ouput 2 Ctrl */
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NEW_PAD_CTRL(MX25_PAD_CSI_D6__GPIO_1_31, 0), /* Ouput 1 Stat */
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NEW_PAD_CTRL(MX25_PAD_CSI_D5__GPIO_1_30, 0), /* Ouput 2 Stat */
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};
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static const iomux_v3_cfg_t led_pads[] = {
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MX25_PAD_CSI_D9__GPIO_4_21,
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MX25_PAD_CSI_D4__GPIO_1_29,
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};
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static const iomux_v3_cfg_t can_pads[] = {
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NEW_PAD_CTRL(MX25_PAD_GPIO_A__CAN1_TX, NO_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_GPIO_B__CAN1_RX, NO_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_GPIO_C__CAN2_TX, NO_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_GPIO_D__CAN2_RX, NO_PAD_CTRL),
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};
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static const iomux_v3_cfg_t i2c3_pads[] = {
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MX25_PAD_CSPI1_SS1__I2C3_DAT,
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MX25_PAD_GPIO_E__I2C3_CLK,
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};
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2011-07-06 00:28:33 +00:00
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icache_enable();
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2013-05-03 10:32:17 +00:00
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/* Setup of core voltage selection pin to run at 1.4V */
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imx_iomux_v3_setup_pad(MX25_PAD_EXT_ARMCLK__GPIO_3_15); /* VCORE */
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2012-08-19 21:33:50 +00:00
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gpio_direction_output(IMX_GPIO_NR(3, 15), 1);
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2011-07-06 00:28:33 +00:00
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2013-05-03 10:32:17 +00:00
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/* Setup of SD card pins*/
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imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads));
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2011-07-06 00:28:33 +00:00
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/* Setup of digital output for USB power and OC */
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2013-05-03 10:32:17 +00:00
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imx_iomux_v3_setup_pad(MX25_PAD_CSI_D3__GPIO_1_28); /* USB Power */
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2012-08-19 21:33:50 +00:00
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gpio_direction_output(IMX_GPIO_NR(1, 28), 1);
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2011-07-06 00:28:33 +00:00
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2013-05-03 10:32:17 +00:00
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imx_iomux_v3_setup_pad(MX25_PAD_CSI_D2__GPIO_1_27); /* USB OC */
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2012-08-19 21:33:50 +00:00
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gpio_direction_input(IMX_GPIO_NR(1, 18));
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2011-07-06 00:28:33 +00:00
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/* Setup of digital output control pins */
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2013-05-03 10:32:17 +00:00
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imx_iomux_v3_setup_multiple_pads(dig_out_pads,
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ARRAY_SIZE(dig_out_pads));
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2011-07-06 00:28:33 +00:00
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/* Switch both output drivers off */
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2012-08-19 21:33:50 +00:00
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gpio_direction_output(IMX_GPIO_NR(1, 7), 0);
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gpio_direction_output(IMX_GPIO_NR(1, 6), 0);
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2011-07-06 00:28:33 +00:00
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2013-05-03 10:32:17 +00:00
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/* Setup of key input pin */
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imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX25_PAD_KPP_ROW0__GPIO_2_29, 0));
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2012-08-19 21:33:50 +00:00
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gpio_direction_input(IMX_GPIO_NR(2, 29));
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2011-07-06 00:28:33 +00:00
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/* Setup of status LED outputs */
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2013-05-03 10:32:17 +00:00
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imx_iomux_v3_setup_multiple_pads(led_pads, ARRAY_SIZE(led_pads));
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2011-07-06 00:28:33 +00:00
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/* Switch both LEDs off */
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2012-08-19 21:33:50 +00:00
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gpio_direction_output(IMX_GPIO_NR(4, 21), 0);
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gpio_direction_output(IMX_GPIO_NR(1, 29), 0);
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2011-07-06 00:28:33 +00:00
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/* Setup of CAN1 and CAN2 signals */
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2013-05-03 10:32:17 +00:00
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imx_iomux_v3_setup_multiple_pads(can_pads, ARRAY_SIZE(can_pads));
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2011-07-06 00:28:33 +00:00
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/* Setup of I2C3 signals */
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2013-05-03 10:32:17 +00:00
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imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads));
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2011-07-06 00:28:33 +00:00
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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return 0;
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}
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int board_late_init(void)
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{
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const char *e;
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#ifdef CONFIG_FEC_MXC
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2013-05-03 10:32:17 +00:00
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/*
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* FIXME: need to revisit this
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* The original code enabled PUE and 100-k pull-down without PKE, so the right
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* value here is likely:
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* 0 for no pull
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* or:
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* PAD_CTL_PUS_100K_DOWN for 100-k pull-down
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*/
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#define FEC_OUT_PAD_CTRL 0
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static const iomux_v3_cfg_t fec_pads[] = {
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MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
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MX25_PAD_FEC_RX_DV__FEC_RX_DV,
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MX25_PAD_FEC_RDATA0__FEC_RDATA0,
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NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL),
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MX25_PAD_FEC_MDIO__FEC_MDIO,
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MX25_PAD_FEC_RDATA1__FEC_RDATA1,
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NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL),
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MX25_PAD_UPLL_BYPCLK__GPIO_3_16, /* LAN-RESET */
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MX25_PAD_UART2_CTS__FEC_RX_ER, /* FEC_RX_ERR */
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};
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imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
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2011-07-06 00:28:33 +00:00
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/* assert PHY reset (low) */
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2012-08-19 21:33:50 +00:00
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gpio_direction_output(IMX_GPIO_NR(3, 16), 0);
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2011-07-06 00:28:33 +00:00
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udelay(5000);
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/* deassert PHY reset */
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2012-08-19 21:33:50 +00:00
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gpio_set_value(IMX_GPIO_NR(3, 16), 1);
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2011-07-06 00:28:33 +00:00
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udelay(5000);
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#endif
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e = getenv("gs_base_board");
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if (e != NULL) {
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if (strcmp(e, "G283") == 0) {
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2012-08-19 21:33:50 +00:00
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int key = gpio_get_value(IMX_GPIO_NR(2, 29));
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2011-07-06 00:28:33 +00:00
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if (key) {
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/* Switch on both LEDs to inidcate boot mode */
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2012-08-19 21:33:50 +00:00
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gpio_set_value(IMX_GPIO_NR(1, 29), 0);
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gpio_set_value(IMX_GPIO_NR(4, 21), 0);
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2011-07-06 00:28:33 +00:00
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setenv("preboot", "run gs_slow_boot");
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} else
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setenv("preboot", "run gs_fast_boot");
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}
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}
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return 0;
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}
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int dram_init(void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
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PHYS_SDRAM_SIZE);
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return 0;
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}
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