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u-boot/include/configs/xilinx_versal.h

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arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-22 12:55:27 +00:00
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Configuration for Xilinx Versal
* (C) Copyright 2016 - 2018 Xilinx, Inc.
arm64: zynqmp: Switch to amd.com emails Update my and DPs email address to match current setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/aba5b19b9c5a95608829e86ad5cc4671c940f1bb.1688992543.git.michal.simek@amd.com
2023-07-10 12:35:49 +00:00
* Michal Simek <michal.simek@amd.com>
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-22 12:55:27 +00:00
*
* Based on Configuration for Xilinx ZynqMP
*/
#ifndef __XILINX_VERSAL_H
#define __XILINX_VERSAL_H
/* Generic Interrupt Controller Definitions */
#define GICD_BASE 0xF9000000
#define GICR_BASE 0xF9080000
/* Serial setup */
global: Move remaining CONFIG_SYS_* to CFG_SYS_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-16 18:10:41 +00:00
#define CFG_SYS_BAUDRATE_TABLE \
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-22 12:55:27 +00:00
{ 4800, 9600, 19200, 38400, 57600, 115200 }
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2022-04-15 05:59:34 +00:00
/* GUID for capsule updatable firmware image */
#define XILINX_BOOT_IMAGE_GUID \
EFI_GUID(0x20c5fba5, 0x0171, 0x457f, 0xb9, 0xcd, \
0xf5, 0x12, 0x9c, 0xd0, 0x72, 0x28)
arm64: versal: Define configs related to USB DFU functionality This patch defines macros required for DFU functionality for Xilinx Versal platform. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-22 09:15:04 +00:00
#if defined(CONFIG_CMD_DFU)
#define DFU_DEFAULT_POLL_TIMEOUT 300
#endif
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-22 12:55:27 +00:00
/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM)
# define PHY_ANEG_TIMEOUT 20000
#endif
#define ENV_MEM_LAYOUT_SETTINGS \
"fdt_addr_r=0x40000000\0" \
arm64: versal: Define configs related to USB DFU functionality This patch defines macros required for DFU functionality for Xilinx Versal platform. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-22 09:15:04 +00:00
"fdt_size_r=0x400000\0" \
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-22 12:55:27 +00:00
"pxefile_addr_r=0x10000000\0" \
"kernel_addr_r=0x18000000\0" \
arm64: versal: Define configs related to USB DFU functionality This patch defines macros required for DFU functionality for Xilinx Versal platform. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-22 09:15:04 +00:00
"kernel_size_r=0x10000000\0" \
xilinx: Define kernel_comp_addr_r,kernel_comp_size env variables Add kernel_comp_addr_r, kernel_comp_size env variables for zynqmp and versal to be able to use the compressed kernel Image(.gz,.bz2,.lzma,.lzo) using booti command. Signed-off-by: Raju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-12 14:49:04 +00:00
"kernel_comp_addr_r=0x30000000\0" \
"kernel_comp_size=0x3C00000\0" \
arm64: versal: Define distro boot commnads for qspi ospi and mmc This patch adds distro boot commands for qspi, ospi and mmc. The distro boot commands now reads the script from flash offset of 63.5MB for qspi and ospi and executes it. For mmc its same as generic distro boot command. As either one of the qspi or ospi can exist on hardware, defined a single distroboot command as xspi that works for both. Setup default location via script_offset_f to 63.5MB to match the most xilinx reference boards for qspi, ospi for now. 512kB allocated space for script size (script_size_f) should be more than enough to cover custom boot logic. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-31 11:58:13 +00:00
"ramdisk_addr_r=0x02100000\0" \
"script_size_f=0x80000\0"
arm64: xilinx: Guard distro boot variable generation When distro boot is disabled there is no reason to generate variables for it. Also do not update boot_targets variable because it would be unused. It is useful for example when standard boot is enabled and distro boot is disabled. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/570c51435da59831ec245cddceda078afa58a550.1693913398.git.michal.simek@amd.com
2023-09-05 11:30:07 +00:00
#if defined(CONFIG_DISTRO_DEFAULTS)
arm64: versal: Define distro boot commnads for qspi ospi and mmc This patch adds distro boot commands for qspi, ospi and mmc. The distro boot commands now reads the script from flash offset of 63.5MB for qspi and ospi and executes it. For mmc its same as generic distro boot command. As either one of the qspi or ospi can exist on hardware, defined a single distroboot command as xspi that works for both. Setup default location via script_offset_f to 63.5MB to match the most xilinx reference boards for qspi, ospi for now. 512kB allocated space for script size (script_size_f) should be more than enough to cover custom boot logic. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-31 11:58:13 +00:00
#if defined(CONFIG_MMC_SDHCI_ZYNQ)
# define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
#else
# define BOOT_TARGET_DEVICES_MMC(func)
#endif
xilinx: versal: Fix compilation error when !CONFIG_NET PXE and DHCP shouldn't be listed when commands are not enabled that's why handle it in the same way as is done for Zynq and ZynqMP. Fixes: ec48b6c991f4 ("arm64: versal: Add support for new Xilinx Versal ACAPs") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-16 08:14:01 +00:00
#if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP)
# define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
#else
# define BOOT_TARGET_DEVICES_PXE(func)
#endif
#if defined(CONFIG_CMD_DHCP)
# define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
#else
# define BOOT_TARGET_DEVICES_DHCP(func)
#endif
arm64: versal: Define distro boot commnads for qspi ospi and mmc This patch adds distro boot commands for qspi, ospi and mmc. The distro boot commands now reads the script from flash offset of 63.5MB for qspi and ospi and executes it. For mmc its same as generic distro boot command. As either one of the qspi or ospi can exist on hardware, defined a single distroboot command as xspi that works for both. Setup default location via script_offset_f to 63.5MB to match the most xilinx reference boards for qspi, ospi for now. 512kB allocated space for script size (script_size_f) should be more than enough to cover custom boot logic. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-31 11:58:13 +00:00
#if defined(CONFIG_ZYNQMP_GQSPI) || defined(CONFIG_CADENCE_OSPI_VERSAL)
# define BOOT_TARGET_DEVICES_XSPI(func) func(XSPI, xspi, 0)
#else
# define BOOT_TARGET_DEVICES_XSPI(func)
#endif
#define BOOTENV_DEV_XSPI(devtypeu, devtypel, instance) \
"bootcmd_xspi0=sf probe 0 0 0 && " \
"sf read $scriptaddr $script_offset_f $script_size_f && " \
xilinx: Make Xilinx custom distro boot commands more verbose Extend description of Xilinx custom boot commands to make clear what runs and what failed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-20 07:17:53 +00:00
"echo XSPI: Trying to boot script at ${scriptaddr} && " \
"source ${scriptaddr}; echo XSPI: SCRIPT FAILED: continuing...;\0"
arm64: versal: Define distro boot commnads for qspi ospi and mmc This patch adds distro boot commands for qspi, ospi and mmc. The distro boot commands now reads the script from flash offset of 63.5MB for qspi and ospi and executes it. For mmc its same as generic distro boot command. As either one of the qspi or ospi can exist on hardware, defined a single distroboot command as xspi that works for both. Setup default location via script_offset_f to 63.5MB to match the most xilinx reference boards for qspi, ospi for now. 512kB allocated space for script size (script_size_f) should be more than enough to cover custom boot logic. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-31 11:58:13 +00:00
#define BOOTENV_DEV_NAME_XSPI(devtypeu, devtypel, instance) \
arm: versal: Fix xspi0 boot mode Use proper number to be aligned with xspi0 boot mode. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-16 16:04:43 +00:00
"xspi0 "
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-22 12:55:27 +00:00
arm64: versal: Add new jtag distro boot command This patch adds new jtag distro boot command to look for bootscript file in DDR and execute it first incase of jtag bootmode. This patch also updates scriptaddr to 512MB as there is high of script corruption incase of bigger kernel image. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-25 11:43:14 +00:00
#define BOOT_TARGET_DEVICES_JTAG(func) func(JTAG, jtag, na)
#define BOOTENV_DEV_JTAG(devtypeu, devtypel, instance) \
xilinx: Make Xilinx custom distro boot commands more verbose Extend description of Xilinx custom boot commands to make clear what runs and what failed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-20 07:17:53 +00:00
"bootcmd_jtag=echo JTAG: Trying to boot script at ${scriptaddr} && " \
"source ${scriptaddr}; echo JTAG: SCRIPT FAILED: continuing...;\0"
arm64: versal: Add new jtag distro boot command This patch adds new jtag distro boot command to look for bootscript file in DDR and execute it first incase of jtag bootmode. This patch also updates scriptaddr to 512MB as there is high of script corruption incase of bigger kernel image. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-25 11:43:14 +00:00
#define BOOTENV_DEV_NAME_JTAG(devtypeu, devtypel, instance) \
"jtag "
xilinx: versal: Add usb dfu/thor distro boot support Change "dfu_usb" to "usb_dfu" for better representation and change required macros. Add 60s timeout of dfu-utils to start transaction. Add support for usb thor to distro boot. Remove DFU_ALT_INFO_RAM as we use bootcmd_usb_dfu instead of dfu_ram. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-31 05:24:57 +00:00
#define BOOT_TARGET_DEVICES_USB_DFU(func) \
func(USB_DFU, usb_dfu, 0) func(USB_DFU, usb_dfu, 1)
#define BOOTENV_DEV_USB_DFU(devtypeu, devtypel, instance) \
"bootcmd_" #devtypel #instance "=setenv dfu_alt_info boot.scr ram " \
"$scriptaddr $script_size_f && " \
"dfu " #instance " ram " #instance " 60 && " \
"echo DFU" #instance ": Trying to boot script at ${scriptaddr} && " \
"source ${scriptaddr}; " \
"echo DFU" #instance ": SCRIPT FAILED: continuing...;\0"
#define BOOTENV_DEV_NAME_USB_DFU(devtypeu, devtypel, instance) \
""
#define BOOT_TARGET_DEVICES_USB_THOR(func) \
func(USB_THOR, usb_thor, 0) func(USB_THOR, usb_thor, 1)
arm64: versal: Add new dfu usb distro boot command This patch adds new dfu usb distro boot command to look for bootscript from dfu-util and runs it. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
2019-07-11 10:37:57 +00:00
xilinx: versal: Add usb dfu/thor distro boot support Change "dfu_usb" to "usb_dfu" for better representation and change required macros. Add 60s timeout of dfu-utils to start transaction. Add support for usb thor to distro boot. Remove DFU_ALT_INFO_RAM as we use bootcmd_usb_dfu instead of dfu_ram. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-31 05:24:57 +00:00
#define BOOTENV_DEV_USB_THOR(devtypeu, devtypel, instance) \
"bootcmd_" #devtypel #instance "=setenv dfu_alt_info boot.scr ram " \
"$scriptaddr $script_size_f && " \
"thordown " #instance " ram " #instance " && " \
"echo THOR" #instance ": Trying to boot script at ${scriptaddr} && " \
xilinx: Make Xilinx custom distro boot commands more verbose Extend description of Xilinx custom boot commands to make clear what runs and what failed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-20 07:17:53 +00:00
"source ${scriptaddr}; " \
xilinx: versal: Add usb dfu/thor distro boot support Change "dfu_usb" to "usb_dfu" for better representation and change required macros. Add 60s timeout of dfu-utils to start transaction. Add support for usb thor to distro boot. Remove DFU_ALT_INFO_RAM as we use bootcmd_usb_dfu instead of dfu_ram. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-31 05:24:57 +00:00
"echo THOR" #instance ": SCRIPT FAILED: continuing...;\0"
arm64: versal: Add new dfu usb distro boot command This patch adds new dfu usb distro boot command to look for bootscript from dfu-util and runs it. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
2019-07-11 10:37:57 +00:00
xilinx: versal: Add usb dfu/thor distro boot support Change "dfu_usb" to "usb_dfu" for better representation and change required macros. Add 60s timeout of dfu-utils to start transaction. Add support for usb thor to distro boot. Remove DFU_ALT_INFO_RAM as we use bootcmd_usb_dfu instead of dfu_ram. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-31 05:24:57 +00:00
#define BOOTENV_DEV_NAME_USB_THOR(devtypeu, devtypel, instance) \
""
arm64: versal: Add new dfu usb distro boot command This patch adds new dfu usb distro boot command to look for bootscript from dfu-util and runs it. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
2019-07-11 10:37:57 +00:00
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-22 12:55:27 +00:00
#define BOOT_TARGET_DEVICES(func) \
arm64: versal: Add new jtag distro boot command This patch adds new jtag distro boot command to look for bootscript file in DDR and execute it first incase of jtag bootmode. This patch also updates scriptaddr to 512MB as there is high of script corruption incase of bigger kernel image. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-25 11:43:14 +00:00
BOOT_TARGET_DEVICES_JTAG(func) \
arm64: versal: Define distro boot commnads for qspi ospi and mmc This patch adds distro boot commands for qspi, ospi and mmc. The distro boot commands now reads the script from flash offset of 63.5MB for qspi and ospi and executes it. For mmc its same as generic distro boot command. As either one of the qspi or ospi can exist on hardware, defined a single distroboot command as xspi that works for both. Setup default location via script_offset_f to 63.5MB to match the most xilinx reference boards for qspi, ospi for now. 512kB allocated space for script size (script_size_f) should be more than enough to cover custom boot logic. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-31 11:58:13 +00:00
BOOT_TARGET_DEVICES_MMC(func) \
BOOT_TARGET_DEVICES_XSPI(func) \
xilinx: versal: Add usb dfu/thor distro boot support Change "dfu_usb" to "usb_dfu" for better representation and change required macros. Add 60s timeout of dfu-utils to start transaction. Add support for usb thor to distro boot. Remove DFU_ALT_INFO_RAM as we use bootcmd_usb_dfu instead of dfu_ram. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-31 05:24:57 +00:00
BOOT_TARGET_DEVICES_USB_DFU(func) \
BOOT_TARGET_DEVICES_USB_THOR(func) \
xilinx: versal: Fix compilation error when !CONFIG_NET PXE and DHCP shouldn't be listed when commands are not enabled that's why handle it in the same way as is done for Zynq and ZynqMP. Fixes: ec48b6c991f4 ("arm64: versal: Add support for new Xilinx Versal ACAPs") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-16 08:14:01 +00:00
BOOT_TARGET_DEVICES_PXE(func) \
BOOT_TARGET_DEVICES_DHCP(func)
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-22 12:55:27 +00:00
#include <config_distro_bootcmd.h>
arm64: xilinx: Guard distro boot variable generation When distro boot is disabled there is no reason to generate variables for it. Also do not update boot_targets variable because it would be unused. It is useful for example when standard boot is enabled and distro boot is disabled. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/570c51435da59831ec245cddceda078afa58a550.1693913398.git.michal.simek@amd.com
2023-09-05 11:30:07 +00:00
#else /* CONFIG_DISTRO_DEFAULTS */
# define BOOTENV
#endif /* CONFIG_DISTRO_DEFAULTS */
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-22 12:55:27 +00:00
/* Initial environment variables */
global: Migrate CONFIG_EXTRA_ENV_SETTINGS to CFG Perform a simple rename of CONFIG_EXTRA_ENV_SETTINGS to CFG_EXTRA_ENV_SETTINGS Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-04 15:03:50 +00:00
#ifndef CFG_EXTRA_ENV_SETTINGS
#define CFG_EXTRA_ENV_SETTINGS \
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-22 12:55:27 +00:00
ENV_MEM_LAYOUT_SETTINGS \
xilinx: versal: Add usb dfu/thor distro boot support Change "dfu_usb" to "usb_dfu" for better representation and change required macros. Add 60s timeout of dfu-utils to start transaction. Add support for usb thor to distro boot. Remove DFU_ALT_INFO_RAM as we use bootcmd_usb_dfu instead of dfu_ram. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-31 05:24:57 +00:00
BOOTENV
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-22 12:55:27 +00:00
#endif
#endif /* __XILINX_VERSAL_H */
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