2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2015-04-25 12:07:37 +00:00
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/*
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* (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
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*
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* Sunxi PMIC bus access helpers
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*
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* The axp152 & axp209 use an i2c bus, the axp221 uses the p2wi bus and the
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* axp223 uses the rsb bus, these functions abstract this.
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*/
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2021-10-08 05:17:20 +00:00
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#include <axp_pmic.h>
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2015-04-25 12:07:37 +00:00
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#include <common.h>
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2021-10-08 05:17:23 +00:00
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#include <dm.h>
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2015-04-25 12:07:37 +00:00
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#include <asm/arch/p2wi.h>
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#include <asm/arch/rsb.h>
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2015-04-25 20:18:09 +00:00
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#include <i2c.h>
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2021-10-08 05:17:23 +00:00
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#include <power/pmic.h>
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2015-04-25 12:07:37 +00:00
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#include <asm/arch/pmic_bus.h>
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2015-04-25 20:18:09 +00:00
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#define AXP152_I2C_ADDR 0x30
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#define AXP209_I2C_ADDR 0x34
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2021-01-11 20:11:33 +00:00
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#define AXP305_I2C_ADDR 0x36
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2015-04-25 12:07:37 +00:00
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#define AXP221_CHIP_ADDR 0x68
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2021-10-08 05:17:23 +00:00
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#if CONFIG_IS_ENABLED(PMIC_AXP)
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static struct udevice *pmic;
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#else
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2021-10-08 05:17:22 +00:00
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static int pmic_i2c_address(void)
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{
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if (IS_ENABLED(CONFIG_AXP152_POWER))
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return AXP152_I2C_ADDR;
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if (IS_ENABLED(CONFIG_AXP305_POWER))
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return AXP305_I2C_ADDR;
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/* Other AXP2xx and AXP8xx variants */
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return AXP209_I2C_ADDR;
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}
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#endif
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2021-10-08 05:17:22 +00:00
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2015-04-25 12:07:37 +00:00
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int pmic_bus_init(void)
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{
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/* This cannot be 0 because it is used in SPL before BSS is ready */
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static int needs_init = 1;
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2021-10-08 05:17:22 +00:00
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int ret = 0;
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2015-04-25 12:07:37 +00:00
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if (!needs_init)
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return 0;
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2021-10-08 05:17:23 +00:00
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#if CONFIG_IS_ENABLED(PMIC_AXP)
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ret = uclass_get_device_by_driver(UCLASS_PMIC, DM_DRIVER_GET(axp_pmic),
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&pmic);
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#else
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2021-10-08 05:17:22 +00:00
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if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI)) {
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p2wi_init();
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ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR,
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AXP_PMIC_MODE_REG,
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AXP_PMIC_MODE_P2WI);
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} else if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB)) {
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ret = rsb_init();
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if (ret)
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return ret;
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2015-04-25 12:07:37 +00:00
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2021-10-08 05:17:22 +00:00
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ret = rsb_set_device_address(AXP_PMIC_PRI_DEVICE_ADDR,
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AXP_PMIC_PRI_RUNTIME_ADDR);
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}
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#endif
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2021-10-08 05:17:22 +00:00
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needs_init = ret;
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2015-04-25 12:07:37 +00:00
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2021-10-08 05:17:22 +00:00
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return ret;
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2015-04-25 12:07:37 +00:00
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}
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int pmic_bus_read(u8 reg, u8 *data)
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{
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#if CONFIG_IS_ENABLED(PMIC_AXP)
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return pmic_read(pmic, reg, data, 1);
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#else
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2021-10-08 05:17:22 +00:00
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if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI))
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return p2wi_read(reg, data);
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if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB))
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return rsb_read(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data);
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return i2c_read(pmic_i2c_address(), reg, 1, data, 1);
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#endif
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2015-04-25 12:07:37 +00:00
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}
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int pmic_bus_write(u8 reg, u8 data)
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{
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#if CONFIG_IS_ENABLED(PMIC_AXP)
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return pmic_write(pmic, reg, &data, 1);
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#else
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2021-10-08 05:17:22 +00:00
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if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI))
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return p2wi_write(reg, data);
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if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB))
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return rsb_write(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data);
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return i2c_write(pmic_i2c_address(), reg, 1, &data, 1);
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2021-10-08 05:17:23 +00:00
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#endif
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2015-04-25 12:07:37 +00:00
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}
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int pmic_bus_setbits(u8 reg, u8 bits)
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{
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int ret;
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u8 val;
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ret = pmic_bus_read(reg, &val);
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if (ret)
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return ret;
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2018-11-21 18:05:26 +00:00
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if ((val & bits) == bits)
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return 0;
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2015-04-25 12:07:37 +00:00
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val |= bits;
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return pmic_bus_write(reg, val);
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}
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int pmic_bus_clrbits(u8 reg, u8 bits)
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{
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int ret;
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u8 val;
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ret = pmic_bus_read(reg, &val);
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if (ret)
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return ret;
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2018-11-21 18:05:26 +00:00
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if (!(val & bits))
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return 0;
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2015-04-25 12:07:37 +00:00
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val &= ~bits;
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return pmic_bus_write(reg, val);
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}
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