u-boot/arch/arm/dts/k3-am62-wakeup.dtsi

// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for AM625 SoC Family Wakeup Domain peripherals
 *
 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
 */

&cbass_wakeup {
	wkup_conf: syscon@43000000 {
		bootph-all;
		compatible = "syscon", "simple-mfd";
		reg = <0x00 0x43000000 0x00 0x20000>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x00 0x43000000 0x20000>;

		chipid: chipid@14 {
			bootph-all;
			compatible = "ti,am654-chipid";
			reg = <0x14 0x4>;
		};
	};

	wkup_uart0: serial@2b300000 {
		compatible = "ti,am64-uart", "ti,am654-uart";
		reg = <0x00 0x2b300000 0x00 0x100>;
		interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
		power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
		clocks = <&k3_clks 114 0>;
		clock-names = "fclk";
		status = "disabled";
	};

	wkup_i2c0: i2c@2b200000 {
		compatible = "ti,am64-i2c", "ti,omap4-i2c";
		reg = <0x00 0x2b200000 0x00 0x100>;
		interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
		clocks = <&k3_clks 107 4>;
		clock-names = "fck";
		status = "disabled";
	};

	wkup_rtc0: rtc@2b1f0000 {
		compatible = "ti,am62-rtc";
		reg = <0x00 0x2b1f0000 0x00 0x100>;
		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&k3_clks 117 6> , <&k3_clks 117 0>;
		clock-names = "vbus", "osc32k";
		power-domains = <&k3_pds 117 TI_SCI_PD_EXCLUSIVE>;
		wakeup-source;
	};

	wkup_rti0: watchdog@2b000000 {
		compatible = "ti,j7-rti-wdt";
		reg = <0x00 0x2b000000 0x00 0x100>;
		clocks = <&k3_clks 132 0>;
		power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>;
		assigned-clocks = <&k3_clks 132 0>;
		assigned-clock-parents = <&k3_clks 132 2>;
		/* Used by DM firmware */
		status = "reserved";
	};

	wkup_vtm0: temperature-sensor@b00000 {
		compatible = "ti,j7200-vtm";
		reg = <0x00 0xb00000 0x00 0x400>,
		      <0x00 0xb01000 0x00 0x400>;
		power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
		#thermal-sensor-cells = <1>;
	};
};