2019-07-12 07:13:53 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2019
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* Alex Marginean, NXP
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*/
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#include <common.h>
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#include <dm.h>
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2020-07-19 16:15:37 +00:00
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#include <miiphy.h>
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2019-07-12 07:13:53 +00:00
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#include <misc.h>
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2020-07-19 16:15:37 +00:00
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#include <dm/test.h>
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#include <test/test.h>
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2019-07-12 07:13:53 +00:00
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#include <test/ut.h>
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/* macros copied over from mdio_sandbox.c */
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#define SANDBOX_PHY_ADDR 5
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#define SANDBOX_PHY_REG_CNT 2
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#define TEST_REG_VALUE 0xabcd
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static int dm_test_mdio_mux(struct unit_test_state *uts)
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{
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struct uclass *uc;
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struct udevice *mux;
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struct udevice *mdio_ch0, *mdio_ch1, *mdio;
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struct mdio_ops *ops, *ops_parent;
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struct mdio_mux_ops *mmops;
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u16 reg;
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ut_assertok(uclass_get(UCLASS_MDIO_MUX, &uc));
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ut_assertok(uclass_get_device_by_name(UCLASS_MDIO_MUX, "mdio-mux-test",
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&mux));
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ut_assertok(uclass_get_device_by_name(UCLASS_MDIO, "mdio-ch-test@0",
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&mdio_ch0));
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ut_assertok(uclass_get_device_by_name(UCLASS_MDIO, "mdio-ch-test@1",
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&mdio_ch1));
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ut_assertok(uclass_get_device_by_name(UCLASS_MDIO, "mdio-test", &mdio));
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ops = mdio_get_ops(mdio_ch0);
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ut_assertnonnull(ops);
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ut_assertnonnull(ops->read);
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ut_assertnonnull(ops->write);
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mmops = mdio_mux_get_ops(mux);
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ut_assertnonnull(mmops);
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ut_assertnonnull(mmops->select);
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ops_parent = mdio_get_ops(mdio);
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ut_assertnonnull(ops);
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ut_assertnonnull(ops->read);
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/*
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* mux driver sets last register on the emulated PHY whenever a group
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* is selected to the selection #. Just reading that register from
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* either of the child buses should return the id of the child bus
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*/
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2022-04-06 22:32:59 +00:00
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reg = dm_mdio_read(mdio_ch0, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE,
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SANDBOX_PHY_REG_CNT - 1);
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2019-07-12 07:13:53 +00:00
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ut_asserteq(reg, 0);
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2022-04-06 22:32:59 +00:00
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reg = dm_mdio_read(mdio_ch1, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE,
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SANDBOX_PHY_REG_CNT - 1);
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2019-07-12 07:13:53 +00:00
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ut_asserteq(reg, 1);
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mmops->select(mux, MDIO_MUX_SELECT_NONE, 5);
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2022-04-06 22:32:59 +00:00
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reg = dm_mdio_read(mdio, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE,
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SANDBOX_PHY_REG_CNT - 1);
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2019-07-12 07:13:53 +00:00
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ut_asserteq(reg, 5);
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mmops->deselect(mux, 5);
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2022-04-06 22:32:59 +00:00
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reg = dm_mdio_read(mdio, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE,
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SANDBOX_PHY_REG_CNT - 1);
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2019-07-12 07:13:53 +00:00
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ut_asserteq(reg, (u16)MDIO_MUX_SELECT_NONE);
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return 0;
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}
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2020-07-29 01:41:12 +00:00
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DM_TEST(dm_test_mdio_mux, UT_TESTF_SCAN_FDT);
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