2014-10-03 10:21:06 +00:00
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/*
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* Copyright (C) 2011-2014 Panasonic Corporation
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* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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2015-02-26 17:26:44 +00:00
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#include <mach/sg-regs.h>
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2014-10-03 10:21:06 +00:00
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void sg_init(void)
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{
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u32 tmp;
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/* Set DDR size */
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tmp = sg_memconf_val_ch0(CONFIG_SDRAM0_SIZE, CONFIG_DDR_NUM_CH0);
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tmp |= sg_memconf_val_ch1(CONFIG_SDRAM1_SIZE, CONFIG_DDR_NUM_CH1);
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#if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE < CONFIG_SDRAM1_BASE
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tmp |= SG_MEMCONF_SPARSEMEM;
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#endif
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writel(tmp, SG_MEMCONF);
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2015-01-13 09:54:34 +00:00
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/* Input ports must be enabled before deasserting reset of cores */
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2014-10-03 10:21:06 +00:00
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tmp = readl(SG_IECTRL);
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2015-01-19 13:31:10 +00:00
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tmp |= 1 << 6;
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2014-10-03 10:21:06 +00:00
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writel(tmp, SG_IECTRL);
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}
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