2018-05-06 21:58:06 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0+
|
2014-01-08 20:18:29 +00:00
|
|
|
/*
|
|
|
|
* Xilinx MicroZED board DTS
|
|
|
|
*
|
2016-01-12 07:06:36 +00:00
|
|
|
* Copyright (C) 2013 - 2016 Xilinx, Inc.
|
2014-01-08 20:18:29 +00:00
|
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include "zynq-7000.dtsi"
|
|
|
|
|
|
|
|
/ {
|
|
|
|
model = "Zynq MicroZED Board";
|
|
|
|
compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000";
|
2014-05-15 11:37:54 +00:00
|
|
|
|
2014-05-15 11:37:55 +00:00
|
|
|
aliases {
|
|
|
|
serial0 = &uart1;
|
2015-08-15 17:38:51 +00:00
|
|
|
spi0 = &qspi;
|
2016-01-12 07:06:36 +00:00
|
|
|
mmc0 = &sdhci0;
|
2014-05-15 11:37:55 +00:00
|
|
|
};
|
|
|
|
|
2016-11-11 12:11:37 +00:00
|
|
|
memory@0 {
|
2014-05-15 11:37:54 +00:00
|
|
|
device_type = "memory";
|
|
|
|
reg = <0 0x40000000>;
|
|
|
|
};
|
2016-01-12 07:06:36 +00:00
|
|
|
|
|
|
|
chosen {
|
|
|
|
bootargs = "earlyprintk";
|
|
|
|
stdout-path = "serial0:115200n8";
|
|
|
|
};
|
|
|
|
|
|
|
|
usb_phy0: phy0 {
|
|
|
|
compatible = "usb-nop-xceiv";
|
|
|
|
#phy-cells = <0>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&clkc {
|
|
|
|
ps-clk-frequency = <33333333>;
|
2014-01-08 20:18:29 +00:00
|
|
|
};
|
2015-08-15 17:38:51 +00:00
|
|
|
|
|
|
|
&qspi {
|
2016-02-16 13:05:03 +00:00
|
|
|
u-boot,dm-pre-reloc;
|
2015-08-15 17:38:51 +00:00
|
|
|
status = "okay";
|
|
|
|
};
|
2015-10-18 01:41:24 +00:00
|
|
|
|
|
|
|
&uart1 {
|
|
|
|
u-boot,dm-pre-reloc;
|
|
|
|
status = "okay";
|
|
|
|
};
|
2016-01-12 07:06:36 +00:00
|
|
|
|
|
|
|
&gem0 {
|
|
|
|
status = "okay";
|
|
|
|
phy-mode = "rgmii-id";
|
|
|
|
phy-handle = <ðernet_phy>;
|
|
|
|
|
|
|
|
ethernet_phy: ethernet-phy@0 {
|
|
|
|
reg = <0>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&sdhci0 {
|
|
|
|
u-boot,dm-pre-reloc;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usb0 {
|
|
|
|
status = "okay";
|
|
|
|
dr_mode = "host";
|
|
|
|
usb-phy = <&usb_phy0>;
|
|
|
|
};
|