2011-01-27 10:58:05 +00:00
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/*
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* SoC-specific setup info
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*
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* (C) Copyright 2010,2011
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* NVIDIA Corporation <www.nvidia.com>
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2011-01-27 10:58:05 +00:00
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*/
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#include <config.h>
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2012-03-08 07:20:18 +00:00
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#include <linux/linkage.h>
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2011-01-27 10:58:05 +00:00
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2015-03-04 23:36:00 +00:00
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#ifdef CONFIG_ARM64
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.align 5
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ENTRY(reset_cpu)
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/* get address for global reset register */
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ldr x1, =PRM_RSTCTRL
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ldr w3, [x1]
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/* force reset */
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orr w3, w3, #0x10
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str w3, [x1]
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mov w0, w0
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1:
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b 1b
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ENDPROC(reset_cpu)
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#else
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2011-01-27 10:58:05 +00:00
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.align 5
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2012-03-08 07:20:18 +00:00
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ENTRY(reset_cpu)
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2011-01-27 10:58:05 +00:00
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ldr r1, rstctl @ get addr for global reset
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@ reg
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ldr r3, [r1]
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orr r3, r3, #0x10
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str r3, [r1] @ force reset
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mov r0, r0
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_loop_forever:
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b _loop_forever
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rstctl:
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.word PRM_RSTCTRL
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2012-03-08 07:20:18 +00:00
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ENDPROC(reset_cpu)
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2015-03-04 23:36:00 +00:00
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#endif
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